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0e4768713e
When the data structure is only referred by pointer, compiler may not need to see the contents of the data type. Thus, we may replace header inclusions by respective forward declarations. Due to above add missed headers as well. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20210423182441.50272-5-andriy.shevchenko@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
136 lines
3.1 KiB
C
136 lines
3.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (C) 2005 Stephen Street / StreetFire Sound Labs
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* Copyright (C) 2013, Intel Corporation
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*/
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#ifndef SPI_PXA2XX_H
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#define SPI_PXA2XX_H
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#include <linux/interrupt.h>
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#include <linux/io.h>
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#include <linux/types.h>
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#include <linux/sizes.h>
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#include <linux/pxa2xx_ssp.h>
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struct gpio_desc;
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struct pxa2xx_spi_controller;
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struct spi_controller;
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struct spi_device;
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struct spi_transfer;
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struct driver_data {
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/* SSP Info */
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struct ssp_device *ssp;
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/* SPI framework hookup */
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enum pxa_ssp_type ssp_type;
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struct spi_controller *controller;
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/* PXA hookup */
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struct pxa2xx_spi_controller *controller_info;
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/* SSP masks*/
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u32 dma_cr1;
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u32 int_cr1;
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u32 clear_sr;
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u32 mask_sr;
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/* DMA engine support */
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atomic_t dma_running;
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/* Current transfer state info */
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void *tx;
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void *tx_end;
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void *rx;
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void *rx_end;
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u8 n_bytes;
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int (*write)(struct driver_data *drv_data);
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int (*read)(struct driver_data *drv_data);
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irqreturn_t (*transfer_handler)(struct driver_data *drv_data);
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void (*cs_control)(u32 command);
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void __iomem *lpss_base;
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/* GPIOs for chip selects */
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struct gpio_desc **cs_gpiods;
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/* Optional slave FIFO ready signal */
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struct gpio_desc *gpiod_ready;
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};
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struct chip_data {
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u32 cr1;
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u32 dds_rate;
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u32 timeout;
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u8 n_bytes;
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u32 dma_burst_size;
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u32 threshold;
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u32 dma_threshold;
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u16 lpss_rx_threshold;
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u16 lpss_tx_threshold;
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u8 enable_dma;
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union {
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struct gpio_desc *gpiod_cs;
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unsigned int frm;
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};
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int gpio_cs_inverted;
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int (*write)(struct driver_data *drv_data);
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int (*read)(struct driver_data *drv_data);
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void (*cs_control)(u32 command);
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};
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static inline u32 pxa2xx_spi_read(const struct driver_data *drv_data, u32 reg)
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{
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return pxa_ssp_read_reg(drv_data->ssp, reg);
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}
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static inline void pxa2xx_spi_write(const struct driver_data *drv_data, u32 reg, u32 val)
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{
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pxa_ssp_write_reg(drv_data->ssp, reg, val);
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}
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#define DMA_ALIGNMENT 8
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static inline int pxa25x_ssp_comp(struct driver_data *drv_data)
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{
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switch (drv_data->ssp_type) {
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case PXA25x_SSP:
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case CE4100_SSP:
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case QUARK_X1000_SSP:
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return 1;
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default:
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return 0;
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}
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}
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static inline void write_SSSR_CS(struct driver_data *drv_data, u32 val)
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{
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if (drv_data->ssp_type == CE4100_SSP ||
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drv_data->ssp_type == QUARK_X1000_SSP)
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val |= pxa2xx_spi_read(drv_data, SSSR) & SSSR_ALT_FRM_MASK;
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pxa2xx_spi_write(drv_data, SSSR, val);
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}
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extern int pxa2xx_spi_flush(struct driver_data *drv_data);
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#define MAX_DMA_LEN SZ_64K
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#define DEFAULT_DMA_CR1 (SSCR1_TSRE | SSCR1_RSRE | SSCR1_TRAIL)
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extern irqreturn_t pxa2xx_spi_dma_transfer(struct driver_data *drv_data);
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extern int pxa2xx_spi_dma_prepare(struct driver_data *drv_data,
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struct spi_transfer *xfer);
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extern void pxa2xx_spi_dma_start(struct driver_data *drv_data);
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extern void pxa2xx_spi_dma_stop(struct driver_data *drv_data);
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extern int pxa2xx_spi_dma_setup(struct driver_data *drv_data);
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extern void pxa2xx_spi_dma_release(struct driver_data *drv_data);
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extern int pxa2xx_spi_set_dma_burst_and_threshold(struct chip_data *chip,
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struct spi_device *spi,
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u8 bits_per_word,
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u32 *burst_code,
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u32 *threshold);
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#endif /* SPI_PXA2XX_H */
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