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48783be427
Commit79edff1206("scripts/dtc: Update to upstream version v1.6.0-51-g183df9e9c2b9") broke booting on Microblaze systems depending on the build. The problem is libfdt gained an 8-byte starting alignment check, but the Microblaze built-in DTB area is only 4-byte aligned. This affected not just built-in DTBs as bootloader passed DTBs are copied into the built-in DTB region. Other arches using built-in DTBs use a common linker macro which has sufficient alignment. Fixes:79edff1206("scripts/dtc: Update to upstream version v1.6.0-51-g183df9e9c2b9") Reported-by: Guenter Roeck <linux@roeck-us.net> Tested-by: Guenter Roeck <linux@roeck-us.net> Cc: Michal Simek <monstr@monstr.eu> Signed-off-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20210213011624.251838-1-robh@kernel.org Signed-off-by: Michal Simek <michal.simek@xilinx.com>
144 lines
2.8 KiB
ArmAsm
144 lines
2.8 KiB
ArmAsm
/*
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* Copyright (C) 2008-2009 Michal Simek <monstr@monstr.eu>
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* Copyright (C) 2008-2009 PetaLogix
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* Copyright (C) 2006 Atmark Techno, Inc.
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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OUTPUT_ARCH(microblaze)
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ENTRY(microblaze_start)
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#define RO_EXCEPTION_TABLE_ALIGN 16
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#include <asm/cache.h>
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#include <asm/page.h>
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#include <asm-generic/vmlinux.lds.h>
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#include <asm/thread_info.h>
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#ifdef __MICROBLAZEEL__
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jiffies = jiffies_64;
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#else
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jiffies = jiffies_64 + 4;
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#endif
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SECTIONS {
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. = CONFIG_KERNEL_START;
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microblaze_start = CONFIG_KERNEL_BASE_ADDR;
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.text : AT(ADDR(.text) - LOAD_OFFSET) {
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_text = . ;
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_stext = . ;
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HEAD_TEXT
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TEXT_TEXT
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*(.fixup)
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EXIT_TEXT
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EXIT_CALL
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SCHED_TEXT
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CPUIDLE_TEXT
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LOCK_TEXT
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KPROBES_TEXT
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IRQENTRY_TEXT
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SOFTIRQENTRY_TEXT
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. = ALIGN (4) ;
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_etext = . ;
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}
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. = ALIGN (8) ;
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__fdt_blob : AT(ADDR(__fdt_blob) - LOAD_OFFSET) {
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_fdt_start = . ; /* place for fdt blob */
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*(__fdt_blob) ; /* Any link-placed DTB */
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. = _fdt_start + 0x10000; /* Pad up to 64kbyte */
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_fdt_end = . ;
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}
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. = ALIGN(16);
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RO_DATA(4096)
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/*
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* sdata2 section can go anywhere, but must be word aligned
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* and SDA2_BASE must point to the middle of it
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*/
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.sdata2 : AT(ADDR(.sdata2) - LOAD_OFFSET) {
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_ssrw = .;
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. = ALIGN(PAGE_SIZE); /* page aligned when MMU used */
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*(.sdata2)
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. = ALIGN(8);
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_essrw = .;
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_ssrw_size = _essrw - _ssrw;
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_KERNEL_SDA2_BASE_ = _ssrw + (_ssrw_size / 2);
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}
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_sdata = . ;
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RW_DATA(32, PAGE_SIZE, THREAD_SIZE)
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_edata = . ;
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/* Under the microblaze ABI, .sdata and .sbss must be contiguous */
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. = ALIGN(8);
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.sdata : AT(ADDR(.sdata) - LOAD_OFFSET) {
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_ssro = .;
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*(.sdata)
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}
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.sbss : AT(ADDR(.sbss) - LOAD_OFFSET) {
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_ssbss = .;
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*(.sbss)
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_esbss = .;
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_essro = .;
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_ssro_size = _essro - _ssro ;
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_KERNEL_SDA_BASE_ = _ssro + (_ssro_size / 2) ;
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}
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PERCPU_SECTION(L1_CACHE_BYTES)
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. = ALIGN(PAGE_SIZE);
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__init_begin = .;
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INIT_TEXT_SECTION(PAGE_SIZE)
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.init.data : AT(ADDR(.init.data) - LOAD_OFFSET) {
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INIT_DATA
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}
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. = ALIGN(4);
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.init.ivt : AT(ADDR(.init.ivt) - LOAD_OFFSET) {
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__ivt_start = .;
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*(.init.ivt)
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__ivt_end = .;
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}
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.init.setup : AT(ADDR(.init.setup) - LOAD_OFFSET) {
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INIT_SETUP(0)
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}
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.initcall.init : AT(ADDR(.initcall.init) - LOAD_OFFSET ) {
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INIT_CALLS
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}
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.con_initcall.init : AT(ADDR(.con_initcall.init) - LOAD_OFFSET) {
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CON_INITCALL
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}
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__init_end_before_initramfs = .;
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.init.ramfs : AT(ADDR(.init.ramfs) - LOAD_OFFSET) {
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INIT_RAM_FS
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}
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__init_end = .;
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.bss ALIGN (PAGE_SIZE) : AT(ADDR(.bss) - LOAD_OFFSET) {
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/* page aligned when MMU used */
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__bss_start = . ;
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*(.bss*)
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*(COMMON)
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. = ALIGN (4) ;
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__bss_stop = . ;
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}
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. = ALIGN(PAGE_SIZE);
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_end = .;
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DISCARDS
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}
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