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db10e20117
The adc_clk variable is currently defined using a 32-bits unsigned integer, which will overflow under some very valid range of operations. Such overflow will occur if, for example, the parent clock is set to a 20MHz frequency and the ADC startup time is larger than 215ns. To fix this, introduce an intermediate variable holding the clock rate in kHz. Signed-off-by: Josh Wu <josh.wu@atmel.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org> |
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ad7266.c | ||
ad7298.c | ||
ad7476.c | ||
ad7791.c | ||
ad7793.c | ||
ad7887.c | ||
ad7923.c | ||
ad_sigma_delta.c | ||
at91_adc.c | ||
exynos_adc.c | ||
Kconfig | ||
lp8788_adc.c | ||
Makefile | ||
max1363.c | ||
mcp320x.c | ||
nau7802.c | ||
ti_am335x_adc.c | ||
ti-adc081c.c | ||
twl6030-gpadc.c | ||
viperboard_adc.c |