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When handling a fault in stage-2, we need to resync I$ and D$, just to be sure we don't leave any old cache line behind. That's very good, except that we do so using the *user* address. Under heavy load (swapping like crazy), we may end up in a situation where the page gets mapped in stage-2 while being unmapped from userspace by another CPU. At that point, the DC/IC instructions can generate a fault, which we handle with kvm->mmu_lock held. The box quickly deadlocks, user is unhappy. Instead, perform this invalidation through the kernel mapping, which is guaranteed to be present. The box is much happier, and so am I. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org> |
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| .. | ||
| arm.c | ||
| coproc_a7.c | ||
| coproc_a15.c | ||
| coproc.c | ||
| coproc.h | ||
| emulate.c | ||
| guest.c | ||
| handle_exit.c | ||
| init.S | ||
| interrupts_head.S | ||
| interrupts.S | ||
| Kconfig | ||
| Makefile | ||
| mmio.c | ||
| mmu.c | ||
| perf.c | ||
| psci.c | ||
| reset.c | ||
| trace.h | ||