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84b36ce5f7
Route all buffer writes through the demux. Addition or removal of a buffer results in tear down and setup of all the buffers for a given device. Signed-off-by: Jonathan Cameron <jic23@kernel.org> Tested-by: srinivas pandruvada <srinivas.pandruvada@intel.com>
333 lines
7.6 KiB
C
333 lines
7.6 KiB
C
/*
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* AD7466/7/8 AD7476/5/7/8 (A) SPI ADC driver
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*
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* Copyright 2010 Analog Devices Inc.
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*
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* Licensed under the GPL-2 or later.
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*/
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#include <linux/device.h>
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#include <linux/kernel.h>
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#include <linux/slab.h>
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#include <linux/sysfs.h>
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#include <linux/spi/spi.h>
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#include <linux/regulator/consumer.h>
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#include <linux/err.h>
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#include <linux/module.h>
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#include <linux/iio/iio.h>
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#include <linux/iio/sysfs.h>
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#include <linux/iio/buffer.h>
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#include <linux/iio/trigger_consumer.h>
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#include <linux/iio/triggered_buffer.h>
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#define RES_MASK(bits) ((1 << (bits)) - 1)
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struct ad7476_state;
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struct ad7476_chip_info {
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unsigned int int_vref_uv;
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struct iio_chan_spec channel[2];
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void (*reset)(struct ad7476_state *);
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};
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struct ad7476_state {
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struct spi_device *spi;
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const struct ad7476_chip_info *chip_info;
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struct regulator *reg;
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struct spi_transfer xfer;
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struct spi_message msg;
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/*
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* DMA (thus cache coherency maintenance) requires the
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* transfer buffers to live in their own cache lines.
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* Make the buffer large enough for one 16 bit sample and one 64 bit
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* aligned 64 bit timestamp.
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*/
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unsigned char data[ALIGN(2, sizeof(s64)) + sizeof(s64)]
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____cacheline_aligned;
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};
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enum ad7476_supported_device_ids {
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ID_AD7091R,
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ID_AD7276,
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ID_AD7277,
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ID_AD7278,
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ID_AD7466,
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ID_AD7467,
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ID_AD7468,
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ID_AD7495,
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ID_AD7940,
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};
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static irqreturn_t ad7476_trigger_handler(int irq, void *p)
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{
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struct iio_poll_func *pf = p;
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struct iio_dev *indio_dev = pf->indio_dev;
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struct ad7476_state *st = iio_priv(indio_dev);
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s64 time_ns;
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int b_sent;
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b_sent = spi_sync(st->spi, &st->msg);
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if (b_sent < 0)
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goto done;
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time_ns = iio_get_time_ns();
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if (indio_dev->scan_timestamp)
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((s64 *)st->data)[1] = time_ns;
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iio_push_to_buffers(indio_dev, st->data);
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done:
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iio_trigger_notify_done(indio_dev->trig);
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return IRQ_HANDLED;
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}
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static void ad7091_reset(struct ad7476_state *st)
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{
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/* Any transfers with 8 scl cycles will reset the device */
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spi_read(st->spi, st->data, 1);
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}
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static int ad7476_scan_direct(struct ad7476_state *st)
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{
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int ret;
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ret = spi_sync(st->spi, &st->msg);
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if (ret)
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return ret;
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return be16_to_cpup((__be16 *)st->data);
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}
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static int ad7476_read_raw(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan,
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int *val,
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int *val2,
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long m)
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{
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int ret;
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struct ad7476_state *st = iio_priv(indio_dev);
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int scale_uv;
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switch (m) {
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case IIO_CHAN_INFO_RAW:
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mutex_lock(&indio_dev->mlock);
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if (iio_buffer_enabled(indio_dev))
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ret = -EBUSY;
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else
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ret = ad7476_scan_direct(st);
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mutex_unlock(&indio_dev->mlock);
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if (ret < 0)
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return ret;
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*val = (ret >> st->chip_info->channel[0].scan_type.shift) &
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RES_MASK(st->chip_info->channel[0].scan_type.realbits);
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return IIO_VAL_INT;
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case IIO_CHAN_INFO_SCALE:
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if (!st->chip_info->int_vref_uv) {
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scale_uv = regulator_get_voltage(st->reg);
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if (scale_uv < 0)
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return scale_uv;
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} else {
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scale_uv = st->chip_info->int_vref_uv;
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}
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scale_uv >>= chan->scan_type.realbits;
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*val = scale_uv / 1000;
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*val2 = (scale_uv % 1000) * 1000;
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return IIO_VAL_INT_PLUS_MICRO;
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}
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return -EINVAL;
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}
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#define _AD7476_CHAN(bits, _shift, _info_mask) \
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{ \
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.type = IIO_VOLTAGE, \
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.indexed = 1, \
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.info_mask = _info_mask | \
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IIO_CHAN_INFO_SCALE_SHARED_BIT, \
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.scan_type = { \
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.sign = 'u', \
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.realbits = (bits), \
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.storagebits = 16, \
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.shift = (_shift), \
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.endianness = IIO_BE, \
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}, \
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}
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#define AD7476_CHAN(bits) _AD7476_CHAN((bits), 13 - (bits), \
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IIO_CHAN_INFO_RAW_SEPARATE_BIT)
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#define AD7940_CHAN(bits) _AD7476_CHAN((bits), 15 - (bits), \
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IIO_CHAN_INFO_RAW_SEPARATE_BIT)
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#define AD7091R_CHAN(bits) _AD7476_CHAN((bits), 16 - (bits), 0)
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static const struct ad7476_chip_info ad7476_chip_info_tbl[] = {
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[ID_AD7091R] = {
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.channel[0] = AD7091R_CHAN(12),
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.channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
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.reset = ad7091_reset,
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},
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[ID_AD7276] = {
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.channel[0] = AD7940_CHAN(12),
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.channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
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},
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[ID_AD7277] = {
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.channel[0] = AD7940_CHAN(10),
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.channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
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},
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[ID_AD7278] = {
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.channel[0] = AD7940_CHAN(8),
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.channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
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},
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[ID_AD7466] = {
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.channel[0] = AD7476_CHAN(12),
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.channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
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},
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[ID_AD7467] = {
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.channel[0] = AD7476_CHAN(10),
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.channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
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},
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[ID_AD7468] = {
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.channel[0] = AD7476_CHAN(8),
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.channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
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},
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[ID_AD7495] = {
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.channel[0] = AD7476_CHAN(12),
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.channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
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.int_vref_uv = 2500000,
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},
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[ID_AD7940] = {
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.channel[0] = AD7940_CHAN(14),
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.channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
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},
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};
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static const struct iio_info ad7476_info = {
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.driver_module = THIS_MODULE,
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.read_raw = &ad7476_read_raw,
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};
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static int __devinit ad7476_probe(struct spi_device *spi)
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{
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struct ad7476_state *st;
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struct iio_dev *indio_dev;
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int ret;
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indio_dev = iio_device_alloc(sizeof(*st));
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if (indio_dev == NULL) {
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ret = -ENOMEM;
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goto error_ret;
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}
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st = iio_priv(indio_dev);
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st->chip_info =
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&ad7476_chip_info_tbl[spi_get_device_id(spi)->driver_data];
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st->reg = regulator_get(&spi->dev, "vcc");
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if (IS_ERR(st->reg)) {
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ret = PTR_ERR(st->reg);
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goto error_free_dev;
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}
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ret = regulator_enable(st->reg);
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if (ret)
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goto error_put_reg;
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spi_set_drvdata(spi, indio_dev);
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st->spi = spi;
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/* Establish that the iio_dev is a child of the spi device */
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indio_dev->dev.parent = &spi->dev;
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indio_dev->name = spi_get_device_id(spi)->name;
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indio_dev->modes = INDIO_DIRECT_MODE;
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indio_dev->channels = st->chip_info->channel;
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indio_dev->num_channels = 2;
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indio_dev->info = &ad7476_info;
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/* Setup default message */
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st->xfer.rx_buf = &st->data;
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st->xfer.len = st->chip_info->channel[0].scan_type.storagebits / 8;
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spi_message_init(&st->msg);
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spi_message_add_tail(&st->xfer, &st->msg);
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ret = iio_triggered_buffer_setup(indio_dev, NULL,
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&ad7476_trigger_handler, NULL);
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if (ret)
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goto error_disable_reg;
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if (st->chip_info->reset)
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st->chip_info->reset(st);
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ret = iio_device_register(indio_dev);
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if (ret)
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goto error_ring_unregister;
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return 0;
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error_ring_unregister:
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iio_triggered_buffer_cleanup(indio_dev);
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error_disable_reg:
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regulator_disable(st->reg);
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error_put_reg:
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regulator_put(st->reg);
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error_free_dev:
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iio_device_free(indio_dev);
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error_ret:
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return ret;
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}
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static int __devexit ad7476_remove(struct spi_device *spi)
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{
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struct iio_dev *indio_dev = spi_get_drvdata(spi);
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struct ad7476_state *st = iio_priv(indio_dev);
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iio_device_unregister(indio_dev);
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iio_triggered_buffer_cleanup(indio_dev);
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regulator_disable(st->reg);
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regulator_put(st->reg);
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iio_device_free(indio_dev);
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return 0;
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}
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static const struct spi_device_id ad7476_id[] = {
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{"ad7091r", ID_AD7091R},
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{"ad7273", ID_AD7277},
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{"ad7274", ID_AD7276},
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{"ad7276", ID_AD7276},
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{"ad7277", ID_AD7277},
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{"ad7278", ID_AD7278},
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{"ad7466", ID_AD7466},
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{"ad7467", ID_AD7467},
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{"ad7468", ID_AD7468},
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{"ad7475", ID_AD7466},
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{"ad7476", ID_AD7466},
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{"ad7476a", ID_AD7466},
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{"ad7477", ID_AD7467},
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{"ad7477a", ID_AD7467},
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{"ad7478", ID_AD7468},
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{"ad7478a", ID_AD7468},
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{"ad7495", ID_AD7495},
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{"ad7910", ID_AD7467},
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{"ad7920", ID_AD7466},
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{"ad7940", ID_AD7940},
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{}
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};
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MODULE_DEVICE_TABLE(spi, ad7476_id);
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static struct spi_driver ad7476_driver = {
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.driver = {
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.name = "ad7476",
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.owner = THIS_MODULE,
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},
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.probe = ad7476_probe,
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.remove = __devexit_p(ad7476_remove),
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.id_table = ad7476_id,
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};
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module_spi_driver(ad7476_driver);
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MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
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MODULE_DESCRIPTION("Analog Devices AD7476 and similar 1-channel ADCs");
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MODULE_LICENSE("GPL v2");
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