Arnd Bergmann 0ea32f50b3 RISC-V Devicetrees for v6.10 ... Sophgo: Added sdhci support for cv18xx/duo. Added clock support for cv18xx. Added clock for uart/sdhci. Added spi support for cv18xx. Added i2c support for cv18xx. Added reserved memory node for cv1800b/duo. Signed-off-by: Chen Wang <unicorn_wang@outlook.com> -----BEGIN PGP SIGNATURE----- iQGzBAABCgAdFiEEyXBewyFOIoMq4pDN7RKLaY1m8IIFAmYxmBsACgkQ7RKLaY1m 8IKJbwwA2MF4SGcM7ZBdrYrom0leEIv7/UrGyGLOK3GUY57hp2upsrpE9j66x8sV 5GGEdlUoAzlcHFe23FzA44JVhRm3NcgUo5CAZRrjrk9M17RKdCWziiJ5h4ZbP1Ue a787yAAg58OmMLSpaJBoO0IwjFiUS8nUC9YUSqvWmVhtsvHO/n7aZKvYOdgZ3lnA LtlQGpsuz3q8q5Gk/tmS8astIkxzCMVlLfipkETqF5H5dtlw/tl7sIqubxUnnWea /qj6QiSn+li2jdk4VQOw57Fc6IEkFZtYJGRwnCKmZE7thHA2z8HZ+gIXDq/X0CU8 PTnwQ7nO0oRJn0bQLACy+vO/9iznRNo+y3HAoVQtDjB/Xef6JbIrI/1pnft8UUQO ZBGvuvXbq7K1uTpVHIrup9AnxwcNTzNFJ6wK/jap/R+CAIZKA2GSpNgd0qDOxzGh OLjTVnU1jc7VhB2gaNEaox9zs0s6MOxMwz9iRLAA3Dsyitbx1AEjq63vYXE3KR72 dnvT4Y8j =d7SS -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmYzjYsACgkQYKtH/8kJ Uie5nA//Sib+nyw4b/v6Mk1c+OWl+N+V9iaennHJ3hcRxC/AQDF6RbwPi3DVItkz KvXFGa7buTl1HzmiBVqjv1k2lZTFdZo6ZndwGwr/V1qd9pP+USoC/5ua4XatYdP+ UT9RtXnqTMRzYFXVYnYKzs3phhteGfqg8yAmqOqNN6mtkgzy0Wi3NGoPWVD83G2V PZY0LcC3H9qU0lM3KXicHGWAPWgrvOo9iVdeXNlKt0QKvaMRw0t3tkKQSb2HEBvv M2T6uknTir8lFdXhC/6r26zNiC0Iuk9/xtVuTvyI1NWyscLy+F0orR7QT49axEBO C425MQ34OkyPfplGvROWq9PN4jpnbyMIlFnP0/VJyjPfO6oZ7MYNJ6hbYjrNDf/7 n/8RugMxtUZVwBHTb5pKvCgB51/zf80N5bNVW1yRQ3HbUFz91VaPTh5m+WKFz7BQ 6rETCpdS4ai0tkREbfbNPhBmid3SuqF9wTWEOcfh2BqRCjc+c4In/XsVFkDLGxL/ peZku7C11hTDc3L/WazU2hwwjye28aoqykhr6B7CQ7MiThkUnknXrXkdfqwiTDJj Dv4e2wl0LU3zN66NFTlpUQ4fYXTD6IH8d3ps9qLaY3KbALbMR8x+oTnwBfxYUJuL oP/NT6kEFCRP1pdU9E4OXhvaqvfGQI4/gETnefXmsG68u0dtS24= =5D+b -----END PGP SIGNATURE----- Merge tag 'riscv-sophgo-dt-for-v6.10' of https://github.com/sophgo/linux into soc/dt RISC-V Devicetrees for v6.10 Sophgo: Added sdhci support for cv18xx/duo. Added clock support for cv18xx. Added clock for uart/sdhci. Added spi support for cv18xx. Added i2c support for cv18xx. Added reserved memory node for cv1800b/duo. Signed-off-by: Chen Wang <unicorn_wang@outlook.com> * tag 'riscv-sophgo-dt-for-v6.10' of https://github.com/sophgo/linux: riscv: dts: sophgo: add reserved memory node for CV1800B riscv: dts: sophgo: use real clock for sdhci riscv: dts: sophgo: cv18xx: Add i2c devices riscv: dts: sophgo: cv18xx: Add spi devices riscv: dts: sophgo: add uart clock for Sophgo CV1800 series SoC riscv: dts: sophgo: add clock generator for Sophgo CV1800 series SoC riscv: dts: sophgo: add sdcard support for milkv duo Link: https://lore.kernel.org/r/MA0P287MB2822CA2DE757787D6EA3B1F8FE192@MA0P287MB2822.INDP287.PROD.OUTLOOK.COM Signed-off-by: Arnd Bergmann <arnd@arndb.de>		2024-05-02 14:56:43 +02:00
..
dts	RISC-V Devicetrees for v6.10	2024-05-02 14:56:43 +02:00
.gitignore	riscv: efi: enable generic EFI compressed boot	2022-09-20 09:50:30 +02:00
install.sh	kbuild: factor out the common installation code into scripts/install.sh	2022-05-11 21:45:53 +09:00
loader.lds.S	riscv: Move kernel mapping outside of linear mapping	2021-04-26 08:25:04 -07:00
loader.S	riscv: provide a flat image loader	2019-11-17 15:17:39 -08:00
Makefile	riscv: boot: Fix creation of loader.bin	2023-11-06 09:39:26 -08:00