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Armada CP110 PCIe controller can have from one to four PHYs for configuring SERDES lanes (PCIe x1, PCIe x2 or PCIe x4). Describe the phys and phy-names properties in the bindings. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> |
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bindings | ||
booting-without-of.txt | ||
changesets.txt | ||
dynamic-resolution-notes.txt | ||
of_unittest.txt | ||
overlay-notes.txt | ||
usage-model.txt | ||
writing-schema.md |