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c07a8f8b08
Disable the kprobe probing of the entry trampoline: .entry_trampoline is a code area that is used to ensure page table isolation between userspace and kernelspace. At the beginning of the execution of the trampoline, we load the kernel's CR3 register. This has the effect of enabling the translation of the kernel virtual addresses to physical addresses. Before this happens most kernel addresses can not be translated because the running process' CR3 is still used. If a kprobe is placed on the trampoline code before that change of the CR3 register happens the kernel crashes because int3 handling pages are not accessible. To fix this, add the .entry_trampoline section to the kprobe blacklist to prohibit the probing of code before all the kernel pages are accessible. Signed-off-by: Francis Deslauriers <francis.deslauriers@efficios.com> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Cc: Andy Lutomirski <luto@kernel.org> Cc: Borislav Petkov <bp@alien8.de> Cc: Brian Gerst <brgerst@gmail.com> Cc: Denys Vlasenko <dvlasenk@redhat.com> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Josh Poimboeuf <jpoimboe@redhat.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: mathieu.desnoyers@efficios.com Cc: mhiramat@kernel.org Link: http://lkml.kernel.org/r/1520565492-4637-2-git-send-email-francis.deslauriers@efficios.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
417 lines
9.8 KiB
ArmAsm
417 lines
9.8 KiB
ArmAsm
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* ld script for the x86 kernel
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*
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* Historic 32-bit version written by Martin Mares <mj@atrey.karlin.mff.cuni.cz>
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*
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* Modernisation, unification and other changes and fixes:
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* Copyright (C) 2007-2009 Sam Ravnborg <sam@ravnborg.org>
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*
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*
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* Don't define absolute symbols until and unless you know that symbol
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* value is should remain constant even if kernel image is relocated
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* at run time. Absolute symbols are not relocated. If symbol value should
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* change if kernel is relocated, make the symbol section relative and
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* put it inside the section definition.
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*/
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#ifdef CONFIG_X86_32
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#define LOAD_OFFSET __PAGE_OFFSET
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#else
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#define LOAD_OFFSET __START_KERNEL_map
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#endif
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#include <asm-generic/vmlinux.lds.h>
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#include <asm/asm-offsets.h>
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#include <asm/thread_info.h>
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#include <asm/page_types.h>
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#include <asm/orc_lookup.h>
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#include <asm/cache.h>
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#include <asm/boot.h>
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#undef i386 /* in case the preprocessor is a 32bit one */
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OUTPUT_FORMAT(CONFIG_OUTPUT_FORMAT, CONFIG_OUTPUT_FORMAT, CONFIG_OUTPUT_FORMAT)
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#ifdef CONFIG_X86_32
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OUTPUT_ARCH(i386)
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ENTRY(phys_startup_32)
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jiffies = jiffies_64;
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#else
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OUTPUT_ARCH(i386:x86-64)
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ENTRY(phys_startup_64)
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jiffies_64 = jiffies;
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#endif
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#if defined(CONFIG_X86_64)
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/*
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* On 64-bit, align RODATA to 2MB so we retain large page mappings for
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* boundaries spanning kernel text, rodata and data sections.
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*
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* However, kernel identity mappings will have different RWX permissions
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* to the pages mapping to text and to the pages padding (which are freed) the
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* text section. Hence kernel identity mappings will be broken to smaller
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* pages. For 64-bit, kernel text and kernel identity mappings are different,
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* so we can enable protection checks as well as retain 2MB large page
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* mappings for kernel text.
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*/
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#define X64_ALIGN_RODATA_BEGIN . = ALIGN(HPAGE_SIZE);
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#define X64_ALIGN_RODATA_END \
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. = ALIGN(HPAGE_SIZE); \
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__end_rodata_hpage_align = .;
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#define ALIGN_ENTRY_TEXT_BEGIN . = ALIGN(PMD_SIZE);
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#define ALIGN_ENTRY_TEXT_END . = ALIGN(PMD_SIZE);
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#else
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#define X64_ALIGN_RODATA_BEGIN
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#define X64_ALIGN_RODATA_END
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#define ALIGN_ENTRY_TEXT_BEGIN
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#define ALIGN_ENTRY_TEXT_END
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#endif
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PHDRS {
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text PT_LOAD FLAGS(5); /* R_E */
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data PT_LOAD FLAGS(6); /* RW_ */
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#ifdef CONFIG_X86_64
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#ifdef CONFIG_SMP
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percpu PT_LOAD FLAGS(6); /* RW_ */
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#endif
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init PT_LOAD FLAGS(7); /* RWE */
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#endif
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note PT_NOTE FLAGS(0); /* ___ */
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}
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SECTIONS
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{
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#ifdef CONFIG_X86_32
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. = LOAD_OFFSET + LOAD_PHYSICAL_ADDR;
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phys_startup_32 = ABSOLUTE(startup_32 - LOAD_OFFSET);
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#else
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. = __START_KERNEL;
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phys_startup_64 = ABSOLUTE(startup_64 - LOAD_OFFSET);
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#endif
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/* Text and read-only data */
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.text : AT(ADDR(.text) - LOAD_OFFSET) {
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_text = .;
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_stext = .;
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/* bootstrapping code */
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HEAD_TEXT
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. = ALIGN(8);
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TEXT_TEXT
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SCHED_TEXT
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CPUIDLE_TEXT
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LOCK_TEXT
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KPROBES_TEXT
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ALIGN_ENTRY_TEXT_BEGIN
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ENTRY_TEXT
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IRQENTRY_TEXT
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ALIGN_ENTRY_TEXT_END
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SOFTIRQENTRY_TEXT
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*(.fixup)
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*(.gnu.warning)
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#ifdef CONFIG_X86_64
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. = ALIGN(PAGE_SIZE);
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VMLINUX_SYMBOL(__entry_trampoline_start) = .;
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_entry_trampoline = .;
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*(.entry_trampoline)
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. = ALIGN(PAGE_SIZE);
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VMLINUX_SYMBOL(__entry_trampoline_end) = .;
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ASSERT(. - _entry_trampoline == PAGE_SIZE, "entry trampoline is too big");
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#endif
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#ifdef CONFIG_RETPOLINE
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__indirect_thunk_start = .;
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*(.text.__x86.indirect_thunk)
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__indirect_thunk_end = .;
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#endif
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/* End of text section */
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_etext = .;
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} :text = 0x9090
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NOTES :text :note
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EXCEPTION_TABLE(16) :text = 0x9090
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/* .text should occupy whole number of pages */
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. = ALIGN(PAGE_SIZE);
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X64_ALIGN_RODATA_BEGIN
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RO_DATA(PAGE_SIZE)
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X64_ALIGN_RODATA_END
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/* Data */
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.data : AT(ADDR(.data) - LOAD_OFFSET) {
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/* Start of data section */
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_sdata = .;
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/* init_task */
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INIT_TASK_DATA(THREAD_SIZE)
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#ifdef CONFIG_X86_32
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/* 32 bit has nosave before _edata */
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NOSAVE_DATA
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#endif
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PAGE_ALIGNED_DATA(PAGE_SIZE)
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CACHELINE_ALIGNED_DATA(L1_CACHE_BYTES)
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DATA_DATA
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CONSTRUCTORS
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/* rarely changed data like cpu maps */
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READ_MOSTLY_DATA(INTERNODE_CACHE_BYTES)
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/* End of data section */
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_edata = .;
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} :data
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BUG_TABLE
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ORC_UNWIND_TABLE
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. = ALIGN(PAGE_SIZE);
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__vvar_page = .;
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.vvar : AT(ADDR(.vvar) - LOAD_OFFSET) {
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/* work around gold bug 13023 */
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__vvar_beginning_hack = .;
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/* Place all vvars at the offsets in asm/vvar.h. */
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#define EMIT_VVAR(name, offset) \
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. = __vvar_beginning_hack + offset; \
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*(.vvar_ ## name)
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#define __VVAR_KERNEL_LDS
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#include <asm/vvar.h>
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#undef __VVAR_KERNEL_LDS
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#undef EMIT_VVAR
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/*
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* Pad the rest of the page with zeros. Otherwise the loader
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* can leave garbage here.
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*/
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. = __vvar_beginning_hack + PAGE_SIZE;
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} :data
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. = ALIGN(__vvar_page + PAGE_SIZE, PAGE_SIZE);
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/* Init code and data - will be freed after init */
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. = ALIGN(PAGE_SIZE);
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.init.begin : AT(ADDR(.init.begin) - LOAD_OFFSET) {
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__init_begin = .; /* paired with __init_end */
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}
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#if defined(CONFIG_X86_64) && defined(CONFIG_SMP)
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/*
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* percpu offsets are zero-based on SMP. PERCPU_VADDR() changes the
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* output PHDR, so the next output section - .init.text - should
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* start another segment - init.
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*/
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PERCPU_VADDR(INTERNODE_CACHE_BYTES, 0, :percpu)
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ASSERT(SIZEOF(.data..percpu) < CONFIG_PHYSICAL_START,
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"per-CPU data too large - increase CONFIG_PHYSICAL_START")
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#endif
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INIT_TEXT_SECTION(PAGE_SIZE)
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#ifdef CONFIG_X86_64
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:init
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#endif
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/*
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* Section for code used exclusively before alternatives are run. All
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* references to such code must be patched out by alternatives, normally
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* by using X86_FEATURE_ALWAYS CPU feature bit.
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*
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* See static_cpu_has() for an example.
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*/
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.altinstr_aux : AT(ADDR(.altinstr_aux) - LOAD_OFFSET) {
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*(.altinstr_aux)
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}
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INIT_DATA_SECTION(16)
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.x86_cpu_dev.init : AT(ADDR(.x86_cpu_dev.init) - LOAD_OFFSET) {
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__x86_cpu_dev_start = .;
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*(.x86_cpu_dev.init)
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__x86_cpu_dev_end = .;
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}
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#ifdef CONFIG_X86_INTEL_MID
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.x86_intel_mid_dev.init : AT(ADDR(.x86_intel_mid_dev.init) - \
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LOAD_OFFSET) {
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__x86_intel_mid_dev_start = .;
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*(.x86_intel_mid_dev.init)
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__x86_intel_mid_dev_end = .;
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}
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#endif
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/*
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* start address and size of operations which during runtime
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* can be patched with virtualization friendly instructions or
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* baremetal native ones. Think page table operations.
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* Details in paravirt_types.h
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*/
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. = ALIGN(8);
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.parainstructions : AT(ADDR(.parainstructions) - LOAD_OFFSET) {
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__parainstructions = .;
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*(.parainstructions)
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__parainstructions_end = .;
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}
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/*
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* struct alt_inst entries. From the header (alternative.h):
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* "Alternative instructions for different CPU types or capabilities"
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* Think locking instructions on spinlocks.
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*/
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. = ALIGN(8);
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.altinstructions : AT(ADDR(.altinstructions) - LOAD_OFFSET) {
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__alt_instructions = .;
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*(.altinstructions)
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__alt_instructions_end = .;
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}
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/*
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* And here are the replacement instructions. The linker sticks
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* them as binary blobs. The .altinstructions has enough data to
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* get the address and the length of them to patch the kernel safely.
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*/
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.altinstr_replacement : AT(ADDR(.altinstr_replacement) - LOAD_OFFSET) {
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*(.altinstr_replacement)
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}
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/*
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* struct iommu_table_entry entries are injected in this section.
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* It is an array of IOMMUs which during run time gets sorted depending
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* on its dependency order. After rootfs_initcall is complete
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* this section can be safely removed.
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*/
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.iommu_table : AT(ADDR(.iommu_table) - LOAD_OFFSET) {
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__iommu_table = .;
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*(.iommu_table)
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__iommu_table_end = .;
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}
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. = ALIGN(8);
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.apicdrivers : AT(ADDR(.apicdrivers) - LOAD_OFFSET) {
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__apicdrivers = .;
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*(.apicdrivers);
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__apicdrivers_end = .;
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}
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. = ALIGN(8);
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/*
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* .exit.text is discard at runtime, not link time, to deal with
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* references from .altinstructions and .eh_frame
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*/
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.exit.text : AT(ADDR(.exit.text) - LOAD_OFFSET) {
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EXIT_TEXT
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}
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.exit.data : AT(ADDR(.exit.data) - LOAD_OFFSET) {
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EXIT_DATA
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}
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#if !defined(CONFIG_X86_64) || !defined(CONFIG_SMP)
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PERCPU_SECTION(INTERNODE_CACHE_BYTES)
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#endif
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. = ALIGN(PAGE_SIZE);
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/* freed after init ends here */
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.init.end : AT(ADDR(.init.end) - LOAD_OFFSET) {
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__init_end = .;
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}
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/*
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* smp_locks might be freed after init
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* start/end must be page aligned
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*/
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. = ALIGN(PAGE_SIZE);
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.smp_locks : AT(ADDR(.smp_locks) - LOAD_OFFSET) {
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__smp_locks = .;
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*(.smp_locks)
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. = ALIGN(PAGE_SIZE);
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__smp_locks_end = .;
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}
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#ifdef CONFIG_X86_64
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.data_nosave : AT(ADDR(.data_nosave) - LOAD_OFFSET) {
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NOSAVE_DATA
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}
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#endif
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/* BSS */
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. = ALIGN(PAGE_SIZE);
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.bss : AT(ADDR(.bss) - LOAD_OFFSET) {
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__bss_start = .;
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*(.bss..page_aligned)
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*(.bss)
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. = ALIGN(PAGE_SIZE);
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__bss_stop = .;
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}
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. = ALIGN(PAGE_SIZE);
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.brk : AT(ADDR(.brk) - LOAD_OFFSET) {
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__brk_base = .;
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. += 64 * 1024; /* 64k alignment slop space */
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*(.brk_reservation) /* areas brk users have reserved */
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__brk_limit = .;
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}
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. = ALIGN(PAGE_SIZE); /* keep VO_INIT_SIZE page aligned */
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_end = .;
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STABS_DEBUG
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DWARF_DEBUG
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/* Sections to be discarded */
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DISCARDS
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/DISCARD/ : {
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*(.eh_frame)
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}
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}
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#ifdef CONFIG_X86_32
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/*
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* The ASSERT() sink to . is intentional, for binutils 2.14 compatibility:
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*/
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. = ASSERT((_end - LOAD_OFFSET <= KERNEL_IMAGE_SIZE),
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"kernel image bigger than KERNEL_IMAGE_SIZE");
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#else
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/*
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* Per-cpu symbols which need to be offset from __per_cpu_load
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* for the boot processor.
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*/
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#define INIT_PER_CPU(x) init_per_cpu__##x = x + __per_cpu_load
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INIT_PER_CPU(gdt_page);
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INIT_PER_CPU(irq_stack_union);
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/*
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* Build-time check on the image size:
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*/
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. = ASSERT((_end - _text <= KERNEL_IMAGE_SIZE),
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"kernel image bigger than KERNEL_IMAGE_SIZE");
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#ifdef CONFIG_SMP
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. = ASSERT((irq_stack_union == 0),
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"irq_stack_union is not at start of per-cpu area");
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#endif
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#endif /* CONFIG_X86_32 */
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#ifdef CONFIG_KEXEC_CORE
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#include <asm/kexec.h>
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. = ASSERT(kexec_control_code_size <= KEXEC_CONTROL_CODE_MAX_SIZE,
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"kexec control code size is too big");
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#endif
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