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The context switch code in the kernel issues a dummy stwcx. to clear the reservation, as recommended by the architecture. However, some processors can have issues if this stwcx to address A occurs while the reservation is already held to a different address B. To avoid this problem, the dummy stwcx. needs to be paired with a dummy lwarx to the same address. This adds the dummy lwarx, and creates a cpu feature bit to indicate which cpus are affected. Tested on mpc8641_hpcn_defconfig in arch/powerpc; build tested in arch/ppc. Signed-off-by: Becky Bruce <becky.bruce@freescale.com> Signed-off-by: Paul Mackerras <paulus@samba.org> |
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4xx_io | ||
8xx_io | ||
8260_io | ||
boot | ||
configs | ||
kernel | ||
lib | ||
mm | ||
platforms | ||
syslib | ||
xmon | ||
.gitignore | ||
Kconfig | ||
Kconfig.debug | ||
Makefile |