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b3fdd32799
Based on i2c-mux-gpio driver, similarly the register-based mux switch from one bus to another by setting a single register. The register can be on PCIe bus, local bus, or any memory-mapped address. The endianness of such register can be specified in device tree if used, or in platform data. Signed-off-by: York Sun <yorksun@freescale.com> Acked-by: Alexander Sverdlin <alexander.sverdlin@nokia.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
75 lines
2.4 KiB
Plaintext
75 lines
2.4 KiB
Plaintext
Register-based I2C Bus Mux
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This binding describes an I2C bus multiplexer that uses a single register
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to route the I2C signals.
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Required properties:
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- compatible: i2c-mux-reg
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- i2c-parent: The phandle of the I2C bus that this multiplexer's master-side
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port is connected to.
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* Standard I2C mux properties. See mux.txt in this directory.
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* I2C child bus nodes. See mux.txt in this directory.
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Optional properties:
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- reg: this pair of <offset size> specifies the register to control the mux.
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The <offset size> depends on its parent node. It can be any memory-mapped
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address. The size must be either 1, 2, or 4 bytes. If reg is omitted, the
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resource of this device will be used.
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- little-endian: The existence indicates the register is in little endian.
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- big-endian: The existence indicates the register is in big endian.
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If both little-endian and big-endian are omitted, the endianness of the
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CPU will be used.
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- write-only: The existence indicates the register is write-only.
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- idle-state: value to set the muxer to when idle. When no value is
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given, it defaults to the last value used.
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Whenever an access is made to a device on a child bus, the value set
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in the revelant node's reg property will be output to the register.
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If an idle state is defined, using the idle-state (optional) property,
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whenever an access is not being made to a device on a child bus, the
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register will be set according to the idle value.
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If an idle state is not defined, the most recently used value will be
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left programmed into the register.
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Example of a mux on PCIe card, the host is a powerpc SoC (big endian):
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i2c-mux {
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/* the <offset size> depends on the address translation
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* of the parent device. If omitted, device resource
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* will be used instead. The size is to determine
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* whether iowrite32, iowrite16, or iowrite8 will be used.
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*/
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reg = <0x6028 0x4>;
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little-endian; /* little endian register on PCIe */
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compatible = "i2c-mux-reg";
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#address-cells = <1>;
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#size-cells = <0>;
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i2c-parent = <&i2c1>;
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i2c@0 {
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <0>;
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si5338: clock-generator@70 {
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compatible = "silabs,si5338";
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reg = <0x70>;
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/* other stuff */
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};
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};
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i2c@1 {
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/* data is written using iowrite32 */
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reg = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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si5338: clock-generator@70 {
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compatible = "silabs,si5338";
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reg = <0x70>;
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/* other stuff */
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};
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};
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};
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