Michael Turquette b572b5f821 - clock phase setting capability for the rk3288 mmc clocks ... - pll init to allow syncing to actual rate table values - some more exported clocks - fixes for some clocks (typos etc) all of them not yet used in actual drivers -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQEcBAABCAAGBQJUd7jIAAoJEPOmecmc0R2BrOkIAJpMe0tqHxtcN1fBSS2rS3/b bgcu37WfGXt1FkBkGPyoVfy0m6tQ9hHx07o62IowVvaWzmvoQppLmC20+y6gKVMj nVGlhbfhZ3bDJBbsbWAyzQvH+fJx+pOTIGQJCCNX/aixSYnfvda/FP0u7EVrY4W/ mF/b5mPmHhah9EeyuAwy4eAT5xCCER5DqR9eryObDwj3N9cUluM9BiK1JWXXWdYt i/p3NS+MEjFG2KrLB+Rzu39yFRsjF8IOBKuYNh752NVcsNy2CuxqbDSpn8NM2niW bxW07X5J8JSpecpuzJmkuOomauE+4pKXMM3W+XL+XO8iF3h9inXXp0nzX31cQRI= =st2A -----END PGP SIGNATURE----- Merge tag 'v3.19-rockchip-clk2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into clk-next - clock phase setting capability for the rk3288 mmc clocks - pll init to allow syncing to actual rate table values - some more exported clocks - fixes for some clocks (typos etc) all of them not yet used in actual drivers		2014-11-28 21:00:16 -08:00
..
clk-cpu.c	clk: rockchip: add new clock-type for the cpuclk	2014-09-27 17:57:41 +02:00
clk-mmc-phase.c	clk: rockchip: Add support for the mmc clock phases using the framework	2014-11-28 00:44:24 +01:00
clk-pll.c	clk: rockchip: add optional sync to pll rate parameters	2014-11-25 09:57:18 +01:00
clk-rk3188.c	clk: rockchip: add ROCKCHIP_PLL_SYNC_RATE flag to some plls	2014-11-25 09:57:22 +01:00
clk-rk3288.c	clk: rockchip: Add support for the mmc clock phases using the framework	2014-11-28 00:44:24 +01:00
clk-rockchip.c
clk.c	- clock phase setting capability for the rk3288 mmc clocks	2014-11-28 21:00:16 -08:00
clk.h	clk: rockchip: Add support for the mmc clock phases using the framework	2014-11-28 00:44:24 +01:00
Makefile	clk: rockchip: Add support for the mmc clock phases using the framework	2014-11-28 00:44:24 +01:00
softrst.c	clk: rockchip: add reset controller	2014-07-13 12:17:07 -07:00