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09f5100a59
The ath79_wdt driver uses a fixed memory address currently. Although this is working with each currently supported SoCs, but this may change in the future. Additionally, the driver includes platform specific header files in order to be able to get the memory base of the watchdog device. The patch adds a memory resource to the platform device, and converts the driver to get the base address of the watchdog device from that. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
116 lines
2.8 KiB
C
116 lines
2.8 KiB
C
/*
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* Atheros AR71XX/AR724X/AR913X common devices
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*
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* Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org>
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* Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
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*
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* Parts of this file are based on Atheros' 2.6.15 BSP
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/serial_8250.h>
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#include <linux/clk.h>
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#include <linux/err.h>
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#include <asm/mach-ath79/ath79.h>
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#include <asm/mach-ath79/ar71xx_regs.h>
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#include <asm/mach-ath79/ar933x_uart_platform.h>
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#include "common.h"
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#include "dev-common.h"
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static struct resource ath79_uart_resources[] = {
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{
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.start = AR71XX_UART_BASE,
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.end = AR71XX_UART_BASE + AR71XX_UART_SIZE - 1,
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.flags = IORESOURCE_MEM,
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},
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};
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#define AR71XX_UART_FLAGS (UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP)
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static struct plat_serial8250_port ath79_uart_data[] = {
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{
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.mapbase = AR71XX_UART_BASE,
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.irq = ATH79_MISC_IRQ_UART,
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.flags = AR71XX_UART_FLAGS,
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.iotype = UPIO_MEM32,
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.regshift = 2,
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}, {
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/* terminating entry */
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}
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};
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static struct platform_device ath79_uart_device = {
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.name = "serial8250",
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.id = PLAT8250_DEV_PLATFORM,
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.resource = ath79_uart_resources,
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.num_resources = ARRAY_SIZE(ath79_uart_resources),
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.dev = {
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.platform_data = ath79_uart_data
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},
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};
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static struct resource ar933x_uart_resources[] = {
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{
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.start = AR933X_UART_BASE,
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.end = AR933X_UART_BASE + AR71XX_UART_SIZE - 1,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = ATH79_MISC_IRQ_UART,
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.end = ATH79_MISC_IRQ_UART,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct ar933x_uart_platform_data ar933x_uart_data;
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static struct platform_device ar933x_uart_device = {
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.name = "ar933x-uart",
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.id = -1,
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.resource = ar933x_uart_resources,
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.num_resources = ARRAY_SIZE(ar933x_uart_resources),
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.dev = {
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.platform_data = &ar933x_uart_data,
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},
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};
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void __init ath79_register_uart(void)
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{
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struct clk *clk;
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clk = clk_get(NULL, "uart");
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if (IS_ERR(clk))
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panic("unable to get UART clock, err=%ld", PTR_ERR(clk));
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if (soc_is_ar71xx() ||
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soc_is_ar724x() ||
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soc_is_ar913x() ||
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soc_is_ar934x()) {
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ath79_uart_data[0].uartclk = clk_get_rate(clk);
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platform_device_register(&ath79_uart_device);
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} else if (soc_is_ar933x()) {
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ar933x_uart_data.uartclk = clk_get_rate(clk);
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platform_device_register(&ar933x_uart_device);
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} else {
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BUG();
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}
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}
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void __init ath79_register_wdt(void)
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{
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struct resource res;
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memset(&res, 0, sizeof(res));
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res.flags = IORESOURCE_MEM;
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res.start = AR71XX_RESET_BASE + AR71XX_RESET_REG_WDOG_CTRL;
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res.end = res.start + 0x8 - 1;
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platform_device_register_simple("ath79-wdt", -1, &res, 1);
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}
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