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9eec31f310
DS3232 RTC has 236 bytes of persistent memory. Add RTC SRAM read and write access using the NVMEM Framework. Signed-off-by: Han Nandor <nandor.han@vaisala.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
772 lines
17 KiB
C
772 lines
17 KiB
C
/*
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* RTC client/driver for the Maxim/Dallas DS3232/DS3234 Real-Time Clock
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*
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* Copyright (C) 2009-2011 Freescale Semiconductor.
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* Author: Jack Lan <jack.lan@freescale.com>
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* Copyright (C) 2008 MIMOMax Wireless Ltd.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/interrupt.h>
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#include <linux/i2c.h>
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#include <linux/spi/spi.h>
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#include <linux/rtc.h>
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#include <linux/bcd.h>
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#include <linux/slab.h>
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#include <linux/regmap.h>
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#include <linux/hwmon.h>
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#define DS3232_REG_SECONDS 0x00
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#define DS3232_REG_MINUTES 0x01
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#define DS3232_REG_HOURS 0x02
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#define DS3232_REG_AMPM 0x02
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#define DS3232_REG_DAY 0x03
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#define DS3232_REG_DATE 0x04
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#define DS3232_REG_MONTH 0x05
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#define DS3232_REG_CENTURY 0x05
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#define DS3232_REG_YEAR 0x06
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#define DS3232_REG_ALARM1 0x07 /* Alarm 1 BASE */
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#define DS3232_REG_ALARM2 0x0B /* Alarm 2 BASE */
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#define DS3232_REG_CR 0x0E /* Control register */
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# define DS3232_REG_CR_nEOSC 0x80
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# define DS3232_REG_CR_INTCN 0x04
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# define DS3232_REG_CR_A2IE 0x02
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# define DS3232_REG_CR_A1IE 0x01
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#define DS3232_REG_SR 0x0F /* control/status register */
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# define DS3232_REG_SR_OSF 0x80
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# define DS3232_REG_SR_BSY 0x04
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# define DS3232_REG_SR_A2F 0x02
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# define DS3232_REG_SR_A1F 0x01
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#define DS3232_REG_TEMPERATURE 0x11
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#define DS3232_REG_SRAM_START 0x14
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#define DS3232_REG_SRAM_END 0xFF
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#define DS3232_REG_SRAM_SIZE 236
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struct ds3232 {
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struct device *dev;
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struct regmap *regmap;
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int irq;
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struct rtc_device *rtc;
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bool suspended;
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};
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static int ds3232_check_rtc_status(struct device *dev)
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{
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struct ds3232 *ds3232 = dev_get_drvdata(dev);
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int ret = 0;
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int control, stat;
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ret = regmap_read(ds3232->regmap, DS3232_REG_SR, &stat);
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if (ret)
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return ret;
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if (stat & DS3232_REG_SR_OSF)
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dev_warn(dev,
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"oscillator discontinuity flagged, "
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"time unreliable\n");
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stat &= ~(DS3232_REG_SR_OSF | DS3232_REG_SR_A1F | DS3232_REG_SR_A2F);
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ret = regmap_write(ds3232->regmap, DS3232_REG_SR, stat);
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if (ret)
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return ret;
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/* If the alarm is pending, clear it before requesting
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* the interrupt, so an interrupt event isn't reported
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* before everything is initialized.
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*/
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ret = regmap_read(ds3232->regmap, DS3232_REG_CR, &control);
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if (ret)
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return ret;
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control &= ~(DS3232_REG_CR_A1IE | DS3232_REG_CR_A2IE);
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control |= DS3232_REG_CR_INTCN;
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return regmap_write(ds3232->regmap, DS3232_REG_CR, control);
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}
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static int ds3232_read_time(struct device *dev, struct rtc_time *time)
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{
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struct ds3232 *ds3232 = dev_get_drvdata(dev);
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int ret;
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u8 buf[7];
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unsigned int year, month, day, hour, minute, second;
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unsigned int week, twelve_hr, am_pm;
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unsigned int century, add_century = 0;
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ret = regmap_bulk_read(ds3232->regmap, DS3232_REG_SECONDS, buf, 7);
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if (ret)
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return ret;
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second = buf[0];
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minute = buf[1];
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hour = buf[2];
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week = buf[3];
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day = buf[4];
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month = buf[5];
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year = buf[6];
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/* Extract additional information for AM/PM and century */
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twelve_hr = hour & 0x40;
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am_pm = hour & 0x20;
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century = month & 0x80;
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/* Write to rtc_time structure */
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time->tm_sec = bcd2bin(second);
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time->tm_min = bcd2bin(minute);
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if (twelve_hr) {
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/* Convert to 24 hr */
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if (am_pm)
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time->tm_hour = bcd2bin(hour & 0x1F) + 12;
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else
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time->tm_hour = bcd2bin(hour & 0x1F);
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} else {
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time->tm_hour = bcd2bin(hour);
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}
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/* Day of the week in linux range is 0~6 while 1~7 in RTC chip */
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time->tm_wday = bcd2bin(week) - 1;
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time->tm_mday = bcd2bin(day);
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/* linux tm_mon range:0~11, while month range is 1~12 in RTC chip */
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time->tm_mon = bcd2bin(month & 0x7F) - 1;
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if (century)
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add_century = 100;
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time->tm_year = bcd2bin(year) + add_century;
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return 0;
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}
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static int ds3232_set_time(struct device *dev, struct rtc_time *time)
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{
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struct ds3232 *ds3232 = dev_get_drvdata(dev);
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u8 buf[7];
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/* Extract time from rtc_time and load into ds3232*/
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buf[0] = bin2bcd(time->tm_sec);
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buf[1] = bin2bcd(time->tm_min);
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buf[2] = bin2bcd(time->tm_hour);
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/* Day of the week in linux range is 0~6 while 1~7 in RTC chip */
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buf[3] = bin2bcd(time->tm_wday + 1);
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buf[4] = bin2bcd(time->tm_mday); /* Date */
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/* linux tm_mon range:0~11, while month range is 1~12 in RTC chip */
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buf[5] = bin2bcd(time->tm_mon + 1);
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if (time->tm_year >= 100) {
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buf[5] |= 0x80;
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buf[6] = bin2bcd(time->tm_year - 100);
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} else {
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buf[6] = bin2bcd(time->tm_year);
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}
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return regmap_bulk_write(ds3232->regmap, DS3232_REG_SECONDS, buf, 7);
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}
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/*
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* DS3232 has two alarm, we only use alarm1
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* According to linux specification, only support one-shot alarm
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* no periodic alarm mode
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*/
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static int ds3232_read_alarm(struct device *dev, struct rtc_wkalrm *alarm)
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{
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struct ds3232 *ds3232 = dev_get_drvdata(dev);
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int control, stat;
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int ret;
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u8 buf[4];
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ret = regmap_read(ds3232->regmap, DS3232_REG_SR, &stat);
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if (ret)
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goto out;
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ret = regmap_read(ds3232->regmap, DS3232_REG_CR, &control);
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if (ret)
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goto out;
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ret = regmap_bulk_read(ds3232->regmap, DS3232_REG_ALARM1, buf, 4);
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if (ret)
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goto out;
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alarm->time.tm_sec = bcd2bin(buf[0] & 0x7F);
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alarm->time.tm_min = bcd2bin(buf[1] & 0x7F);
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alarm->time.tm_hour = bcd2bin(buf[2] & 0x7F);
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alarm->time.tm_mday = bcd2bin(buf[3] & 0x7F);
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alarm->enabled = !!(control & DS3232_REG_CR_A1IE);
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alarm->pending = !!(stat & DS3232_REG_SR_A1F);
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ret = 0;
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out:
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return ret;
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}
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/*
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* linux rtc-module does not support wday alarm
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* and only 24h time mode supported indeed
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*/
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static int ds3232_set_alarm(struct device *dev, struct rtc_wkalrm *alarm)
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{
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struct ds3232 *ds3232 = dev_get_drvdata(dev);
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int control, stat;
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int ret;
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u8 buf[4];
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if (ds3232->irq <= 0)
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return -EINVAL;
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buf[0] = bin2bcd(alarm->time.tm_sec);
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buf[1] = bin2bcd(alarm->time.tm_min);
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buf[2] = bin2bcd(alarm->time.tm_hour);
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buf[3] = bin2bcd(alarm->time.tm_mday);
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/* clear alarm interrupt enable bit */
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ret = regmap_read(ds3232->regmap, DS3232_REG_CR, &control);
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if (ret)
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goto out;
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control &= ~(DS3232_REG_CR_A1IE | DS3232_REG_CR_A2IE);
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ret = regmap_write(ds3232->regmap, DS3232_REG_CR, control);
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if (ret)
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goto out;
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/* clear any pending alarm flag */
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ret = regmap_read(ds3232->regmap, DS3232_REG_SR, &stat);
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if (ret)
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goto out;
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stat &= ~(DS3232_REG_SR_A1F | DS3232_REG_SR_A2F);
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ret = regmap_write(ds3232->regmap, DS3232_REG_SR, stat);
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if (ret)
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goto out;
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ret = regmap_bulk_write(ds3232->regmap, DS3232_REG_ALARM1, buf, 4);
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if (ret)
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goto out;
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if (alarm->enabled) {
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control |= DS3232_REG_CR_A1IE;
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ret = regmap_write(ds3232->regmap, DS3232_REG_CR, control);
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}
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out:
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return ret;
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}
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static int ds3232_update_alarm(struct device *dev, unsigned int enabled)
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{
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struct ds3232 *ds3232 = dev_get_drvdata(dev);
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int control;
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int ret;
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ret = regmap_read(ds3232->regmap, DS3232_REG_CR, &control);
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if (ret)
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return ret;
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if (enabled)
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/* enable alarm1 interrupt */
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control |= DS3232_REG_CR_A1IE;
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else
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/* disable alarm1 interrupt */
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control &= ~(DS3232_REG_CR_A1IE);
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ret = regmap_write(ds3232->regmap, DS3232_REG_CR, control);
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return ret;
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}
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/*
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* Temperature sensor support for ds3232/ds3234 devices.
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* A user-initiated temperature conversion is not started by this function,
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* so the temperature is updated once every 64 seconds.
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*/
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static int ds3232_hwmon_read_temp(struct device *dev, long int *mC)
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{
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struct ds3232 *ds3232 = dev_get_drvdata(dev);
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u8 temp_buf[2];
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s16 temp;
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int ret;
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ret = regmap_bulk_read(ds3232->regmap, DS3232_REG_TEMPERATURE, temp_buf,
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sizeof(temp_buf));
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if (ret < 0)
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return ret;
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/*
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* Temperature is represented as a 10-bit code with a resolution of
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* 0.25 degree celsius and encoded in two's complement format.
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*/
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temp = (temp_buf[0] << 8) | temp_buf[1];
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temp >>= 6;
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*mC = temp * 250;
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return 0;
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}
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static umode_t ds3232_hwmon_is_visible(const void *data,
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enum hwmon_sensor_types type,
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u32 attr, int channel)
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{
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if (type != hwmon_temp)
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return 0;
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switch (attr) {
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case hwmon_temp_input:
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return 0444;
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default:
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return 0;
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}
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}
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static int ds3232_hwmon_read(struct device *dev,
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enum hwmon_sensor_types type,
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u32 attr, int channel, long *temp)
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{
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int err;
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switch (attr) {
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case hwmon_temp_input:
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err = ds3232_hwmon_read_temp(dev, temp);
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break;
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default:
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err = -EOPNOTSUPP;
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break;
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}
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return err;
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}
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static u32 ds3232_hwmon_chip_config[] = {
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HWMON_C_REGISTER_TZ,
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0
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};
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static const struct hwmon_channel_info ds3232_hwmon_chip = {
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.type = hwmon_chip,
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.config = ds3232_hwmon_chip_config,
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};
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static u32 ds3232_hwmon_temp_config[] = {
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HWMON_T_INPUT,
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0
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};
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static const struct hwmon_channel_info ds3232_hwmon_temp = {
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.type = hwmon_temp,
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.config = ds3232_hwmon_temp_config,
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};
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static const struct hwmon_channel_info *ds3232_hwmon_info[] = {
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&ds3232_hwmon_chip,
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&ds3232_hwmon_temp,
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NULL
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};
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static const struct hwmon_ops ds3232_hwmon_hwmon_ops = {
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.is_visible = ds3232_hwmon_is_visible,
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.read = ds3232_hwmon_read,
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};
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static const struct hwmon_chip_info ds3232_hwmon_chip_info = {
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.ops = &ds3232_hwmon_hwmon_ops,
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.info = ds3232_hwmon_info,
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};
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static void ds3232_hwmon_register(struct device *dev, const char *name)
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{
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struct ds3232 *ds3232 = dev_get_drvdata(dev);
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struct device *hwmon_dev;
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if (!IS_ENABLED(CONFIG_RTC_DRV_DS3232_HWMON))
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return;
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hwmon_dev = devm_hwmon_device_register_with_info(dev, name, ds3232,
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&ds3232_hwmon_chip_info,
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NULL);
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if (IS_ERR(hwmon_dev)) {
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dev_err(dev, "unable to register hwmon device %ld\n",
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PTR_ERR(hwmon_dev));
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}
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}
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static int ds3232_alarm_irq_enable(struct device *dev, unsigned int enabled)
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{
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struct ds3232 *ds3232 = dev_get_drvdata(dev);
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if (ds3232->irq <= 0)
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return -EINVAL;
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return ds3232_update_alarm(dev, enabled);
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}
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static irqreturn_t ds3232_irq(int irq, void *dev_id)
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{
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struct device *dev = dev_id;
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struct ds3232 *ds3232 = dev_get_drvdata(dev);
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struct mutex *lock = &ds3232->rtc->ops_lock;
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int ret;
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int stat, control;
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mutex_lock(lock);
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ret = regmap_read(ds3232->regmap, DS3232_REG_SR, &stat);
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if (ret)
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goto unlock;
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if (stat & DS3232_REG_SR_A1F) {
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ret = regmap_read(ds3232->regmap, DS3232_REG_CR, &control);
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if (ret) {
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dev_warn(ds3232->dev,
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"Read Control Register error %d\n", ret);
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} else {
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/* disable alarm1 interrupt */
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control &= ~(DS3232_REG_CR_A1IE);
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ret = regmap_write(ds3232->regmap, DS3232_REG_CR,
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control);
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if (ret) {
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dev_warn(ds3232->dev,
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"Write Control Register error %d\n",
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ret);
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goto unlock;
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}
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/* clear the alarm pend flag */
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stat &= ~DS3232_REG_SR_A1F;
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ret = regmap_write(ds3232->regmap, DS3232_REG_SR, stat);
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if (ret) {
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dev_warn(ds3232->dev,
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"Write Status Register error %d\n",
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ret);
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goto unlock;
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}
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rtc_update_irq(ds3232->rtc, 1, RTC_AF | RTC_IRQF);
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}
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}
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unlock:
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mutex_unlock(lock);
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return IRQ_HANDLED;
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}
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static const struct rtc_class_ops ds3232_rtc_ops = {
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.read_time = ds3232_read_time,
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.set_time = ds3232_set_time,
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.read_alarm = ds3232_read_alarm,
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.set_alarm = ds3232_set_alarm,
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.alarm_irq_enable = ds3232_alarm_irq_enable,
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};
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static int ds3232_nvmem_read(void *priv, unsigned int offset, void *val,
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size_t bytes)
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{
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struct regmap *ds3232_regmap = (struct regmap *)priv;
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return regmap_bulk_read(ds3232_regmap, DS3232_REG_SRAM_START + offset,
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val, bytes);
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}
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static int ds3232_nvmem_write(void *priv, unsigned int offset, void *val,
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size_t bytes)
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{
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struct regmap *ds3232_regmap = (struct regmap *)priv;
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return regmap_bulk_write(ds3232_regmap, DS3232_REG_SRAM_START + offset,
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val, bytes);
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}
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static int ds3232_probe(struct device *dev, struct regmap *regmap, int irq,
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const char *name)
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{
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struct ds3232 *ds3232;
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int ret;
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struct nvmem_config nvmem_cfg = {
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.name = "ds3232_sram",
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.stride = 1,
|
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.size = DS3232_REG_SRAM_SIZE,
|
|
.word_size = 1,
|
|
.reg_read = ds3232_nvmem_read,
|
|
.reg_write = ds3232_nvmem_write,
|
|
.priv = regmap,
|
|
.type = NVMEM_TYPE_BATTERY_BACKED
|
|
};
|
|
|
|
ds3232 = devm_kzalloc(dev, sizeof(*ds3232), GFP_KERNEL);
|
|
if (!ds3232)
|
|
return -ENOMEM;
|
|
|
|
ds3232->regmap = regmap;
|
|
ds3232->irq = irq;
|
|
ds3232->dev = dev;
|
|
dev_set_drvdata(dev, ds3232);
|
|
|
|
ret = ds3232_check_rtc_status(dev);
|
|
if (ret)
|
|
return ret;
|
|
|
|
if (ds3232->irq > 0)
|
|
device_init_wakeup(dev, 1);
|
|
|
|
ds3232_hwmon_register(dev, name);
|
|
|
|
ds3232->rtc = devm_rtc_device_register(dev, name, &ds3232_rtc_ops,
|
|
THIS_MODULE);
|
|
if (IS_ERR(ds3232->rtc))
|
|
return PTR_ERR(ds3232->rtc);
|
|
|
|
ret = rtc_nvmem_register(ds3232->rtc, &nvmem_cfg);
|
|
if(ret)
|
|
return ret;
|
|
|
|
if (ds3232->irq > 0) {
|
|
ret = devm_request_threaded_irq(dev, ds3232->irq, NULL,
|
|
ds3232_irq,
|
|
IRQF_SHARED | IRQF_ONESHOT,
|
|
name, dev);
|
|
if (ret) {
|
|
device_set_wakeup_capable(dev, 0);
|
|
ds3232->irq = 0;
|
|
dev_err(dev, "unable to request IRQ\n");
|
|
}
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
#ifdef CONFIG_PM_SLEEP
|
|
static int ds3232_suspend(struct device *dev)
|
|
{
|
|
struct ds3232 *ds3232 = dev_get_drvdata(dev);
|
|
|
|
if (device_may_wakeup(dev)) {
|
|
if (enable_irq_wake(ds3232->irq))
|
|
dev_warn_once(dev, "Cannot set wakeup source\n");
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int ds3232_resume(struct device *dev)
|
|
{
|
|
struct ds3232 *ds3232 = dev_get_drvdata(dev);
|
|
|
|
if (device_may_wakeup(dev))
|
|
disable_irq_wake(ds3232->irq);
|
|
|
|
return 0;
|
|
}
|
|
#endif
|
|
|
|
static const struct dev_pm_ops ds3232_pm_ops = {
|
|
SET_SYSTEM_SLEEP_PM_OPS(ds3232_suspend, ds3232_resume)
|
|
};
|
|
|
|
#if IS_ENABLED(CONFIG_I2C)
|
|
|
|
static int ds3232_i2c_probe(struct i2c_client *client,
|
|
const struct i2c_device_id *id)
|
|
{
|
|
struct regmap *regmap;
|
|
static const struct regmap_config config = {
|
|
.reg_bits = 8,
|
|
.val_bits = 8,
|
|
.max_register = DS3232_REG_SRAM_END,
|
|
};
|
|
|
|
regmap = devm_regmap_init_i2c(client, &config);
|
|
if (IS_ERR(regmap)) {
|
|
dev_err(&client->dev, "%s: regmap allocation failed: %ld\n",
|
|
__func__, PTR_ERR(regmap));
|
|
return PTR_ERR(regmap);
|
|
}
|
|
|
|
return ds3232_probe(&client->dev, regmap, client->irq, client->name);
|
|
}
|
|
|
|
static const struct i2c_device_id ds3232_id[] = {
|
|
{ "ds3232", 0 },
|
|
{ }
|
|
};
|
|
MODULE_DEVICE_TABLE(i2c, ds3232_id);
|
|
|
|
static const struct of_device_id ds3232_of_match[] = {
|
|
{ .compatible = "dallas,ds3232" },
|
|
{ }
|
|
};
|
|
MODULE_DEVICE_TABLE(of, ds3232_of_match);
|
|
|
|
static struct i2c_driver ds3232_driver = {
|
|
.driver = {
|
|
.name = "rtc-ds3232",
|
|
.of_match_table = of_match_ptr(ds3232_of_match),
|
|
.pm = &ds3232_pm_ops,
|
|
},
|
|
.probe = ds3232_i2c_probe,
|
|
.id_table = ds3232_id,
|
|
};
|
|
|
|
static int ds3232_register_driver(void)
|
|
{
|
|
return i2c_add_driver(&ds3232_driver);
|
|
}
|
|
|
|
static void ds3232_unregister_driver(void)
|
|
{
|
|
i2c_del_driver(&ds3232_driver);
|
|
}
|
|
|
|
#else
|
|
|
|
static int ds3232_register_driver(void)
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
static void ds3232_unregister_driver(void)
|
|
{
|
|
}
|
|
|
|
#endif
|
|
|
|
#if IS_ENABLED(CONFIG_SPI_MASTER)
|
|
|
|
static int ds3234_probe(struct spi_device *spi)
|
|
{
|
|
int res;
|
|
unsigned int tmp;
|
|
static const struct regmap_config config = {
|
|
.reg_bits = 8,
|
|
.val_bits = 8,
|
|
.max_register = DS3232_REG_SRAM_END,
|
|
.write_flag_mask = 0x80,
|
|
};
|
|
struct regmap *regmap;
|
|
|
|
regmap = devm_regmap_init_spi(spi, &config);
|
|
if (IS_ERR(regmap)) {
|
|
dev_err(&spi->dev, "%s: regmap allocation failed: %ld\n",
|
|
__func__, PTR_ERR(regmap));
|
|
return PTR_ERR(regmap);
|
|
}
|
|
|
|
spi->mode = SPI_MODE_3;
|
|
spi->bits_per_word = 8;
|
|
spi_setup(spi);
|
|
|
|
res = regmap_read(regmap, DS3232_REG_SECONDS, &tmp);
|
|
if (res)
|
|
return res;
|
|
|
|
/* Control settings
|
|
*
|
|
* CONTROL_REG
|
|
* BIT 7 6 5 4 3 2 1 0
|
|
* EOSC BBSQW CONV RS2 RS1 INTCN A2IE A1IE
|
|
*
|
|
* 0 0 0 1 1 1 0 0
|
|
*
|
|
* CONTROL_STAT_REG
|
|
* BIT 7 6 5 4 3 2 1 0
|
|
* OSF BB32kHz CRATE1 CRATE0 EN32kHz BSY A2F A1F
|
|
*
|
|
* 1 0 0 0 1 0 0 0
|
|
*/
|
|
res = regmap_read(regmap, DS3232_REG_CR, &tmp);
|
|
if (res)
|
|
return res;
|
|
res = regmap_write(regmap, DS3232_REG_CR, tmp & 0x1c);
|
|
if (res)
|
|
return res;
|
|
|
|
res = regmap_read(regmap, DS3232_REG_SR, &tmp);
|
|
if (res)
|
|
return res;
|
|
res = regmap_write(regmap, DS3232_REG_SR, tmp & 0x88);
|
|
if (res)
|
|
return res;
|
|
|
|
/* Print our settings */
|
|
res = regmap_read(regmap, DS3232_REG_CR, &tmp);
|
|
if (res)
|
|
return res;
|
|
dev_info(&spi->dev, "Control Reg: 0x%02x\n", tmp);
|
|
|
|
res = regmap_read(regmap, DS3232_REG_SR, &tmp);
|
|
if (res)
|
|
return res;
|
|
dev_info(&spi->dev, "Ctrl/Stat Reg: 0x%02x\n", tmp);
|
|
|
|
return ds3232_probe(&spi->dev, regmap, spi->irq, "ds3234");
|
|
}
|
|
|
|
static struct spi_driver ds3234_driver = {
|
|
.driver = {
|
|
.name = "ds3234",
|
|
},
|
|
.probe = ds3234_probe,
|
|
};
|
|
|
|
static int ds3234_register_driver(void)
|
|
{
|
|
return spi_register_driver(&ds3234_driver);
|
|
}
|
|
|
|
static void ds3234_unregister_driver(void)
|
|
{
|
|
spi_unregister_driver(&ds3234_driver);
|
|
}
|
|
|
|
#else
|
|
|
|
static int ds3234_register_driver(void)
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
static void ds3234_unregister_driver(void)
|
|
{
|
|
}
|
|
|
|
#endif
|
|
|
|
static int __init ds323x_init(void)
|
|
{
|
|
int ret;
|
|
|
|
ret = ds3232_register_driver();
|
|
if (ret) {
|
|
pr_err("Failed to register ds3232 driver: %d\n", ret);
|
|
return ret;
|
|
}
|
|
|
|
ret = ds3234_register_driver();
|
|
if (ret) {
|
|
pr_err("Failed to register ds3234 driver: %d\n", ret);
|
|
ds3232_unregister_driver();
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
module_init(ds323x_init)
|
|
|
|
static void __exit ds323x_exit(void)
|
|
{
|
|
ds3234_unregister_driver();
|
|
ds3232_unregister_driver();
|
|
}
|
|
module_exit(ds323x_exit)
|
|
|
|
MODULE_AUTHOR("Srikanth Srinivasan <srikanth.srinivasan@freescale.com>");
|
|
MODULE_AUTHOR("Dennis Aberilla <denzzzhome@yahoo.com>");
|
|
MODULE_DESCRIPTION("Maxim/Dallas DS3232/DS3234 RTC Driver");
|
|
MODULE_LICENSE("GPL");
|
|
MODULE_ALIAS("spi:ds3234");
|