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This driver supports the wl1271 chipset from Texas Instruments based on the WiLink(tm) 6.0 mobile platform. Support for wl1273 should be relatively easy to add. This chipset is designed for embedded devices, with good powersaving capabilities. The wl1271 chipset is the successor of wl1251 and supports the 802.11b/g/n standards, but currently this driver supports only b/g. More information about this chipset can be found here: http://focus.ti.com/general/docs/wtbu/wtbuproductcontent.tsp?templateId=6123&navigationId=12762&contentId=29993 Signed-off-by: Luciano Coelho <luciano.coelho@nokia.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
122 lines
3.2 KiB
C
122 lines
3.2 KiB
C
/*
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* This file is part of wl1271
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*
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* Copyright (C) 1998-2009 Texas Instruments. All rights reserved.
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* Copyright (C) 2008-2009 Nokia Corporation
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*
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* Contact: Luciano Coelho <luciano.coelho@nokia.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
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* 02110-1301 USA
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*
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*/
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#ifndef __WL1271_RX_H__
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#define __WL1271_RX_H__
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#include <linux/bitops.h>
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#define WL1271_RX_MAX_RSSI -30
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#define WL1271_RX_MIN_RSSI -95
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#define WL1271_RX_ALIGN_TO 4
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#define WL1271_RX_ALIGN(len) (((len) + WL1271_RX_ALIGN_TO - 1) & \
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~(WL1271_RX_ALIGN_TO - 1))
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#define SHORT_PREAMBLE_BIT BIT(0)
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#define OFDM_RATE_BIT BIT(6)
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#define PBCC_RATE_BIT BIT(7)
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#define PLCP_HEADER_LENGTH 8
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#define RX_DESC_PACKETID_SHIFT 11
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#define RX_MAX_PACKET_ID 3
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#define NUM_RX_PKT_DESC_MOD_MASK 7
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#define WL1271_RX_RATE_UNSUPPORTED 0xFF
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#define RX_DESC_VALID_FCS 0x0001
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#define RX_DESC_MATCH_RXADDR1 0x0002
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#define RX_DESC_MCAST 0x0004
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#define RX_DESC_STAINTIM 0x0008
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#define RX_DESC_VIRTUAL_BM 0x0010
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#define RX_DESC_BCAST 0x0020
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#define RX_DESC_MATCH_SSID 0x0040
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#define RX_DESC_MATCH_BSSID 0x0080
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#define RX_DESC_ENCRYPTION_MASK 0x0300
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#define RX_DESC_MEASURMENT 0x0400
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#define RX_DESC_SEQNUM_MASK 0x1800
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#define RX_DESC_MIC_FAIL 0x2000
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#define RX_DESC_DECRYPT_FAIL 0x4000
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/*
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* RX Descriptor flags:
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*
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* Bits 0-1 - band
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* Bit 2 - STBC
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* Bit 3 - A-MPDU
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* Bit 4 - HT
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* Bits 5-7 - encryption
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*/
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#define WL1271_RX_DESC_BAND_MASK 0x03
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#define WL1271_RX_DESC_ENCRYPT_MASK 0xE0
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#define WL1271_RX_DESC_BAND_BG 0x00
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#define WL1271_RX_DESC_BAND_J 0x01
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#define WL1271_RX_DESC_BAND_A 0x02
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#define WL1271_RX_DESC_STBC BIT(2)
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#define WL1271_RX_DESC_A_MPDU BIT(3)
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#define WL1271_RX_DESC_HT BIT(4)
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#define WL1271_RX_DESC_ENCRYPT_WEP 0x20
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#define WL1271_RX_DESC_ENCRYPT_TKIP 0x40
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#define WL1271_RX_DESC_ENCRYPT_AES 0x60
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#define WL1271_RX_DESC_ENCRYPT_GEM 0x80
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/*
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* RX Descriptor status
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*
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* Bits 0-2 - status
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* Bits 3-7 - reserved
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*/
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#define WL1271_RX_DESC_STATUS_MASK 0x07
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#define WL1271_RX_DESC_SUCCESS 0x00
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#define WL1271_RX_DESC_DECRYPT_FAIL 0x01
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#define WL1271_RX_DESC_MIC_FAIL 0x02
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#define WL1271_RX_DESC_DRIVER_RX_Q_FAIL 0x03
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#define RX_MEM_BLOCK_MASK 0xFF
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#define RX_BUF_SIZE_MASK 0xFFF00
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#define RX_BUF_SIZE_SHIFT_DIV 6
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struct wl1271_rx_descriptor {
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u16 length;
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u8 status;
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u8 flags;
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u8 rate;
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u8 channel;
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s8 rssi;
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u8 snr;
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u32 timestamp;
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u8 packet_class;
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u8 process_id;
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u8 pad_len;
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u8 reserved;
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} __attribute__ ((packed));
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void wl1271_rx(struct wl1271 *wl, struct wl1271_fw_status *status);
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#endif
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