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20 lines
492 B
C
20 lines
492 B
C
#ifndef _ASM_CRIS_ARCH_CACHE_H
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#define _ASM_CRIS_ARCH_CACHE_H
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#include <asm/arch/hwregs/dma.h>
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/* A cache-line is 32 bytes. */
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#define L1_CACHE_BYTES 32
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#define L1_CACHE_SHIFT 5
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void flush_dma_list(dma_descr_data *descr);
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void flush_dma_descr(dma_descr_data *descr, int flush_buf);
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#define flush_dma_context(c) \
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flush_dma_list(phys_to_virt((c)->saved_data));
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void cris_flush_cache_range(void *buf, unsigned long len);
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void cris_flush_cache(void);
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#endif /* _ASM_CRIS_ARCH_CACHE_H */
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