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The i2c-viai2c-common.c file is used by two drivers, but is not a proper
abstraction and can get linked into both modules in the same configuration,
which results in a warning:
scripts/Makefile.build:236: drivers/i2c/busses/Makefile: i2c-viai2c-common.o is added to multiple modules: i2c-wmt i2c-zhaoxin
The other problems with this include the incorrect use of a __weak function
when both are built-in, and the fact that the "common" module is sprinked
with 'if (i2c->plat == ...)' checks that have knowledge about the differences
between the drivers using it.
Avoid the link time warning by making the common driver a proper module
with MODULE_LICENCE()/MODULE_AUTHOR() tags, and remove the __weak function
by slightly rearranging the code.
This adds a little more duplication between the two main drivers, but
those versions get more readable in the process.
Fixes: a06b80e830 ("i2c: add zhaoxin i2c controller driver")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Tested-by: Hans Hu <HansHu-oc@zhaoxin.com>
Signed-off-by: Andi Shyti <andi.shyti@kernel.org>
86 lines
2.0 KiB
C
86 lines
2.0 KiB
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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#ifndef __I2C_VIAI2C_COMMON_H_
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#define __I2C_VIAI2C_COMMON_H_
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#include <linux/delay.h>
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#include <linux/err.h>
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#include <linux/i2c.h>
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#include <linux/interrupt.h>
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/of_irq.h>
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#include <linux/platform_device.h>
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/* REG_CR Bit fields */
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#define VIAI2C_REG_CR 0x00
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#define VIAI2C_CR_ENABLE BIT(0)
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#define VIAI2C_CR_RX_END BIT(1)
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#define VIAI2C_CR_TX_END BIT(2)
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#define VIAI2C_CR_CPU_RDY BIT(3)
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#define VIAI2C_CR_END_MASK GENMASK(2, 1)
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/* REG_TCR Bit fields */
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#define VIAI2C_REG_TCR 0x02
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#define VIAI2C_TCR_HS_MODE BIT(13)
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#define VIAI2C_TCR_READ BIT(14)
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#define VIAI2C_TCR_FAST BIT(15)
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#define VIAI2C_TCR_ADDR_MASK GENMASK(6, 0)
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/* REG_CSR Bit fields */
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#define VIAI2C_REG_CSR 0x04
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#define VIAI2C_CSR_RCV_NOT_ACK BIT(0)
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#define VIAI2C_CSR_RCV_ACK_MASK BIT(0)
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#define VIAI2C_CSR_READY_MASK BIT(1)
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/* REG_ISR Bit fields */
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#define VIAI2C_REG_ISR 0x06
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#define VIAI2C_ISR_NACK_ADDR BIT(0)
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#define VIAI2C_ISR_BYTE_END BIT(1)
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#define VIAI2C_ISR_SCL_TIMEOUT BIT(2)
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#define VIAI2C_ISR_MASK_ALL GENMASK(2, 0)
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/* REG_IMR Bit fields */
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#define VIAI2C_REG_IMR 0x08
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#define VIAI2C_IMR_BYTE BIT(1)
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#define VIAI2C_IMR_ENABLE_ALL GENMASK(2, 0)
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#define VIAI2C_REG_CDR 0x0A
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#define VIAI2C_REG_TR 0x0C
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#define VIAI2C_REG_MCR 0x0E
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#define VIAI2C_TIMEOUT (msecs_to_jiffies(1000))
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enum {
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VIAI2C_PLAT_WMT,
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VIAI2C_PLAT_ZHAOXIN
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};
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enum {
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VIAI2C_BYTE_MODE,
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VIAI2C_FIFO_MODE
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};
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struct viai2c {
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struct i2c_adapter adapter;
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struct completion complete;
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struct device *dev;
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void __iomem *base;
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struct clk *clk;
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u16 tcr;
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int irq;
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u16 xfered_len;
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struct i2c_msg *msg;
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int ret;
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bool last;
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unsigned int mode;
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unsigned int platform;
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void *pltfm_priv;
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};
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int viai2c_wait_bus_not_busy(struct viai2c *i2c);
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int viai2c_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num);
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int viai2c_init(struct platform_device *pdev, struct viai2c **pi2c, int plat);
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int viai2c_irq_xfer(struct viai2c *i2c);
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#endif
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