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59e21e3d00
Signed-off-by: Borislav Petkov <bp@suse.de> Cc: Andy Lutomirski <luto@amacapital.net> Cc: Borislav Petkov <bp@alien8.de> Cc: Brian Gerst <brgerst@gmail.com> Cc: Denys Vlasenko <dvlasenk@redhat.com> Cc: Dmitry Torokhov <dmitry.torokhov@gmail.com> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Thomas Sailer <t.sailer@alumni.ethz.ch> Link: http://lkml.kernel.org/r/1459801503-15600-7-git-send-email-bp@alien8.de Signed-off-by: Ingo Molnar <mingo@kernel.org>
59 lines
1.3 KiB
C
59 lines
1.3 KiB
C
/*
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* x86 TSC related functions
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*/
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#ifndef _ASM_X86_TSC_H
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#define _ASM_X86_TSC_H
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#include <asm/processor.h>
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#define NS_SCALE 10 /* 2^10, carefully chosen */
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#define US_SCALE 32 /* 2^32, arbitralrily chosen */
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/*
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* Standard way to access the cycle counter.
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*/
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typedef unsigned long long cycles_t;
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extern unsigned int cpu_khz;
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extern unsigned int tsc_khz;
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extern void disable_TSC(void);
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static inline cycles_t get_cycles(void)
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{
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#ifndef CONFIG_X86_TSC
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if (!boot_cpu_has(X86_FEATURE_TSC))
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return 0;
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#endif
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return rdtsc();
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}
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extern struct system_counterval_t convert_art_to_tsc(cycle_t art);
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extern void tsc_init(void);
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extern void mark_tsc_unstable(char *reason);
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extern int unsynchronized_tsc(void);
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extern int check_tsc_unstable(void);
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extern int check_tsc_disabled(void);
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extern unsigned long native_calibrate_tsc(void);
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extern unsigned long long native_sched_clock_from_tsc(u64 tsc);
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extern int tsc_clocksource_reliable;
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/*
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* Boot-time check whether the TSCs are synchronized across
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* all CPUs/cores:
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*/
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extern void check_tsc_sync_source(int cpu);
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extern void check_tsc_sync_target(void);
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extern int notsc_setup(char *);
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extern void tsc_save_sched_clock_state(void);
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extern void tsc_restore_sched_clock_state(void);
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/* MSR based TSC calibration for Intel Atom SoC platforms */
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unsigned long try_msr_calibrate_tsc(void);
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#endif /* _ASM_X86_TSC_H */
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