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49ea7fc094
PXA95x isn't widely used. And it adds the effort on supporting multiple platform. So remove it. The assumption is that nobody will miss this support. If you are reading this text because you actually require pxa95x support on a new kernel, we can work out a way to revert this patch or add support to the mmp platform. Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
476 lines
10 KiB
C
476 lines
10 KiB
C
/*
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* arch/arm/plat-pxa/include/plat/mfp.h
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*
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* Common Multi-Function Pin Definitions
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*
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* Copyright (C) 2007 Marvell International Ltd.
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*
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* 2007-8-21: eric miao <eric.miao@marvell.com>
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* initial version
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __ASM_PLAT_MFP_H
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#define __ASM_PLAT_MFP_H
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#define mfp_to_gpio(m) ((m) % 256)
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/* list of all the configurable MFP pins */
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enum {
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MFP_PIN_INVALID = -1,
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MFP_PIN_GPIO0 = 0,
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MFP_PIN_GPIO1,
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MFP_PIN_GPIO2,
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MFP_PIN_GPIO3,
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MFP_PIN_GPIO4,
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MFP_PIN_GPIO5,
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MFP_PIN_GPIO6,
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MFP_PIN_GPIO7,
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MFP_PIN_GPIO8,
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MFP_PIN_GPIO9,
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MFP_PIN_GPIO10,
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MFP_PIN_GPIO11,
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MFP_PIN_GPIO12,
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MFP_PIN_GPIO13,
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MFP_PIN_GPIO14,
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MFP_PIN_GPIO15,
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MFP_PIN_GPIO16,
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MFP_PIN_GPIO17,
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MFP_PIN_GPIO18,
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MFP_PIN_GPIO19,
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MFP_PIN_GPIO20,
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MFP_PIN_GPIO21,
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MFP_PIN_GPIO22,
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MFP_PIN_GPIO23,
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MFP_PIN_GPIO24,
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MFP_PIN_GPIO25,
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MFP_PIN_GPIO26,
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MFP_PIN_GPIO27,
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MFP_PIN_GPIO28,
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MFP_PIN_GPIO29,
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MFP_PIN_GPIO30,
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MFP_PIN_GPIO31,
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MFP_PIN_GPIO32,
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MFP_PIN_GPIO33,
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MFP_PIN_GPIO34,
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MFP_PIN_GPIO35,
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MFP_PIN_GPIO36,
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MFP_PIN_GPIO37,
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MFP_PIN_GPIO38,
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MFP_PIN_GPIO39,
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MFP_PIN_GPIO40,
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MFP_PIN_GPIO41,
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MFP_PIN_GPIO42,
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MFP_PIN_GPIO43,
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MFP_PIN_GPIO44,
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MFP_PIN_GPIO45,
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MFP_PIN_GPIO46,
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MFP_PIN_GPIO47,
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MFP_PIN_GPIO48,
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MFP_PIN_GPIO49,
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MFP_PIN_GPIO50,
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MFP_PIN_GPIO51,
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MFP_PIN_GPIO52,
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MFP_PIN_GPIO53,
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MFP_PIN_GPIO54,
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MFP_PIN_GPIO55,
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MFP_PIN_GPIO56,
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MFP_PIN_GPIO57,
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MFP_PIN_GPIO58,
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MFP_PIN_GPIO59,
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MFP_PIN_GPIO60,
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MFP_PIN_GPIO61,
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MFP_PIN_GPIO62,
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MFP_PIN_GPIO63,
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MFP_PIN_GPIO64,
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MFP_PIN_GPIO65,
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MFP_PIN_GPIO66,
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MFP_PIN_GPIO67,
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MFP_PIN_GPIO68,
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MFP_PIN_GPIO69,
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MFP_PIN_GPIO70,
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MFP_PIN_GPIO71,
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MFP_PIN_GPIO72,
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MFP_PIN_GPIO73,
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MFP_PIN_GPIO74,
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MFP_PIN_GPIO75,
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MFP_PIN_GPIO76,
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MFP_PIN_GPIO77,
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MFP_PIN_GPIO78,
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MFP_PIN_GPIO79,
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MFP_PIN_GPIO80,
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MFP_PIN_GPIO81,
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MFP_PIN_GPIO82,
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MFP_PIN_GPIO83,
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MFP_PIN_GPIO84,
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MFP_PIN_GPIO85,
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MFP_PIN_GPIO86,
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MFP_PIN_GPIO87,
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MFP_PIN_GPIO88,
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MFP_PIN_GPIO89,
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MFP_PIN_GPIO90,
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MFP_PIN_GPIO91,
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MFP_PIN_GPIO92,
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MFP_PIN_GPIO93,
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MFP_PIN_GPIO94,
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MFP_PIN_GPIO95,
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MFP_PIN_GPIO96,
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MFP_PIN_GPIO97,
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MFP_PIN_GPIO98,
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MFP_PIN_GPIO99,
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MFP_PIN_GPIO100,
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MFP_PIN_GPIO101,
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MFP_PIN_GPIO102,
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MFP_PIN_GPIO103,
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MFP_PIN_GPIO104,
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MFP_PIN_GPIO105,
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MFP_PIN_GPIO106,
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MFP_PIN_GPIO107,
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MFP_PIN_GPIO108,
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MFP_PIN_GPIO109,
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MFP_PIN_GPIO110,
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MFP_PIN_GPIO111,
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MFP_PIN_GPIO112,
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MFP_PIN_GPIO113,
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MFP_PIN_GPIO114,
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MFP_PIN_GPIO115,
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MFP_PIN_GPIO116,
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MFP_PIN_GPIO117,
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MFP_PIN_GPIO118,
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MFP_PIN_GPIO119,
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MFP_PIN_GPIO120,
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MFP_PIN_GPIO121,
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MFP_PIN_GPIO122,
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MFP_PIN_GPIO123,
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MFP_PIN_GPIO124,
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MFP_PIN_GPIO125,
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MFP_PIN_GPIO126,
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MFP_PIN_GPIO127,
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MFP_PIN_GPIO128,
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MFP_PIN_GPIO129,
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MFP_PIN_GPIO130,
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MFP_PIN_GPIO131,
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MFP_PIN_GPIO132,
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MFP_PIN_GPIO133,
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MFP_PIN_GPIO134,
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MFP_PIN_GPIO135,
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MFP_PIN_GPIO136,
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MFP_PIN_GPIO137,
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MFP_PIN_GPIO138,
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MFP_PIN_GPIO139,
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MFP_PIN_GPIO140,
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MFP_PIN_GPIO141,
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MFP_PIN_GPIO142,
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MFP_PIN_GPIO143,
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MFP_PIN_GPIO144,
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MFP_PIN_GPIO145,
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MFP_PIN_GPIO146,
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MFP_PIN_GPIO147,
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MFP_PIN_GPIO148,
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MFP_PIN_GPIO149,
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MFP_PIN_GPIO150,
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MFP_PIN_GPIO151,
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MFP_PIN_GPIO152,
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MFP_PIN_GPIO153,
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MFP_PIN_GPIO154,
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MFP_PIN_GPIO155,
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MFP_PIN_GPIO156,
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MFP_PIN_GPIO157,
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MFP_PIN_GPIO158,
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MFP_PIN_GPIO159,
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MFP_PIN_GPIO160,
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MFP_PIN_GPIO161,
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MFP_PIN_GPIO162,
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MFP_PIN_GPIO163,
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MFP_PIN_GPIO164,
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MFP_PIN_GPIO165,
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MFP_PIN_GPIO166,
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MFP_PIN_GPIO167,
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MFP_PIN_GPIO168,
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MFP_PIN_GPIO169,
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MFP_PIN_GPIO170,
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MFP_PIN_GPIO171,
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MFP_PIN_GPIO172,
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MFP_PIN_GPIO173,
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MFP_PIN_GPIO174,
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MFP_PIN_GPIO175,
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MFP_PIN_GPIO176,
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MFP_PIN_GPIO177,
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MFP_PIN_GPIO178,
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MFP_PIN_GPIO179,
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MFP_PIN_GPIO180,
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MFP_PIN_GPIO181,
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MFP_PIN_GPIO182,
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MFP_PIN_GPIO183,
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MFP_PIN_GPIO184,
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MFP_PIN_GPIO185,
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MFP_PIN_GPIO186,
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MFP_PIN_GPIO187,
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MFP_PIN_GPIO188,
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MFP_PIN_GPIO189,
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MFP_PIN_GPIO190,
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MFP_PIN_GPIO191,
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MFP_PIN_GPIO255 = 255,
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MFP_PIN_GPIO0_2,
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MFP_PIN_GPIO1_2,
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MFP_PIN_GPIO2_2,
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MFP_PIN_GPIO3_2,
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MFP_PIN_GPIO4_2,
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MFP_PIN_GPIO5_2,
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MFP_PIN_GPIO6_2,
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MFP_PIN_GPIO7_2,
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MFP_PIN_GPIO8_2,
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MFP_PIN_GPIO9_2,
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MFP_PIN_GPIO10_2,
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MFP_PIN_GPIO11_2,
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MFP_PIN_GPIO12_2,
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MFP_PIN_GPIO13_2,
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MFP_PIN_GPIO14_2,
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MFP_PIN_GPIO15_2,
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MFP_PIN_GPIO16_2,
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MFP_PIN_GPIO17_2,
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MFP_PIN_ULPI_STP,
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MFP_PIN_ULPI_NXT,
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MFP_PIN_ULPI_DIR,
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MFP_PIN_nXCVREN,
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MFP_PIN_DF_CLE_nOE,
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MFP_PIN_DF_nADV1_ALE,
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MFP_PIN_DF_SCLK_E,
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MFP_PIN_DF_SCLK_S,
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MFP_PIN_nBE0,
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MFP_PIN_nBE1,
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MFP_PIN_DF_nADV2_ALE,
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MFP_PIN_DF_INT_RnB,
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MFP_PIN_DF_nCS0,
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MFP_PIN_DF_nCS1,
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MFP_PIN_nLUA,
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MFP_PIN_nLLA,
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MFP_PIN_DF_nWE,
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MFP_PIN_DF_ALE_nWE,
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MFP_PIN_DF_nRE_nOE,
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MFP_PIN_DF_ADDR0,
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MFP_PIN_DF_ADDR1,
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MFP_PIN_DF_ADDR2,
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MFP_PIN_DF_ADDR3,
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MFP_PIN_DF_IO0,
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MFP_PIN_DF_IO1,
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MFP_PIN_DF_IO2,
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MFP_PIN_DF_IO3,
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MFP_PIN_DF_IO4,
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MFP_PIN_DF_IO5,
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MFP_PIN_DF_IO6,
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MFP_PIN_DF_IO7,
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MFP_PIN_DF_IO8,
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MFP_PIN_DF_IO9,
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MFP_PIN_DF_IO10,
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MFP_PIN_DF_IO11,
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MFP_PIN_DF_IO12,
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MFP_PIN_DF_IO13,
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MFP_PIN_DF_IO14,
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MFP_PIN_DF_IO15,
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MFP_PIN_DF_nCS0_SM_nCS2,
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MFP_PIN_DF_nCS1_SM_nCS3,
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MFP_PIN_SM_nCS0,
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MFP_PIN_SM_nCS1,
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MFP_PIN_DF_WEn,
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MFP_PIN_DF_REn,
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MFP_PIN_DF_CLE_SM_OEn,
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MFP_PIN_DF_ALE_SM_WEn,
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MFP_PIN_DF_RDY0,
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MFP_PIN_DF_RDY1,
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MFP_PIN_SM_SCLK,
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MFP_PIN_SM_BE0,
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MFP_PIN_SM_BE1,
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MFP_PIN_SM_ADV,
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MFP_PIN_SM_ADVMUX,
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MFP_PIN_SM_RDY,
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MFP_PIN_MMC1_DAT7,
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MFP_PIN_MMC1_DAT6,
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MFP_PIN_MMC1_DAT5,
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MFP_PIN_MMC1_DAT4,
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MFP_PIN_MMC1_DAT3,
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MFP_PIN_MMC1_DAT2,
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MFP_PIN_MMC1_DAT1,
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MFP_PIN_MMC1_DAT0,
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MFP_PIN_MMC1_CMD,
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MFP_PIN_MMC1_CLK,
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MFP_PIN_MMC1_CD,
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MFP_PIN_MMC1_WP,
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/* additional pins on PXA930 */
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MFP_PIN_GSIM_UIO,
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MFP_PIN_GSIM_UCLK,
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MFP_PIN_GSIM_UDET,
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MFP_PIN_GSIM_nURST,
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MFP_PIN_PMIC_INT,
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MFP_PIN_RDY,
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/* additional pins on MMP2 */
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MFP_PIN_TWSI1_SCL,
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MFP_PIN_TWSI1_SDA,
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MFP_PIN_TWSI4_SCL,
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MFP_PIN_TWSI4_SDA,
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MFP_PIN_CLK_REQ,
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MFP_PIN_MAX,
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};
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/*
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* a possible MFP configuration is represented by a 32-bit integer
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*
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* bit 0.. 9 - MFP Pin Number (1024 Pins Maximum)
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* bit 10..12 - Alternate Function Selection
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* bit 13..15 - Drive Strength
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* bit 16..18 - Low Power Mode State
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* bit 19..20 - Low Power Mode Edge Detection
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* bit 21..22 - Run Mode Pull State
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*
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* to facilitate the definition, the following macros are provided
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*
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* MFP_CFG_DEFAULT - default MFP configuration value, with
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* alternate function = 0,
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* drive strength = fast 3mA (MFP_DS03X)
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* low power mode = default
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* edge detection = none
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*
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* MFP_CFG - default MFPR value with alternate function
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* MFP_CFG_DRV - default MFPR value with alternate function and
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* pin drive strength
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* MFP_CFG_LPM - default MFPR value with alternate function and
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* low power mode
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* MFP_CFG_X - default MFPR value with alternate function,
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* pin drive strength and low power mode
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*/
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typedef unsigned long mfp_cfg_t;
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#define MFP_PIN(x) ((x) & 0x3ff)
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#define MFP_AF0 (0x0 << 10)
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#define MFP_AF1 (0x1 << 10)
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#define MFP_AF2 (0x2 << 10)
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#define MFP_AF3 (0x3 << 10)
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#define MFP_AF4 (0x4 << 10)
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#define MFP_AF5 (0x5 << 10)
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#define MFP_AF6 (0x6 << 10)
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#define MFP_AF7 (0x7 << 10)
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#define MFP_AF_MASK (0x7 << 10)
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#define MFP_AF(x) (((x) >> 10) & 0x7)
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#define MFP_DS01X (0x0 << 13)
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#define MFP_DS02X (0x1 << 13)
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#define MFP_DS03X (0x2 << 13)
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#define MFP_DS04X (0x3 << 13)
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#define MFP_DS06X (0x4 << 13)
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#define MFP_DS08X (0x5 << 13)
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#define MFP_DS10X (0x6 << 13)
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#define MFP_DS13X (0x7 << 13)
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#define MFP_DS_MASK (0x7 << 13)
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#define MFP_DS(x) (((x) >> 13) & 0x7)
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#define MFP_LPM_DEFAULT (0x0 << 16)
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#define MFP_LPM_DRIVE_LOW (0x1 << 16)
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#define MFP_LPM_DRIVE_HIGH (0x2 << 16)
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#define MFP_LPM_PULL_LOW (0x3 << 16)
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#define MFP_LPM_PULL_HIGH (0x4 << 16)
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#define MFP_LPM_FLOAT (0x5 << 16)
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#define MFP_LPM_INPUT (0x6 << 16)
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#define MFP_LPM_STATE_MASK (0x7 << 16)
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#define MFP_LPM_STATE(x) (((x) >> 16) & 0x7)
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#define MFP_LPM_EDGE_NONE (0x0 << 19)
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#define MFP_LPM_EDGE_RISE (0x1 << 19)
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#define MFP_LPM_EDGE_FALL (0x2 << 19)
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#define MFP_LPM_EDGE_BOTH (0x3 << 19)
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#define MFP_LPM_EDGE_MASK (0x3 << 19)
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#define MFP_LPM_EDGE(x) (((x) >> 19) & 0x3)
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#define MFP_PULL_NONE (0x0 << 21)
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#define MFP_PULL_LOW (0x1 << 21)
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#define MFP_PULL_HIGH (0x2 << 21)
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#define MFP_PULL_BOTH (0x3 << 21)
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#define MFP_PULL_FLOAT (0x4 << 21)
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#define MFP_PULL_MASK (0x7 << 21)
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#define MFP_PULL(x) (((x) >> 21) & 0x7)
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#define MFP_CFG_DEFAULT (MFP_AF0 | MFP_DS03X | MFP_LPM_DEFAULT |\
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MFP_LPM_EDGE_NONE | MFP_PULL_NONE)
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#define MFP_CFG(pin, af) \
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((MFP_CFG_DEFAULT & ~MFP_AF_MASK) |\
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(MFP_PIN(MFP_PIN_##pin) | MFP_##af))
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#define MFP_CFG_DRV(pin, af, drv) \
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((MFP_CFG_DEFAULT & ~(MFP_AF_MASK | MFP_DS_MASK)) |\
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(MFP_PIN(MFP_PIN_##pin) | MFP_##af | MFP_##drv))
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#define MFP_CFG_LPM(pin, af, lpm) \
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((MFP_CFG_DEFAULT & ~(MFP_AF_MASK | MFP_LPM_STATE_MASK)) |\
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(MFP_PIN(MFP_PIN_##pin) | MFP_##af | MFP_LPM_##lpm))
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#define MFP_CFG_X(pin, af, drv, lpm) \
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((MFP_CFG_DEFAULT & ~(MFP_AF_MASK | MFP_DS_MASK | MFP_LPM_STATE_MASK)) |\
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(MFP_PIN(MFP_PIN_##pin) | MFP_##af | MFP_##drv | MFP_LPM_##lpm))
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#if defined(CONFIG_PXA3xx) || defined(CONFIG_ARCH_MMP)
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/*
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* each MFP pin will have a MFPR register, since the offset of the
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* register varies between processors, the processor specific code
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* should initialize the pin offsets by mfp_init()
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*
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* mfp_init_base() - accepts a virtual base for all MFPR registers and
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* initialize the MFP table to a default state
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*
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* mfp_init_addr() - accepts a table of "mfp_addr_map" structure, which
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* represents a range of MFP pins from "start" to "end", with the offset
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* beginning at "offset", to define a single pin, let "end" = -1.
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*
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* use
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*
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* MFP_ADDR_X() to define a range of pins
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* MFP_ADDR() to define a single pin
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* MFP_ADDR_END to signal the end of pin offset definitions
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*/
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struct mfp_addr_map {
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unsigned int start;
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unsigned int end;
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unsigned long offset;
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};
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#define MFP_ADDR_X(start, end, offset) \
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{ MFP_PIN_##start, MFP_PIN_##end, offset }
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#define MFP_ADDR(pin, offset) \
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{ MFP_PIN_##pin, -1, offset }
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#define MFP_ADDR_END { MFP_PIN_INVALID, 0 }
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void __init mfp_init_base(void __iomem *mfpr_base);
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void __init mfp_init_addr(struct mfp_addr_map *map);
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/*
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* mfp_{read, write}() - for direct read/write access to the MFPR register
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* mfp_config() - for configuring a group of MFPR registers
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* mfp_config_lpm() - configuring all low power MFPR registers for suspend
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* mfp_config_run() - configuring all run time MFPR registers after resume
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*/
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unsigned long mfp_read(int mfp);
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void mfp_write(int mfp, unsigned long mfpr_val);
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void mfp_config(unsigned long *mfp_cfgs, int num);
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void mfp_config_run(void);
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void mfp_config_lpm(void);
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#endif /* CONFIG_PXA3xx || CONFIG_ARCH_MMP */
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#endif /* __ASM_PLAT_MFP_H */
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