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e5cf79d995
interrupts-names => interrupt-names Other line changes are re-aligning. Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
45 lines
1.7 KiB
Plaintext
45 lines
1.7 KiB
Plaintext
DT bindings for Renesas R-Mobile and SH-Mobile memory controllers
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=================================================================
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Renesas R-Mobile and SH-Mobile SoCs contain one or more memory controllers.
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These memory controllers differ from one SoC variant to another, and are called
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by different names ("DDR Bus Controller (DBSC)", "DDR3 Bus State Controller
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(DBSC3)", "SDRAM Bus State Controller (SBSC)").
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Currently memory controller device nodes are used only to reference PM
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domains, and prevent these PM domains from being powered down, which would
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crash the system.
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As there exist no actual drivers for these controllers yet, these bindings
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should be considered EXPERIMENTAL for now.
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Required properties:
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- compatible: Must be one of the following SoC-specific values:
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- "renesas,dbsc-r8a73a4" (R-Mobile APE6)
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- "renesas,dbsc3-r8a7740" (R-Mobile A1)
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- "renesas,sbsc-sh73a0" (SH-Mobile AG5)
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- reg: Must contain the base address and length of the memory controller's
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registers.
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Optional properties:
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- interrupts: Must contain a list of interrupt specifiers for memory
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controller interrupts, if available.
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- interrupt-names: Must contain a list of interrupt names corresponding to
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the interrupts in the interrupts property, if available.
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Valid interrupt names are:
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- "sec" (secure interrupt)
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- "temp" (normal (temperature) interrupt)
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- power-domains: Must contain a reference to the PM domain that the memory
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controller belongs to, if available.
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Example:
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sbsc1: memory-controller@fe400000 {
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compatible = "renesas,sbsc-sh73a0";
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reg = <0xfe400000 0x400>;
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interrupts = <0 35 IRQ_TYPE_LEVEL_HIGH>,
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<0 36 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "sec", "temp";
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power-domains = <&pd_a4bc0>;
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};
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