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This adds device tree bindings for the ARM Cortex-A5 and Cortex-A9 Snoop Control Units. Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
26 lines
598 B
Plaintext
26 lines
598 B
Plaintext
* ARM Snoop Control Unit (SCU)
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As part of the MPCore complex, Cortex-A5 and Cortex-A9 are provided
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with a Snoop Control Unit. The register range is usually 256 (0x100)
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bytes.
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References:
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- Cortex-A9: see DDI0407E Cortex-A9 MPCore Technical Reference Manual
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Revision r2p0
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- Cortex-A5: see DDI0434B Cortex-A5 MPCore Technical Reference Manual
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Revision r0p1
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- compatible : Should be:
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"arm,cortex-a9-scu"
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"arm,cortex-a5-scu"
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- reg : Specify the base address and the size of the SCU register window.
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Example:
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scu@a04100000 {
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compatible = "arm,cortex-a9-scu";
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reg = <0xa0410000 0x100>;
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};
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