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e1735d9a98
32 bit port capabilities are required to support new speeds which can not be supported using 16 bit port capabilities. Signed-off-by: Varun Prakash <varun@chelsio.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
264 lines
9.3 KiB
C
264 lines
9.3 KiB
C
/*
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* This file is part of the Chelsio FCoE driver for Linux.
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*
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* Copyright (c) 2008-2012 Chelsio Communications, Inc. All rights reserved.
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*
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* This software is available to you under a choice of one of two
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* licenses. You may choose to be licensed under the terms of the GNU
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* General Public License (GPL) Version 2, available from the file
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* COPYING in the main directory of this source tree, or the
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* OpenIB.org BSD license below:
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*
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* Redistribution and use in source and binary forms, with or
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* without modification, are permitted provided that the following
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* conditions are met:
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*
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* - Redistributions of source code must retain the above
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* copyright notice, this list of conditions and the following
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* disclaimer.
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*
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* - Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials
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* provided with the distribution.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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#ifndef __CSIO_MB_H__
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#define __CSIO_MB_H__
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#include <linux/timer.h>
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#include <linux/completion.h>
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#include "t4fw_api.h"
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#include "t4fw_api_stor.h"
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#include "csio_defs.h"
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#define CSIO_STATS_OFFSET (2)
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#define CSIO_NUM_STATS_PER_MB (6)
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struct fw_fcoe_port_cmd_params {
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uint8_t portid;
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uint8_t idx;
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uint8_t nstats;
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};
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#define CSIO_DUMP_MB(__hw, __num, __mb) \
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csio_dbg(__hw, "\t%llx %llx %llx %llx %llx %llx %llx %llx\n", \
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(unsigned long long)csio_rd_reg64(__hw, __mb), \
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(unsigned long long)csio_rd_reg64(__hw, __mb + 8), \
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(unsigned long long)csio_rd_reg64(__hw, __mb + 16), \
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(unsigned long long)csio_rd_reg64(__hw, __mb + 24), \
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(unsigned long long)csio_rd_reg64(__hw, __mb + 32), \
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(unsigned long long)csio_rd_reg64(__hw, __mb + 40), \
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(unsigned long long)csio_rd_reg64(__hw, __mb + 48), \
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(unsigned long long)csio_rd_reg64(__hw, __mb + 56))
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#define CSIO_MB_MAX_REGS 8
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#define CSIO_MAX_MB_SIZE 64
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#define CSIO_MB_POLL_FREQ 5 /* 5 ms */
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#define CSIO_MB_DEFAULT_TMO FW_CMD_MAX_TIMEOUT
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/* Device master in HELLO command */
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enum csio_dev_master { CSIO_MASTER_CANT, CSIO_MASTER_MAY, CSIO_MASTER_MUST };
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enum csio_mb_owner { CSIO_MBOWNER_NONE, CSIO_MBOWNER_FW, CSIO_MBOWNER_PL };
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enum csio_dev_state {
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CSIO_DEV_STATE_UNINIT,
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CSIO_DEV_STATE_INIT,
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CSIO_DEV_STATE_ERR
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};
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#define FW_PARAM_DEV(param) \
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(FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_DEV) | \
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FW_PARAMS_PARAM_X_V(FW_PARAMS_PARAM_DEV_##param))
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#define FW_PARAM_PFVF(param) \
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(FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_PFVF) | \
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FW_PARAMS_PARAM_X_V(FW_PARAMS_PARAM_PFVF_##param)| \
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FW_PARAMS_PARAM_Y_V(0) | \
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FW_PARAMS_PARAM_Z_V(0))
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#define CSIO_INIT_MBP(__mbp, __cp, __tmo, __priv, __fn, __clear) \
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do { \
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if (__clear) \
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memset((__cp), 0, \
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CSIO_MB_MAX_REGS * sizeof(__be64)); \
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INIT_LIST_HEAD(&(__mbp)->list); \
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(__mbp)->tmo = (__tmo); \
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(__mbp)->priv = (void *)(__priv); \
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(__mbp)->mb_cbfn = (__fn); \
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(__mbp)->mb_size = sizeof(*(__cp)); \
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} while (0)
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struct csio_mbm_stats {
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uint32_t n_req; /* number of mbox req */
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uint32_t n_rsp; /* number of mbox rsp */
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uint32_t n_activeq; /* number of mbox req active Q */
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uint32_t n_cbfnq; /* number of mbox req cbfn Q */
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uint32_t n_tmo; /* number of mbox timeout */
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uint32_t n_cancel; /* number of mbox cancel */
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uint32_t n_err; /* number of mbox error */
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};
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/* Driver version of Mailbox */
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struct csio_mb {
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struct list_head list; /* for req/resp */
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/* queue in driver */
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__be64 mb[CSIO_MB_MAX_REGS]; /* MB in HW format */
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int mb_size; /* Size of this
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* mailbox.
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*/
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uint32_t tmo; /* Timeout */
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struct completion cmplobj; /* MB Completion
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* object
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*/
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void (*mb_cbfn) (struct csio_hw *, struct csio_mb *);
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/* Callback fn */
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void *priv; /* Owner private ptr */
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};
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struct csio_mbm {
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uint32_t a_mbox; /* Async mbox num */
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uint32_t intr_idx; /* Interrupt index */
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struct timer_list timer; /* Mbox timer */
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struct csio_hw *hw; /* Hardware pointer */
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struct list_head req_q; /* Mbox request queue */
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struct list_head cbfn_q; /* Mbox completion q */
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struct csio_mb *mcurrent; /* Current mailbox */
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uint32_t req_q_cnt; /* Outstanding mbox
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* cmds
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*/
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struct csio_mbm_stats stats; /* Statistics */
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};
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#define csio_set_mb_intr_idx(_m, _i) ((_m)->intr_idx = (_i))
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#define csio_get_mb_intr_idx(_m) ((_m)->intr_idx)
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struct csio_iq_params;
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struct csio_eq_params;
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enum fw_retval csio_mb_fw_retval(struct csio_mb *);
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/* MB helpers */
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void csio_mb_hello(struct csio_hw *, struct csio_mb *, uint32_t,
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uint32_t, uint32_t, enum csio_dev_master,
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void (*)(struct csio_hw *, struct csio_mb *));
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void csio_mb_process_hello_rsp(struct csio_hw *, struct csio_mb *,
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enum fw_retval *, enum csio_dev_state *,
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uint8_t *);
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void csio_mb_bye(struct csio_hw *, struct csio_mb *, uint32_t,
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void (*)(struct csio_hw *, struct csio_mb *));
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void csio_mb_reset(struct csio_hw *, struct csio_mb *, uint32_t, int, int,
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void (*)(struct csio_hw *, struct csio_mb *));
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void csio_mb_params(struct csio_hw *, struct csio_mb *, uint32_t, unsigned int,
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unsigned int, unsigned int, const u32 *, u32 *, bool,
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void (*)(struct csio_hw *, struct csio_mb *));
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void csio_mb_process_read_params_rsp(struct csio_hw *, struct csio_mb *,
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enum fw_retval *, unsigned int , u32 *);
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void csio_mb_ldst(struct csio_hw *hw, struct csio_mb *mbp, uint32_t tmo,
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int reg);
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void csio_mb_caps_config(struct csio_hw *, struct csio_mb *, uint32_t,
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bool, bool, bool, bool,
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void (*)(struct csio_hw *, struct csio_mb *));
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void csio_mb_port(struct csio_hw *, struct csio_mb *, uint32_t,
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uint8_t, bool, uint32_t, uint16_t,
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void (*) (struct csio_hw *, struct csio_mb *));
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void csio_mb_process_read_port_rsp(struct csio_hw *, struct csio_mb *,
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enum fw_retval *, uint16_t,
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uint32_t *, uint32_t *);
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void csio_mb_initialize(struct csio_hw *, struct csio_mb *, uint32_t,
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void (*)(struct csio_hw *, struct csio_mb *));
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void csio_mb_iq_alloc_write(struct csio_hw *, struct csio_mb *, void *,
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uint32_t, struct csio_iq_params *,
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void (*) (struct csio_hw *, struct csio_mb *));
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void csio_mb_iq_alloc_write_rsp(struct csio_hw *, struct csio_mb *,
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enum fw_retval *, struct csio_iq_params *);
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void csio_mb_iq_free(struct csio_hw *, struct csio_mb *, void *,
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uint32_t, struct csio_iq_params *,
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void (*) (struct csio_hw *, struct csio_mb *));
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void csio_mb_eq_ofld_alloc_write(struct csio_hw *, struct csio_mb *, void *,
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uint32_t, struct csio_eq_params *,
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void (*) (struct csio_hw *, struct csio_mb *));
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void csio_mb_eq_ofld_alloc_write_rsp(struct csio_hw *, struct csio_mb *,
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enum fw_retval *, struct csio_eq_params *);
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void csio_mb_eq_ofld_free(struct csio_hw *, struct csio_mb *, void *,
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uint32_t , struct csio_eq_params *,
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void (*) (struct csio_hw *, struct csio_mb *));
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void csio_fcoe_read_res_info_init_mb(struct csio_hw *, struct csio_mb *,
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uint32_t,
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void (*) (struct csio_hw *, struct csio_mb *));
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void csio_write_fcoe_link_cond_init_mb(struct csio_lnode *, struct csio_mb *,
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uint32_t, uint8_t, uint32_t, uint8_t, bool, uint32_t,
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void (*) (struct csio_hw *, struct csio_mb *));
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void csio_fcoe_vnp_alloc_init_mb(struct csio_lnode *, struct csio_mb *,
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uint32_t, uint32_t , uint32_t , uint16_t,
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uint8_t [8], uint8_t [8],
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void (*) (struct csio_hw *, struct csio_mb *));
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void csio_fcoe_vnp_read_init_mb(struct csio_lnode *, struct csio_mb *,
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uint32_t, uint32_t , uint32_t ,
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void (*) (struct csio_hw *, struct csio_mb *));
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void csio_fcoe_vnp_free_init_mb(struct csio_lnode *, struct csio_mb *,
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uint32_t , uint32_t, uint32_t ,
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void (*) (struct csio_hw *, struct csio_mb *));
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void csio_fcoe_read_fcf_init_mb(struct csio_lnode *, struct csio_mb *,
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uint32_t, uint32_t, uint32_t,
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void (*cbfn) (struct csio_hw *, struct csio_mb *));
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void csio_fcoe_read_portparams_init_mb(struct csio_hw *hw,
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struct csio_mb *mbp, uint32_t mb_tmo,
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struct fw_fcoe_port_cmd_params *portparams,
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void (*cbfn)(struct csio_hw *, struct csio_mb *));
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void csio_mb_process_portparams_rsp(struct csio_hw *hw, struct csio_mb *mbp,
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enum fw_retval *retval,
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struct fw_fcoe_port_cmd_params *portparams,
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struct fw_fcoe_port_stats *portstats);
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/* MB module functions */
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int csio_mbm_init(struct csio_mbm *, struct csio_hw *,
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void (*)(struct timer_list *));
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void csio_mbm_exit(struct csio_mbm *);
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void csio_mb_intr_enable(struct csio_hw *);
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void csio_mb_intr_disable(struct csio_hw *);
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int csio_mb_issue(struct csio_hw *, struct csio_mb *);
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void csio_mb_completions(struct csio_hw *, struct list_head *);
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int csio_mb_fwevt_handler(struct csio_hw *, __be64 *);
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int csio_mb_isr_handler(struct csio_hw *);
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struct csio_mb *csio_mb_tmo_handler(struct csio_hw *);
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void csio_mb_cancel_all(struct csio_hw *, struct list_head *);
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#endif /* ifndef __CSIO_MB_H__ */
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