mirror of
https://github.com/torvalds/linux.git
synced 2024-12-26 12:52:30 +00:00
3d430bdb74
Updated Boot printing kgdb update for arc gdb 7.5 Bug fixes (some marked for stable) More code refactoring/consolidation -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.14 (GNU/Linux) iQIcBAABAgAGBQJURJFgAAoJEGnX8d3iisJeuFcP/R/GlO+IHMt7MsMZ523qGF5/ sltK7/OBiUUYFGiCE2IjzSXcv3eRxhpE46bHfqPCncbo/LgEEHrnxKLYkQJyTGiF nhAQ5jwlGzsgOJAuhDSrsdT5ixYzx8Q27T6+9bWHk7iG2QuFVv7oPqVBUciu8jML 43eSfCz5NxlbzXMW4KBTtpQXJ1y/BFFcRl4BDEV2iXfNt/Qkbc7UBdX52cc9Rh68 r3l0xvfSgTc6gWsULaYtNsh6Jeyhk6ocvoV1C/o1vYWSAEdzrEJSek3V33rybROE dFVoFMJ0Qyj+Z6gMulPoZgfesKDEqUryr7YjNeOCnAGUp6zDIzaZpJj70qkRdTJT 7MQuXA+OIiVuMJ/egLukSEgsb4n8NjWeb69LWEnTHom59TVu9tDlY4Y36W4rsGMc 3Uek7rn+a2QYYGq+aP2R4+j6Y6+/zKmipPQpUaYo6C1WaBGpPeEDDZzSFX83web9 VBb0FmOL37evy1Sv1VhBT1PX8q5HuRrNs9v23GRWMOnonQ0D87TexiTbdpOMoe8I uOXlUwtkDyh5pHSJW6dtNogKhe12XMVTalWYws7jPKXsFuNMSAE/5F3GsNoAZ61y RPnss4WPwW3J0oWJCKAmUDOP+VNFsWValMc+Sa7IDryuxs/Dlh7G4paj7KTA4pVR +FipaGsUuOK7gbOGChVn =236F -----END PGP SIGNATURE----- Merge tag 'arc-3.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc Pull ARC updates from Vineet Gupta: "Sorry for the late pull request. Current stuff was ready for a while but I was hoping to squeeze in support for almost ready ARC SDP platform (and avoid a 2nd pull request), however it seems there are still some loose ends which warrant more time. - Platform code reduction/moving-up (TB10X no longer needs any callbacks) - updated boot printing - kgdb update for arc gdb 7.5 - bug fixes (some marked for stable) - more code refactoring/consolidation" * tag 'arc-3.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc: ARC: boot: cpu feature print enhancements ARC: boot: consolidate cross-checking of h/w and s/w ARC: unbork FPU save/restore ARC: remove extraneous __KERNEL__ guards ARC: Update order of registers in KGDB to match GDB 7.5 ARC: Remove unneeded Kconfig entry NO_DMA ARC: BUG() dumps stack after @msg (@msg now same as in generic BUG)) ARC: refactoring: reduce the scope of some local vars ARC: remove gcc mpy heuristics ARC: RIP @running_on_hw ARC: Update comments about uncached address space ARC: rename kconfig option for unaligned emulation ARC: [nsimosci] Allow "headless" models to boot ARC: [arcfpga] Get rid of ARC_BOARD_ANGEL4 and ARC_BOARD_ML509 ARC: [arcfpga] Remove more dead code ARC: [plat*] move code out of .init_machine into common ARC: [arcfpga] consolidate machine description, DT ARC: Allow SMP kernel to build/boot on UP-only infrastructure
171 lines
4.1 KiB
C
171 lines
4.1 KiB
C
/*
|
|
* Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
|
|
*
|
|
* This program is free software; you can redistribute it and/or modify
|
|
* it under the terms of the GNU General Public License version 2 as
|
|
* published by the Free Software Foundation.
|
|
*/
|
|
|
|
#ifndef _ASM_ARC_ATOMIC_H
|
|
#define _ASM_ARC_ATOMIC_H
|
|
|
|
#ifndef __ASSEMBLY__
|
|
|
|
#include <linux/types.h>
|
|
#include <linux/compiler.h>
|
|
#include <asm/cmpxchg.h>
|
|
#include <asm/barrier.h>
|
|
#include <asm/smp.h>
|
|
|
|
#define atomic_read(v) ((v)->counter)
|
|
|
|
#ifdef CONFIG_ARC_HAS_LLSC
|
|
|
|
#define atomic_set(v, i) (((v)->counter) = (i))
|
|
|
|
#define ATOMIC_OP(op, c_op, asm_op) \
|
|
static inline void atomic_##op(int i, atomic_t *v) \
|
|
{ \
|
|
unsigned int temp; \
|
|
\
|
|
__asm__ __volatile__( \
|
|
"1: llock %0, [%1] \n" \
|
|
" " #asm_op " %0, %0, %2 \n" \
|
|
" scond %0, [%1] \n" \
|
|
" bnz 1b \n" \
|
|
: "=&r"(temp) /* Early clobber, to prevent reg reuse */ \
|
|
: "r"(&v->counter), "ir"(i) \
|
|
: "cc"); \
|
|
} \
|
|
|
|
#define ATOMIC_OP_RETURN(op, c_op, asm_op) \
|
|
static inline int atomic_##op##_return(int i, atomic_t *v) \
|
|
{ \
|
|
unsigned int temp; \
|
|
\
|
|
__asm__ __volatile__( \
|
|
"1: llock %0, [%1] \n" \
|
|
" " #asm_op " %0, %0, %2 \n" \
|
|
" scond %0, [%1] \n" \
|
|
" bnz 1b \n" \
|
|
: "=&r"(temp) \
|
|
: "r"(&v->counter), "ir"(i) \
|
|
: "cc"); \
|
|
\
|
|
return temp; \
|
|
}
|
|
|
|
#else /* !CONFIG_ARC_HAS_LLSC */
|
|
|
|
#ifndef CONFIG_SMP
|
|
|
|
/* violating atomic_xxx API locking protocol in UP for optimization sake */
|
|
#define atomic_set(v, i) (((v)->counter) = (i))
|
|
|
|
#else
|
|
|
|
static inline void atomic_set(atomic_t *v, int i)
|
|
{
|
|
/*
|
|
* Independent of hardware support, all of the atomic_xxx() APIs need
|
|
* to follow the same locking rules to make sure that a "hardware"
|
|
* atomic insn (e.g. LD) doesn't clobber an "emulated" atomic insn
|
|
* sequence
|
|
*
|
|
* Thus atomic_set() despite being 1 insn (and seemingly atomic)
|
|
* requires the locking.
|
|
*/
|
|
unsigned long flags;
|
|
|
|
atomic_ops_lock(flags);
|
|
v->counter = i;
|
|
atomic_ops_unlock(flags);
|
|
}
|
|
|
|
#endif
|
|
|
|
/*
|
|
* Non hardware assisted Atomic-R-M-W
|
|
* Locking would change to irq-disabling only (UP) and spinlocks (SMP)
|
|
*/
|
|
|
|
#define ATOMIC_OP(op, c_op, asm_op) \
|
|
static inline void atomic_##op(int i, atomic_t *v) \
|
|
{ \
|
|
unsigned long flags; \
|
|
\
|
|
atomic_ops_lock(flags); \
|
|
v->counter c_op i; \
|
|
atomic_ops_unlock(flags); \
|
|
}
|
|
|
|
#define ATOMIC_OP_RETURN(op, c_op) \
|
|
static inline int atomic_##op##_return(int i, atomic_t *v) \
|
|
{ \
|
|
unsigned long flags; \
|
|
unsigned long temp; \
|
|
\
|
|
atomic_ops_lock(flags); \
|
|
temp = v->counter; \
|
|
temp c_op i; \
|
|
v->counter = temp; \
|
|
atomic_ops_unlock(flags); \
|
|
\
|
|
return temp; \
|
|
}
|
|
|
|
#endif /* !CONFIG_ARC_HAS_LLSC */
|
|
|
|
#define ATOMIC_OPS(op, c_op, asm_op) \
|
|
ATOMIC_OP(op, c_op, asm_op) \
|
|
ATOMIC_OP_RETURN(op, c_op, asm_op)
|
|
|
|
ATOMIC_OPS(add, +=, add)
|
|
ATOMIC_OPS(sub, -=, sub)
|
|
ATOMIC_OP(and, &=, and)
|
|
|
|
#define atomic_clear_mask(mask, v) atomic_and(~(mask), (v))
|
|
|
|
#undef ATOMIC_OPS
|
|
#undef ATOMIC_OP_RETURN
|
|
#undef ATOMIC_OP
|
|
|
|
/**
|
|
* __atomic_add_unless - add unless the number is a given value
|
|
* @v: pointer of type atomic_t
|
|
* @a: the amount to add to v...
|
|
* @u: ...unless v is equal to u.
|
|
*
|
|
* Atomically adds @a to @v, so long as it was not @u.
|
|
* Returns the old value of @v
|
|
*/
|
|
#define __atomic_add_unless(v, a, u) \
|
|
({ \
|
|
int c, old; \
|
|
c = atomic_read(v); \
|
|
while (c != (u) && (old = atomic_cmpxchg((v), c, c + (a))) != c)\
|
|
c = old; \
|
|
c; \
|
|
})
|
|
|
|
#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
|
|
|
|
#define atomic_inc(v) atomic_add(1, v)
|
|
#define atomic_dec(v) atomic_sub(1, v)
|
|
|
|
#define atomic_inc_and_test(v) (atomic_add_return(1, v) == 0)
|
|
#define atomic_dec_and_test(v) (atomic_sub_return(1, v) == 0)
|
|
#define atomic_inc_return(v) atomic_add_return(1, (v))
|
|
#define atomic_dec_return(v) atomic_sub_return(1, (v))
|
|
#define atomic_sub_and_test(i, v) (atomic_sub_return(i, v) == 0)
|
|
|
|
#define atomic_add_negative(i, v) (atomic_add_return(i, v) < 0)
|
|
|
|
#define ATOMIC_INIT(i) { (i) }
|
|
|
|
#include <asm-generic/atomic64.h>
|
|
|
|
#endif
|
|
|
|
#endif
|