mirror of
https://github.com/torvalds/linux.git
synced 2024-10-30 08:42:47 +00:00
5c01b46bb6
Memory management in generic is highly architecture specific, but on NOMMU architectures, it is mostly trivial, so just add a default implementation in asm-generic that applies to all NOMMU architectures. The two files cache.h and cacheflush.h can possibly also be used by architectures that have an MMU but never require flushing the cache or have cache lines larger than 32 bytes. Signed-off-by: Remis Lima Baima <remis.developer@googlemail.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
31 lines
1.2 KiB
C
31 lines
1.2 KiB
C
#ifndef __ASM_CACHEFLUSH_H
|
|
#define __ASM_CACHEFLUSH_H
|
|
|
|
/* Keep includes the same across arches. */
|
|
#include <linux/mm.h>
|
|
|
|
/*
|
|
* The cache doesn't need to be flushed when TLB entries change when
|
|
* the cache is mapped to physical memory, not virtual memory
|
|
*/
|
|
#define flush_cache_all() do { } while (0)
|
|
#define flush_cache_mm(mm) do { } while (0)
|
|
#define flush_cache_dup_mm(mm) do { } while (0)
|
|
#define flush_cache_range(vma, start, end) do { } while (0)
|
|
#define flush_cache_page(vma, vmaddr, pfn) do { } while (0)
|
|
#define flush_dcache_page(page) do { } while (0)
|
|
#define flush_dcache_mmap_lock(mapping) do { } while (0)
|
|
#define flush_dcache_mmap_unlock(mapping) do { } while (0)
|
|
#define flush_icache_range(start, end) do { } while (0)
|
|
#define flush_icache_page(vma,pg) do { } while (0)
|
|
#define flush_icache_user_range(vma,pg,adr,len) do { } while (0)
|
|
#define flush_cache_vmap(start, end) do { } while (0)
|
|
#define flush_cache_vunmap(start, end) do { } while (0)
|
|
|
|
#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
|
|
memcpy(dst, src, len)
|
|
#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
|
|
memcpy(dst, src, len)
|
|
|
|
#endif /* __ASM_CACHEFLUSH_H */
|