linux/include/soc
Vladimir Oltean 6505b68056 net: mscc: ocelot: add MAC Merge layer support for VSC9959
Felix (VSC9959) has a DEV_GMII:MM_CONFIG block composed of 2 registers
(ENABLE_CONFIG and VERIF_CONFIG). Because the MAC Merge statistics and
pMAC statistics are already in the Ocelot switch lib even if just Felix
supports them, I'm adding support for the whole MAC Merge layer in the
common Ocelot library too.

There is an interrupt (shared with the PTP interrupt) which signals
changes to the MM verification state. This is done because the
preemptible traffic classes should be committed to hardware only once
the verification procedure has declared the link partner of being
capable of receiving preemptible frames.

We implement ethtool getters and setters for the MAC Merge layer state.
The "TX enabled" and "verify status" are taken from the IRQ handler,
using a mutex to ensure serialized access.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2023-01-23 12:44:18 +00:00
..
amlogic perf/amlogic: Add support for Amlogic meson G12 SoC DDR PMU driver 2022-11-21 18:28:45 +00:00
arc clocksource/drivers/arc_timer: Eliminate redefined macro error 2021-10-16 22:15:01 +02:00
at91 ARM: at91: pm: avoid soft resetting AC DLL 2022-11-01 12:25:19 +02:00
bcm2835 firmware: raspberrypi: Provide a helper to query a clock max rate 2022-10-28 13:03:19 +02:00
canaan clk: Add RISC-V Canaan Kendryte K210 clock driver 2021-02-22 17:51:04 -08:00
fsl soc: fsl: qe: request pins non-exclusively 2022-12-05 18:19:34 +01:00
imx ARM: imx: Initialize SoC ID on i.MX50 2021-05-13 15:42:21 +08:00
mediatek memory: mtk-smi: Add enable IOMMU SMC command for MM master 2022-08-30 20:54:05 +03:00
microchip clk: microchip: mpfs: add reset controller 2022-09-14 10:55:17 +03:00
mscc net: mscc: ocelot: add MAC Merge layer support for VSC9959 2023-01-23 12:44:18 +00:00
qcom soc: qcom: spmi-pmic: add more PMIC SUBTYPE IDs 2022-10-17 14:56:14 -05:00
rockchip soc: rockchip: power-domain: Manage resource conflicts with firmware 2022-05-09 03:36:52 +09:00
sa1100 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500 2019-06-19 17:09:55 +02:00
sifive soc: sifive: ccache: Rename SiFive L2 cache to Composable cache. 2022-10-13 11:06:51 -07:00
tegra drm for 6.2: 2022-12-13 11:59:58 -08:00