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05593a3fd1
The STM32 low-power timer permits configuration of the clock polarity via the LPTIMX_CFGR register CKPOL bits. This patch provides preprocessor defines for the supported clock polarities. Cc: Fabrice Gasnier <fabrice.gasnier@foss.st.com> Signed-off-by: William Breathitt Gray <vilhelm.gray@gmail.com> Reviewed-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com> Link: https://lore.kernel.org/r/a111c8905c467805ca530728f88189b59430f27e.1630031207.git.vilhelm.gray@gmail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> |
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104-quad-8.c | ||
counter.c | ||
ftm-quaddec.c | ||
intel-qep.c | ||
interrupt-cnt.c | ||
Kconfig | ||
Makefile | ||
microchip-tcb-capture.c | ||
stm32-lptimer-cnt.c | ||
stm32-timer-cnt.c | ||
ti-eqep.c |