John David Anglin 027f27c4ec parisc: disable preemption while flushing D- or I-caches through TMPALIAS region ... It is necessary to disable preemption during cache flushes done through the TMPALIAS region to ensure that the TLB setup is not clobbered by another flush. Signed-off-by: John David Anglin <dave.anglin@bell.net> Signed-off-by: Helge Deller <deller@gmx.de>		2013-02-20 22:50:38 +01:00
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asm	parisc: disable preemption while flushing D- or I-caches through TMPALIAS region	2013-02-20 22:50:38 +01:00
uapi/asm	Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/signal	2012-12-20 18:05:28 -08:00