françois romieu 0c20494050 dmfe: enforce consistent timing delay. ... The driver does not always use the same timing for what looks like the same operations. - DCR0 Use the same udelay everywhere for reset. Upper bound is 100 us. - DCR9 Use 5us delay for srom clock. 1us delay for phy_write_1bit (writes PHY_DATA_[01]) are not changed as they stay withing a 2,5MHz MDIO clock range. Signed-off-by: Francois Romieu <romieu@fr.zoreil.com> Reviewed-by: Grant Grundler <grundler@parisc-linux.org> Signed-off-by: David S. Miller <davem@davemloft.net>		2012-04-17 22:54:13 -04:00
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tulip	dmfe: enforce consistent timing delay.	2012-04-17 22:54:13 -04:00
ewrk3.c	netdev: ethernet dev_alloc_skb to netdev_alloc_skb	2012-02-06 11:48:09 -05:00
ewrk3.h
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