mirror of
https://github.com/torvalds/linux.git
synced 2024-12-29 14:21:47 +00:00
5dcef69486
Broxton has all the HSW C-states, except C3. BXT C-state timing is slightly different. Here we trust the IRTL MSRs as authority on maximum C-state latency, and override the driver's tables with the values found in the associated IRTL MSRs. Further we set the target_residency to 1x maximum latency, trusting the hardware demotion logic. Signed-off-by: Len Brown <len.brown@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> |
||
---|---|---|
.. | ||
i7300_idle.c | ||
intel_idle.c | ||
Kconfig | ||
Makefile |