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01f48d308d
This patch is primarily a move of VP specific code from voltage.c into its own code in vp.c and adds prototypes to vp.h No functional changes, except debugfs... VP debugfs moved to 'vp' subdir of <debugfs>/voltage/ and 'vp_' prefixes removed from all debugfs filenames. Signed-off-by: Kevin Hilman <khilman@ti.com>
375 lines
11 KiB
C
375 lines
11 KiB
C
#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/debugfs.h>
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#include <plat/common.h>
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#include "voltage.h"
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#include "vp.h"
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#include "prm-regbits-34xx.h"
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#include "prm-regbits-44xx.h"
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#include "prm44xx.h"
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static void __init vp_debugfs_init(struct voltagedomain *voltdm);
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static void vp_latch_vsel(struct voltagedomain *voltdm)
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{
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struct omap_vp_instance_data *vp = voltdm->vdd->vp_data;
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u32 vpconfig;
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unsigned long uvdc;
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char vsel;
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struct omap_vdd_info *vdd = voltdm->vdd;
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uvdc = omap_voltage_get_nom_volt(voltdm);
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if (!uvdc) {
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pr_warning("%s: unable to find current voltage for vdd_%s\n",
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__func__, voltdm->name);
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return;
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}
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if (!vdd->pmic_info || !vdd->pmic_info->uv_to_vsel) {
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pr_warning("%s: PMIC function to convert voltage in uV to"
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" vsel not registered\n", __func__);
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return;
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}
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vsel = vdd->pmic_info->uv_to_vsel(uvdc);
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vpconfig = vdd->read_reg(vp->vp_common->prm_mod, vp->vpconfig);
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vpconfig &= ~(vp->vp_common->vpconfig_initvoltage_mask |
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vp->vp_common->vpconfig_initvdd);
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vpconfig |= vsel << vp->vp_common->vpconfig_initvoltage_shift;
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vdd->write_reg(vpconfig, vp->vp_common->prm_mod, vp->vpconfig);
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/* Trigger initVDD value copy to voltage processor */
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vdd->write_reg((vpconfig | vp->vp_common->vpconfig_initvdd),
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vp->vp_common->prm_mod, vp->vpconfig);
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/* Clear initVDD copy trigger bit */
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vdd->write_reg(vpconfig, vp->vp_common->prm_mod, vp->vpconfig);
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}
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/* Generic voltage init functions */
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void __init omap_vp_init(struct voltagedomain *voltdm)
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{
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struct omap_vp_instance_data *vp = voltdm->vdd->vp_data;
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struct omap_vdd_info *vdd = voltdm->vdd;
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u32 vp_val;
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if (!vdd->read_reg || !vdd->write_reg) {
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pr_err("%s: No read/write API for accessing vdd_%s regs\n",
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__func__, voltdm->name);
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return;
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}
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vp_val = vdd->vp_rt_data.vpconfig_erroroffset |
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(vdd->vp_rt_data.vpconfig_errorgain <<
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vp->vp_common->vpconfig_errorgain_shift) |
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vp->vp_common->vpconfig_timeouten;
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vdd->write_reg(vp_val, vp->vp_common->prm_mod, vp->vpconfig);
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vp_val = ((vdd->vp_rt_data.vstepmin_smpswaittimemin <<
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vp->vp_common->vstepmin_smpswaittimemin_shift) |
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(vdd->vp_rt_data.vstepmin_stepmin <<
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vp->vp_common->vstepmin_stepmin_shift));
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vdd->write_reg(vp_val, vp->vp_common->prm_mod, vp->vstepmin);
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vp_val = ((vdd->vp_rt_data.vstepmax_smpswaittimemax <<
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vp->vp_common->vstepmax_smpswaittimemax_shift) |
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(vdd->vp_rt_data.vstepmax_stepmax <<
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vp->vp_common->vstepmax_stepmax_shift));
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vdd->write_reg(vp_val, vp->vp_common->prm_mod, vp->vstepmax);
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vp_val = ((vdd->vp_rt_data.vlimitto_vddmax <<
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vp->vp_common->vlimitto_vddmax_shift) |
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(vdd->vp_rt_data.vlimitto_vddmin <<
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vp->vp_common->vlimitto_vddmin_shift) |
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(vdd->vp_rt_data.vlimitto_timeout <<
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vp->vp_common->vlimitto_timeout_shift));
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vdd->write_reg(vp_val, vp->vp_common->prm_mod, vp->vlimitto);
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vp_debugfs_init(voltdm);
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}
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/* VP force update method of voltage scaling */
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int omap_vp_forceupdate_scale(struct voltagedomain *voltdm,
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unsigned long target_volt)
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{
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struct omap_vp_instance_data *vp = voltdm->vdd->vp_data;
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struct omap_vdd_info *vdd = voltdm->vdd;
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u32 vpconfig;
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u8 target_vsel, current_vsel;
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int ret, timeout = 0;
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ret = omap_vc_pre_scale(voltdm, target_volt, &target_vsel, ¤t_vsel);
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if (ret)
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return ret;
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/*
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* Clear all pending TransactionDone interrupt/status. Typical latency
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* is <3us
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*/
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while (timeout++ < VP_TRANXDONE_TIMEOUT) {
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vdd->write_reg(vp->prm_irqst_data->tranxdone_status,
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vdd->prm_irqst_mod, vdd->prm_irqst_reg);
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if (!(vdd->read_reg(vdd->prm_irqst_mod, vdd->prm_irqst_reg) &
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vp->prm_irqst_data->tranxdone_status))
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break;
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udelay(1);
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}
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if (timeout >= VP_TRANXDONE_TIMEOUT) {
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pr_warning("%s: vdd_%s TRANXDONE timeout exceeded."
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"Voltage change aborted", __func__, voltdm->name);
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return -ETIMEDOUT;
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}
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/* Configure for VP-Force Update */
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vpconfig = vdd->read_reg(vp->vp_common->prm_mod, vp->vpconfig);
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vpconfig &= ~(vp->vp_common->vpconfig_initvdd |
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vp->vp_common->vpconfig_forceupdate |
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vp->vp_common->vpconfig_initvoltage_mask);
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vpconfig |= ((target_vsel <<
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vp->vp_common->vpconfig_initvoltage_shift));
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vdd->write_reg(vpconfig, vp->vp_common->prm_mod, vp->vpconfig);
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/* Trigger initVDD value copy to voltage processor */
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vpconfig |= vp->vp_common->vpconfig_initvdd;
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vdd->write_reg(vpconfig, vp->vp_common->prm_mod, vp->vpconfig);
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/* Force update of voltage */
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vpconfig |= vp->vp_common->vpconfig_forceupdate;
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vdd->write_reg(vpconfig, vp->vp_common->prm_mod, vp->vpconfig);
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/*
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* Wait for TransactionDone. Typical latency is <200us.
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* Depends on SMPSWAITTIMEMIN/MAX and voltage change
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*/
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timeout = 0;
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omap_test_timeout((vdd->read_reg(vdd->prm_irqst_mod,
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vdd->prm_irqst_reg) &
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vp->prm_irqst_data->tranxdone_status),
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VP_TRANXDONE_TIMEOUT, timeout);
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if (timeout >= VP_TRANXDONE_TIMEOUT)
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pr_err("%s: vdd_%s TRANXDONE timeout exceeded."
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"TRANXDONE never got set after the voltage update\n",
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__func__, voltdm->name);
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omap_vc_post_scale(voltdm, target_volt, target_vsel, current_vsel);
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/*
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* Disable TransactionDone interrupt , clear all status, clear
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* control registers
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*/
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timeout = 0;
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while (timeout++ < VP_TRANXDONE_TIMEOUT) {
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vdd->write_reg(vp->prm_irqst_data->tranxdone_status,
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vdd->prm_irqst_mod, vdd->prm_irqst_reg);
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if (!(vdd->read_reg(vdd->prm_irqst_mod, vdd->prm_irqst_reg) &
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vp->prm_irqst_data->tranxdone_status))
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break;
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udelay(1);
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}
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if (timeout >= VP_TRANXDONE_TIMEOUT)
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pr_warning("%s: vdd_%s TRANXDONE timeout exceeded while trying"
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"to clear the TRANXDONE status\n",
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__func__, voltdm->name);
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vpconfig = vdd->read_reg(vp->vp_common->prm_mod, vp->vpconfig);
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/* Clear initVDD copy trigger bit */
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vpconfig &= ~vp->vp_common->vpconfig_initvdd;
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vdd->write_reg(vpconfig, vp->vp_common->prm_mod, vp->vpconfig);
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/* Clear force bit */
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vpconfig &= ~vp->vp_common->vpconfig_forceupdate;
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vdd->write_reg(vpconfig, vp->vp_common->prm_mod, vp->vpconfig);
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return 0;
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}
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/**
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* omap_vp_get_curr_volt() - API to get the current vp voltage.
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* @voltdm: pointer to the VDD.
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*
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* This API returns the current voltage for the specified voltage processor
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*/
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unsigned long omap_vp_get_curr_volt(struct voltagedomain *voltdm)
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{
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struct omap_vp_instance_data *vp = voltdm->vdd->vp_data;
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struct omap_vdd_info *vdd;
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u8 curr_vsel;
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if (!voltdm || IS_ERR(voltdm)) {
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pr_warning("%s: VDD specified does not exist!\n", __func__);
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return 0;
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}
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vdd = voltdm->vdd;
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if (!vdd->read_reg) {
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pr_err("%s: No read API for reading vdd_%s regs\n",
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__func__, voltdm->name);
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return 0;
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}
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curr_vsel = vdd->read_reg(vp->vp_common->prm_mod, vp->voltage);
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if (!vdd->pmic_info || !vdd->pmic_info->vsel_to_uv) {
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pr_warning("%s: PMIC function to convert vsel to voltage"
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"in uV not registerd\n", __func__);
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return 0;
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}
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return vdd->pmic_info->vsel_to_uv(curr_vsel);
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}
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/**
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* omap_vp_enable() - API to enable a particular VP
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* @voltdm: pointer to the VDD whose VP is to be enabled.
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*
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* This API enables a particular voltage processor. Needed by the smartreflex
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* class drivers.
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*/
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void omap_vp_enable(struct voltagedomain *voltdm)
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{
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struct omap_vp_instance_data *vp;
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struct omap_vdd_info *vdd;
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u32 vpconfig;
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if (!voltdm || IS_ERR(voltdm)) {
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pr_warning("%s: VDD specified does not exist!\n", __func__);
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return;
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}
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vdd = voltdm->vdd;
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vp = voltdm->vdd->vp_data;
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if (!vdd->read_reg || !vdd->write_reg) {
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pr_err("%s: No read/write API for accessing vdd_%s regs\n",
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__func__, voltdm->name);
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return;
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}
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/* If VP is already enabled, do nothing. Return */
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if (vdd->vp_enabled)
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return;
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vp_latch_vsel(voltdm);
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/* Enable VP */
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vpconfig = vdd->read_reg(vp->vp_common->prm_mod, vp->vpconfig);
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vpconfig |= vp->vp_common->vpconfig_vpenable;
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vdd->write_reg(vpconfig, vp->vp_common->prm_mod, vp->vpconfig);
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vdd->vp_enabled = true;
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}
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/**
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* omap_vp_disable() - API to disable a particular VP
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* @voltdm: pointer to the VDD whose VP is to be disabled.
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*
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* This API disables a particular voltage processor. Needed by the smartreflex
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* class drivers.
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*/
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void omap_vp_disable(struct voltagedomain *voltdm)
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{
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struct omap_vp_instance_data *vp;
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struct omap_vdd_info *vdd;
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u32 vpconfig;
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int timeout;
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if (!voltdm || IS_ERR(voltdm)) {
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pr_warning("%s: VDD specified does not exist!\n", __func__);
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return;
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}
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vdd = voltdm->vdd;
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vp = voltdm->vdd->vp_data;
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if (!vdd->read_reg || !vdd->write_reg) {
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pr_err("%s: No read/write API for accessing vdd_%s regs\n",
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__func__, voltdm->name);
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return;
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}
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/* If VP is already disabled, do nothing. Return */
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if (!vdd->vp_enabled) {
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pr_warning("%s: Trying to disable VP for vdd_%s when"
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"it is already disabled\n", __func__, voltdm->name);
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return;
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}
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/* Disable VP */
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vpconfig = vdd->read_reg(vp->vp_common->prm_mod, vp->vpconfig);
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vpconfig &= ~vp->vp_common->vpconfig_vpenable;
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vdd->write_reg(vpconfig, vp->vp_common->prm_mod, vp->vpconfig);
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/*
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* Wait for VP idle Typical latency is <2us. Maximum latency is ~100us
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*/
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omap_test_timeout((vdd->read_reg(vp->vp_common->prm_mod, vp->vstatus)),
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VP_IDLE_TIMEOUT, timeout);
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if (timeout >= VP_IDLE_TIMEOUT)
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pr_warning("%s: vdd_%s idle timedout\n",
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__func__, voltdm->name);
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vdd->vp_enabled = false;
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return;
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}
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/* Voltage debugfs support */
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static int vp_volt_debug_get(void *data, u64 *val)
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{
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struct voltagedomain *voltdm = (struct voltagedomain *)data;
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struct omap_vp_instance_data *vp = voltdm->vdd->vp_data;
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struct omap_vdd_info *vdd = voltdm->vdd;
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u8 vsel;
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if (!vdd) {
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pr_warning("Wrong paramater passed\n");
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return -EINVAL;
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}
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vsel = vdd->read_reg(vp->vp_common->prm_mod, vp->voltage);
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if (!vdd->pmic_info->vsel_to_uv) {
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pr_warning("PMIC function to convert vsel to voltage"
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"in uV not registerd\n");
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return -EINVAL;
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}
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*val = vdd->pmic_info->vsel_to_uv(vsel);
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return 0;
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}
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DEFINE_SIMPLE_ATTRIBUTE(vp_volt_debug_fops, vp_volt_debug_get, NULL, "%llu\n");
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static void __init vp_debugfs_init(struct voltagedomain *voltdm)
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{
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struct omap_vdd_info *vdd = voltdm->vdd;
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struct dentry *debug_dir;
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debug_dir = debugfs_create_dir("vp", vdd->debug_dir);
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if (IS_ERR(debug_dir))
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pr_err("%s: Unable to create VP debugfs dir dir\n", __func__);
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(void) debugfs_create_x16("errorgain", S_IRUGO, debug_dir,
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&(vdd->vp_rt_data.vpconfig_errorgain));
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(void) debugfs_create_x16("smpswaittimemin", S_IRUGO,
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debug_dir,
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&(vdd->vp_rt_data.vstepmin_smpswaittimemin));
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(void) debugfs_create_x8("stepmin", S_IRUGO, debug_dir,
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&(vdd->vp_rt_data.vstepmin_stepmin));
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(void) debugfs_create_x16("smpswaittimemax", S_IRUGO,
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debug_dir,
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&(vdd->vp_rt_data.vstepmax_smpswaittimemax));
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(void) debugfs_create_x8("stepmax", S_IRUGO, debug_dir,
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&(vdd->vp_rt_data.vstepmax_stepmax));
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(void) debugfs_create_x8("vddmax", S_IRUGO, debug_dir,
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&(vdd->vp_rt_data.vlimitto_vddmax));
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(void) debugfs_create_x8("vddmin", S_IRUGO, debug_dir,
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&(vdd->vp_rt_data.vlimitto_vddmin));
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(void) debugfs_create_x16("timeout", S_IRUGO, debug_dir,
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&(vdd->vp_rt_data.vlimitto_timeout));
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(void) debugfs_create_file("curr_volt", S_IRUGO, debug_dir,
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(void *) voltdm, &vp_volt_debug_fops);
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}
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