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This patch enables support to read the ECC level from the NAND flash using ESMT SLC NAND ID byte 5 information as documented e.g. in the following data sheet: https://www.esmt.com.tw/upload/pdf/ESMT/datasheets/F59L1G81LA(2Y).pdf Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
48 lines
944 B
C
48 lines
944 B
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2018 Toradex AG
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*
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* Author: Marcel Ziswiler <marcel.ziswiler@toradex.com>
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*/
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#include <linux/mtd/rawnand.h>
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#include "internals.h"
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static void esmt_nand_decode_id(struct nand_chip *chip)
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{
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nand_decode_ext_id(chip);
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/* Extract ECC requirements from 5th id byte. */
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if (chip->id.len >= 5 && nand_is_slc(chip)) {
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chip->ecc_step_ds = 512;
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switch (chip->id.data[4] & 0x3) {
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case 0x0:
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chip->ecc_strength_ds = 4;
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break;
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case 0x1:
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chip->ecc_strength_ds = 2;
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break;
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case 0x2:
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chip->ecc_strength_ds = 1;
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break;
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default:
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WARN(1, "Could not get ECC info");
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chip->ecc_step_ds = 0;
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break;
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}
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}
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}
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static int esmt_nand_init(struct nand_chip *chip)
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{
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if (nand_is_slc(chip))
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chip->bbt_options |= NAND_BBT_SCAN2NDPAGE;
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return 0;
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}
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const struct nand_manufacturer_ops esmt_nand_manuf_ops = {
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.detect = esmt_nand_decode_id,
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.init = esmt_nand_init,
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};
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