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348d56a8c6
A lot of things defined in rawnand.h should not be exposed to NAND controller drivers and should only be shared by core files. Create the drivers/mtd/nand/raw/internals.h header to store such definitions, and move all private defs to this header. Also remove EXPORT_SYMBOLS() on functions that are not supposed to be exposed. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
52 lines
1.5 KiB
C
52 lines
1.5 KiB
C
/*
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* Copyright (C) 2017 Free Electrons
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* Copyright (C) 2017 NextThing Co
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*
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* Author: Boris Brezillon <boris.brezillon@free-electrons.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include "internals.h"
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static void amd_nand_decode_id(struct nand_chip *chip)
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{
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struct mtd_info *mtd = nand_to_mtd(chip);
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nand_decode_ext_id(chip);
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/*
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* Check for Spansion/AMD ID + repeating 5th, 6th byte since
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* some Spansion chips have erasesize that conflicts with size
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* listed in nand_ids table.
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* Data sheet (5 byte ID): Spansion S30ML-P ORNAND (p.39)
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*/
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if (chip->id.data[4] != 0x00 && chip->id.data[5] == 0x00 &&
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chip->id.data[6] == 0x00 && chip->id.data[7] == 0x00 &&
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mtd->writesize == 512) {
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mtd->erasesize = 128 * 1024;
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mtd->erasesize <<= ((chip->id.data[3] & 0x03) << 1);
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}
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}
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static int amd_nand_init(struct nand_chip *chip)
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{
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if (nand_is_slc(chip))
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chip->bbt_options |= NAND_BBT_SCAN2NDPAGE;
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return 0;
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}
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const struct nand_manufacturer_ops amd_nand_manuf_ops = {
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.detect = amd_nand_decode_id,
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.init = amd_nand_init,
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};
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