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7d6c37e90c
Now that the CS line to be selected is passed to ->exec_op() and stored in chip->cur_cs and after patching all drivers implementing ->exec_op() to stop implementing this method, we can deprecate it by moving it to the nand_legacy structure. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Tested-by: Janusz Krzysztofik <jmkrzyszt@gmail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
362 lines
8.7 KiB
C
362 lines
8.7 KiB
C
/*
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* Freescale UPM NAND driver.
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*
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* Copyright © 2007-2008 MontaVista Software, Inc.
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*
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* Author: Anton Vorontsov <avorontsov@ru.mvista.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/delay.h>
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#include <linux/mtd/rawnand.h>
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#include <linux/mtd/nand_ecc.h>
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#include <linux/mtd/partitions.h>
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#include <linux/mtd/mtd.h>
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#include <linux/of_address.h>
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#include <linux/of_platform.h>
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#include <linux/of_gpio.h>
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#include <linux/io.h>
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#include <linux/slab.h>
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#include <asm/fsl_lbc.h>
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#define FSL_UPM_WAIT_RUN_PATTERN 0x1
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#define FSL_UPM_WAIT_WRITE_BYTE 0x2
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#define FSL_UPM_WAIT_WRITE_BUFFER 0x4
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struct fsl_upm_nand {
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struct device *dev;
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struct nand_chip chip;
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int last_ctrl;
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struct mtd_partition *parts;
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struct fsl_upm upm;
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uint8_t upm_addr_offset;
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uint8_t upm_cmd_offset;
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void __iomem *io_base;
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int rnb_gpio[NAND_MAX_CHIPS];
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uint32_t mchip_offsets[NAND_MAX_CHIPS];
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uint32_t mchip_count;
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uint32_t mchip_number;
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int chip_delay;
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uint32_t wait_flags;
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};
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static inline struct fsl_upm_nand *to_fsl_upm_nand(struct mtd_info *mtdinfo)
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{
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return container_of(mtd_to_nand(mtdinfo), struct fsl_upm_nand,
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chip);
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}
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static int fun_chip_ready(struct nand_chip *chip)
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{
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struct fsl_upm_nand *fun = to_fsl_upm_nand(nand_to_mtd(chip));
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if (gpio_get_value(fun->rnb_gpio[fun->mchip_number]))
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return 1;
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dev_vdbg(fun->dev, "busy\n");
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return 0;
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}
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static void fun_wait_rnb(struct fsl_upm_nand *fun)
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{
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if (fun->rnb_gpio[fun->mchip_number] >= 0) {
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struct mtd_info *mtd = nand_to_mtd(&fun->chip);
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int cnt = 1000000;
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while (--cnt && !fun_chip_ready(&fun->chip))
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cpu_relax();
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if (!cnt)
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dev_err(fun->dev, "tired waiting for RNB\n");
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} else {
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ndelay(100);
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}
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}
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static void fun_cmd_ctrl(struct nand_chip *chip, int cmd, unsigned int ctrl)
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{
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struct fsl_upm_nand *fun = to_fsl_upm_nand(nand_to_mtd(chip));
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u32 mar;
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if (!(ctrl & fun->last_ctrl)) {
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fsl_upm_end_pattern(&fun->upm);
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if (cmd == NAND_CMD_NONE)
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return;
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fun->last_ctrl = ctrl & (NAND_ALE | NAND_CLE);
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}
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if (ctrl & NAND_CTRL_CHANGE) {
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if (ctrl & NAND_ALE)
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fsl_upm_start_pattern(&fun->upm, fun->upm_addr_offset);
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else if (ctrl & NAND_CLE)
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fsl_upm_start_pattern(&fun->upm, fun->upm_cmd_offset);
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}
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mar = (cmd << (32 - fun->upm.width)) |
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fun->mchip_offsets[fun->mchip_number];
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fsl_upm_run_pattern(&fun->upm, chip->legacy.IO_ADDR_R, mar);
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if (fun->wait_flags & FSL_UPM_WAIT_RUN_PATTERN)
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fun_wait_rnb(fun);
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}
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static void fun_select_chip(struct nand_chip *chip, int mchip_nr)
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{
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struct fsl_upm_nand *fun = to_fsl_upm_nand(nand_to_mtd(chip));
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if (mchip_nr == -1) {
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chip->legacy.cmd_ctrl(chip, NAND_CMD_NONE, 0 | NAND_CTRL_CHANGE);
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} else if (mchip_nr >= 0 && mchip_nr < NAND_MAX_CHIPS) {
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fun->mchip_number = mchip_nr;
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chip->legacy.IO_ADDR_R = fun->io_base + fun->mchip_offsets[mchip_nr];
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chip->legacy.IO_ADDR_W = chip->legacy.IO_ADDR_R;
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} else {
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BUG();
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}
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}
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static uint8_t fun_read_byte(struct nand_chip *chip)
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{
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struct fsl_upm_nand *fun = to_fsl_upm_nand(nand_to_mtd(chip));
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return in_8(fun->chip.legacy.IO_ADDR_R);
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}
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static void fun_read_buf(struct nand_chip *chip, uint8_t *buf, int len)
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{
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struct fsl_upm_nand *fun = to_fsl_upm_nand(nand_to_mtd(chip));
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int i;
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for (i = 0; i < len; i++)
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buf[i] = in_8(fun->chip.legacy.IO_ADDR_R);
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}
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static void fun_write_buf(struct nand_chip *chip, const uint8_t *buf, int len)
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{
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struct fsl_upm_nand *fun = to_fsl_upm_nand(nand_to_mtd(chip));
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int i;
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for (i = 0; i < len; i++) {
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out_8(fun->chip.legacy.IO_ADDR_W, buf[i]);
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if (fun->wait_flags & FSL_UPM_WAIT_WRITE_BYTE)
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fun_wait_rnb(fun);
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}
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if (fun->wait_flags & FSL_UPM_WAIT_WRITE_BUFFER)
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fun_wait_rnb(fun);
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}
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static int fun_chip_init(struct fsl_upm_nand *fun,
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const struct device_node *upm_np,
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const struct resource *io_res)
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{
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struct mtd_info *mtd = nand_to_mtd(&fun->chip);
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int ret;
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struct device_node *flash_np;
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fun->chip.legacy.IO_ADDR_R = fun->io_base;
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fun->chip.legacy.IO_ADDR_W = fun->io_base;
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fun->chip.legacy.cmd_ctrl = fun_cmd_ctrl;
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fun->chip.legacy.chip_delay = fun->chip_delay;
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fun->chip.legacy.read_byte = fun_read_byte;
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fun->chip.legacy.read_buf = fun_read_buf;
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fun->chip.legacy.write_buf = fun_write_buf;
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fun->chip.ecc.mode = NAND_ECC_SOFT;
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fun->chip.ecc.algo = NAND_ECC_HAMMING;
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if (fun->mchip_count > 1)
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fun->chip.legacy.select_chip = fun_select_chip;
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if (fun->rnb_gpio[0] >= 0)
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fun->chip.legacy.dev_ready = fun_chip_ready;
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mtd->dev.parent = fun->dev;
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flash_np = of_get_next_child(upm_np, NULL);
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if (!flash_np)
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return -ENODEV;
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nand_set_flash_node(&fun->chip, flash_np);
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mtd->name = kasprintf(GFP_KERNEL, "0x%llx.%pOFn", (u64)io_res->start,
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flash_np);
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if (!mtd->name) {
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ret = -ENOMEM;
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goto err;
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}
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ret = nand_scan(&fun->chip, fun->mchip_count);
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if (ret)
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goto err;
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ret = mtd_device_register(mtd, NULL, 0);
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err:
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of_node_put(flash_np);
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if (ret)
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kfree(mtd->name);
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return ret;
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}
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static int fun_probe(struct platform_device *ofdev)
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{
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struct fsl_upm_nand *fun;
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struct resource io_res;
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const __be32 *prop;
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int rnb_gpio;
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int ret;
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int size;
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int i;
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fun = kzalloc(sizeof(*fun), GFP_KERNEL);
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if (!fun)
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return -ENOMEM;
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ret = of_address_to_resource(ofdev->dev.of_node, 0, &io_res);
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if (ret) {
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dev_err(&ofdev->dev, "can't get IO base\n");
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goto err1;
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}
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ret = fsl_upm_find(io_res.start, &fun->upm);
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if (ret) {
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dev_err(&ofdev->dev, "can't find UPM\n");
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goto err1;
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}
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prop = of_get_property(ofdev->dev.of_node, "fsl,upm-addr-offset",
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&size);
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if (!prop || size != sizeof(uint32_t)) {
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dev_err(&ofdev->dev, "can't get UPM address offset\n");
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ret = -EINVAL;
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goto err1;
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}
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fun->upm_addr_offset = *prop;
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prop = of_get_property(ofdev->dev.of_node, "fsl,upm-cmd-offset", &size);
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if (!prop || size != sizeof(uint32_t)) {
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dev_err(&ofdev->dev, "can't get UPM command offset\n");
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ret = -EINVAL;
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goto err1;
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}
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fun->upm_cmd_offset = *prop;
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prop = of_get_property(ofdev->dev.of_node,
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"fsl,upm-addr-line-cs-offsets", &size);
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if (prop && (size / sizeof(uint32_t)) > 0) {
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fun->mchip_count = size / sizeof(uint32_t);
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if (fun->mchip_count >= NAND_MAX_CHIPS) {
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dev_err(&ofdev->dev, "too much multiple chips\n");
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goto err1;
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}
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for (i = 0; i < fun->mchip_count; i++)
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fun->mchip_offsets[i] = be32_to_cpu(prop[i]);
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} else {
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fun->mchip_count = 1;
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}
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for (i = 0; i < fun->mchip_count; i++) {
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fun->rnb_gpio[i] = -1;
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rnb_gpio = of_get_gpio(ofdev->dev.of_node, i);
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if (rnb_gpio >= 0) {
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ret = gpio_request(rnb_gpio, dev_name(&ofdev->dev));
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if (ret) {
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dev_err(&ofdev->dev,
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"can't request RNB gpio #%d\n", i);
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goto err2;
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}
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gpio_direction_input(rnb_gpio);
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fun->rnb_gpio[i] = rnb_gpio;
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} else if (rnb_gpio == -EINVAL) {
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dev_err(&ofdev->dev, "RNB gpio #%d is invalid\n", i);
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goto err2;
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}
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}
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prop = of_get_property(ofdev->dev.of_node, "chip-delay", NULL);
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if (prop)
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fun->chip_delay = be32_to_cpup(prop);
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else
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fun->chip_delay = 50;
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prop = of_get_property(ofdev->dev.of_node, "fsl,upm-wait-flags", &size);
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if (prop && size == sizeof(uint32_t))
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fun->wait_flags = be32_to_cpup(prop);
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else
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fun->wait_flags = FSL_UPM_WAIT_RUN_PATTERN |
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FSL_UPM_WAIT_WRITE_BYTE;
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fun->io_base = devm_ioremap_nocache(&ofdev->dev, io_res.start,
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resource_size(&io_res));
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if (!fun->io_base) {
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ret = -ENOMEM;
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goto err2;
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}
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fun->dev = &ofdev->dev;
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fun->last_ctrl = NAND_CLE;
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ret = fun_chip_init(fun, ofdev->dev.of_node, &io_res);
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if (ret)
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goto err2;
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dev_set_drvdata(&ofdev->dev, fun);
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return 0;
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err2:
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for (i = 0; i < fun->mchip_count; i++) {
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if (fun->rnb_gpio[i] < 0)
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break;
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gpio_free(fun->rnb_gpio[i]);
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}
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err1:
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kfree(fun);
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return ret;
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}
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static int fun_remove(struct platform_device *ofdev)
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{
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struct fsl_upm_nand *fun = dev_get_drvdata(&ofdev->dev);
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struct mtd_info *mtd = nand_to_mtd(&fun->chip);
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int i;
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nand_release(&fun->chip);
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kfree(mtd->name);
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for (i = 0; i < fun->mchip_count; i++) {
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if (fun->rnb_gpio[i] < 0)
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break;
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gpio_free(fun->rnb_gpio[i]);
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}
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kfree(fun);
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return 0;
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}
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static const struct of_device_id of_fun_match[] = {
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{ .compatible = "fsl,upm-nand" },
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{},
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};
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MODULE_DEVICE_TABLE(of, of_fun_match);
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static struct platform_driver of_fun_driver = {
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.driver = {
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.name = "fsl,upm-nand",
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.of_match_table = of_fun_match,
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},
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.probe = fun_probe,
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.remove = fun_remove,
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};
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module_platform_driver(of_fun_driver);
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MODULE_LICENSE("GPL");
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MODULE_AUTHOR("Anton Vorontsov <avorontsov@ru.mvista.com>");
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MODULE_DESCRIPTION("Driver for NAND chips working through Freescale "
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"LocalBus User-Programmable Machine");
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