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To allow for assigning a suitable parent to the struct pmu device update the documentation to describe the device via the event_source bus where it will remain accessible. For the ABI documention file also rename the file as it is named after the path. Reviewed-by: Yicong Yang <yangyicong@hisilicon.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20240412161057.14099-30-Jonathan.Cameron@huawei.com
114 lines
5.1 KiB
Plaintext
114 lines
5.1 KiB
Plaintext
What: /sys/bus/event_source/devices/hisi_ptt<sicl_id>_<core_id>/tune
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Date: October 2022
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KernelVersion: 6.1
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Contact: Yicong Yang <yangyicong@hisilicon.com>
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Description: This directory contains files for tuning the PCIe link
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parameters(events). Each file is named after the event
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of the PCIe link.
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See Documentation/trace/hisi-ptt.rst for more information.
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What: /sys/bus/event_source/devices/hisi_ptt<sicl_id>_<core_id>/tune/qos_tx_cpl
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Date: October 2022
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KernelVersion: 6.1
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Contact: Yicong Yang <yangyicong@hisilicon.com>
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Description: (RW) Controls the weight of Tx completion TLPs, which influence
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the proportion of outbound completion TLPs on the PCIe link.
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The available tune data is [0, 1, 2]. Writing a negative value
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will return an error, and out of range values will be converted
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to 2. The value indicates a probable level of the event.
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What: /sys/bus/event_source/devices/hisi_ptt<sicl_id>_<core_id>/tune/qos_tx_np
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Date: October 2022
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KernelVersion: 6.1
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Contact: Yicong Yang <yangyicong@hisilicon.com>
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Description: (RW) Controls the weight of Tx non-posted TLPs, which influence
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the proportion of outbound non-posted TLPs on the PCIe link.
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The available tune data is [0, 1, 2]. Writing a negative value
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will return an error, and out of range values will be converted
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to 2. The value indicates a probable level of the event.
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What: /sys/bus/event_source/devices/hisi_ptt<sicl_id>_<core_id>/tune/qos_tx_p
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Date: October 2022
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KernelVersion: 6.1
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Contact: Yicong Yang <yangyicong@hisilicon.com>
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Description: (RW) Controls the weight of Tx posted TLPs, which influence the
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proportion of outbound posted TLPs on the PCIe link.
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The available tune data is [0, 1, 2]. Writing a negative value
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will return an error, and out of range values will be converted
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to 2. The value indicates a probable level of the event.
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What: /sys/bus/event_source/devices/hisi_ptt<sicl_id>_<core_id>/tune/rx_alloc_buf_level
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Date: October 2022
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KernelVersion: 6.1
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Contact: Yicong Yang <yangyicong@hisilicon.com>
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Description: (RW) Control the allocated buffer watermark for inbound packets.
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The packets will be stored in the buffer first and then transmitted
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either when the watermark reached or when timed out.
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The available tune data is [0, 1, 2]. Writing a negative value
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will return an error, and out of range values will be converted
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to 2. The value indicates a probable level of the event.
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What: /sys/bus/event_source/devices/hisi_ptt<sicl_id>_<core_id>/tune/tx_alloc_buf_level
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Date: October 2022
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KernelVersion: 6.1
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Contact: Yicong Yang <yangyicong@hisilicon.com>
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Description: (RW) Control the allocated buffer watermark of outbound packets.
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The packets will be stored in the buffer first and then transmitted
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either when the watermark reached or when timed out.
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The available tune data is [0, 1, 2]. Writing a negative value
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will return an error, and out of range values will be converted
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to 2. The value indicates a probable level of the event.
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What: /sys/devices/hisi_ptt<sicl_id>_<core_id>/root_port_filters
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Date: May 2023
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KernelVersion: 6.5
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Contact: Yicong Yang <yangyicong@hisilicon.com>
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Description: This directory contains the files providing the PCIe Root Port filters
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information used for PTT trace. Each file is named after the supported
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Root Port device name <domain>:<bus>:<device>.<function>.
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See the description of the "filter" in Documentation/trace/hisi-ptt.rst
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for more information.
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What: /sys/devices/hisi_ptt<sicl_id>_<core_id>/root_port_filters/multiselect
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Date: May 2023
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KernelVersion: 6.5
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Contact: Yicong Yang <yangyicong@hisilicon.com>
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Description: (Read) Indicates if this kind of filter can be selected at the same
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time as others filters, or must be used on it's own. 1 indicates
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the former case and 0 indicates the latter.
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What: /sys/devices/hisi_ptt<sicl_id>_<core_id>/root_port_filters/<bdf>
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Date: May 2023
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KernelVersion: 6.5
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Contact: Yicong Yang <yangyicong@hisilicon.com>
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Description: (Read) Indicates the filter value of this Root Port filter, which
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can be used to control the TLP headers to trace by the PTT trace.
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What: /sys/devices/hisi_ptt<sicl_id>_<core_id>/requester_filters
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Date: May 2023
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KernelVersion: 6.5
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Contact: Yicong Yang <yangyicong@hisilicon.com>
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Description: This directory contains the files providing the PCIe Requester filters
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information used for PTT trace. Each file is named after the supported
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Endpoint device name <domain>:<bus>:<device>.<function>.
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See the description of the "filter" in Documentation/trace/hisi-ptt.rst
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for more information.
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What: /sys/devices/hisi_ptt<sicl_id>_<core_id>/requester_filters/multiselect
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Date: May 2023
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KernelVersion: 6.5
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Contact: Yicong Yang <yangyicong@hisilicon.com>
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Description: (Read) Indicates if this kind of filter can be selected at the same
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time as others filters, or must be used on it's own. 1 indicates
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the former case and 0 indicates the latter.
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What: /sys/devices/hisi_ptt<sicl_id>_<core_id>/requester_filters/<bdf>
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Date: May 2023
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KernelVersion: 6.5
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Contact: Yicong Yang <yangyicong@hisilicon.com>
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Description: (Read) Indicates the filter value of this Requester filter, which
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can be used to control the TLP headers to trace by the PTT trace.
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