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0028016699
Added support for the Freescale MPC8343e-mITX board. Currently based on the 8343 SYS code. The 2nd PHY (5-port switch) and SATA are untested (work in progress). Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
157 lines
3.6 KiB
C
157 lines
3.6 KiB
C
/*
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* arch/powerpc/platforms/83xx/mpc834x_itx.c
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*
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* MPC834x ITX board specific routines
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*
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* Maintainer: Kumar Gala <galak@kernel.crashing.org>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#include <linux/config.h>
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#include <linux/stddef.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/errno.h>
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#include <linux/reboot.h>
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#include <linux/pci.h>
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#include <linux/kdev_t.h>
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#include <linux/major.h>
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#include <linux/console.h>
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#include <linux/delay.h>
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#include <linux/seq_file.h>
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#include <linux/root_dev.h>
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#include <asm/system.h>
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#include <asm/atomic.h>
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#include <asm/time.h>
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#include <asm/io.h>
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#include <asm/machdep.h>
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#include <asm/ipic.h>
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#include <asm/bootinfo.h>
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#include <asm/irq.h>
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#include <asm/prom.h>
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#include <asm/udbg.h>
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#include <sysdev/fsl_soc.h>
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#include "mpc83xx.h"
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#include <platforms/83xx/mpc834x_sys.h>
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#ifndef CONFIG_PCI
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unsigned long isa_io_base = 0;
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unsigned long isa_mem_base = 0;
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#endif
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#ifdef CONFIG_PCI
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static int
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mpc83xx_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
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{
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static char pci_irq_table[][4] =
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/*
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* PCI IDSEL/INTPIN->INTLINE
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* A B C D
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*/
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{
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{PIRQB, PIRQC, PIRQD, PIRQA}, /* idsel 0x0e */
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{PIRQA, PIRQB, PIRQC, PIRQD}, /* idsel 0x0f */
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{PIRQC, PIRQD, PIRQA, PIRQB}, /* idsel 0x10 */
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};
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const long min_idsel = 0x0e, max_idsel = 0x10, irqs_per_slot = 4;
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return PCI_IRQ_TABLE_LOOKUP;
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}
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#endif /* CONFIG_PCI */
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/* ************************************************************************
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*
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* Setup the architecture
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*
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*/
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static void __init mpc834x_itx_setup_arch(void)
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{
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struct device_node *np;
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if (ppc_md.progress)
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ppc_md.progress("mpc834x_itx_setup_arch()", 0);
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np = of_find_node_by_type(NULL, "cpu");
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if (np != 0) {
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unsigned int *fp =
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(int *)get_property(np, "clock-frequency", NULL);
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if (fp != 0)
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loops_per_jiffy = *fp / HZ;
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else
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loops_per_jiffy = 50000000 / HZ;
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of_node_put(np);
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}
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#ifdef CONFIG_PCI
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for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;)
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add_bridge(np);
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ppc_md.pci_swizzle = common_swizzle;
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ppc_md.pci_map_irq = mpc83xx_map_irq;
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ppc_md.pci_exclude_device = mpc83xx_exclude_device;
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#endif
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#ifdef CONFIG_ROOT_NFS
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ROOT_DEV = Root_NFS;
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#else
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ROOT_DEV = Root_HDA1;
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#endif
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}
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void __init mpc834x_itx_init_IRQ(void)
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{
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u8 senses[8] = {
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0, /* EXT 0 */
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IRQ_SENSE_LEVEL, /* EXT 1 */
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IRQ_SENSE_LEVEL, /* EXT 2 */
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0, /* EXT 3 */
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#ifdef CONFIG_PCI
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IRQ_SENSE_LEVEL, /* EXT 4 */
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IRQ_SENSE_LEVEL, /* EXT 5 */
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IRQ_SENSE_LEVEL, /* EXT 6 */
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IRQ_SENSE_LEVEL, /* EXT 7 */
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#else
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0, /* EXT 4 */
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0, /* EXT 5 */
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0, /* EXT 6 */
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0, /* EXT 7 */
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#endif
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};
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ipic_init(get_immrbase() + 0x00700, 0, 0, senses, 8);
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/* Initialize the default interrupt mapping priorities,
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* in case the boot rom changed something on us.
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*/
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ipic_set_default_priority();
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}
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/*
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* Called very early, MMU is off, device-tree isn't unflattened
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*/
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static int __init mpc834x_itx_probe(void)
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{
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/* We always match for now, eventually we should look at the flat
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dev tree to ensure this is the board we are suppose to run on
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*/
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return 1;
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}
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define_machine(mpc834x_itx) {
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.name = "MPC834x ITX",
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.probe = mpc834x_itx_probe,
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.setup_arch = mpc834x_itx_setup_arch,
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.init_IRQ = mpc834x_itx_init_IRQ,
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.get_irq = ipic_get_irq,
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.restart = mpc83xx_restart,
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.time_init = mpc83xx_time_init,
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.calibrate_decr = generic_calibrate_decr,
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.progress = udbg_progress,
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};
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