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cd99b9eb4b
- Work from Carlos Bilbao to integrate rustdoc output into the generated
HTML documentation. This took some work to figure out how to do it
without slowing the docs build and without creating people who don't have
Rust installed, but Carlos got there.
- Move the loongarch and mips architecture documentation under
Documentation/arch/.
- Some more maintainer documentation from Jakub
...plus the usual assortment of updates, translations, and fixes.
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Merge tag 'docs-6.6' of git://git.lwn.net/linux
Pull documentation updates from Jonathan Corbet:
"Documentation work keeps chugging along; this includes:
- Work from Carlos Bilbao to integrate rustdoc output into the
generated HTML documentation. This took some work to figure out how
to do it without slowing the docs build and without creating people
who don't have Rust installed, but Carlos got there
- Move the loongarch and mips architecture documentation under
Documentation/arch/
- Some more maintainer documentation from Jakub
... plus the usual assortment of updates, translations, and fixes"
* tag 'docs-6.6' of git://git.lwn.net/linux: (56 commits)
Docu: genericirq.rst: fix irq-example
input: docs: pxrc: remove reference to phoenix-sim
Documentation: serial-console: Fix literal block marker
docs/mm: remove references to hmm_mirror ops and clean typos
docs/zh_CN: correct regi_chg(),regi_add() to region_chg(),region_add()
Documentation: Fix typos
Documentation/ABI: Fix typos
scripts: kernel-doc: fix macro handling in enums
scripts: kernel-doc: parse DEFINE_DMA_UNMAP_[ADDR|LEN]
Documentation: riscv: Update boot image header since EFI stub is supported
Documentation: riscv: Add early boot document
Documentation: arm: Add bootargs to the table of added DT parameters
docs: kernel-parameters: Refer to the correct bitmap function
doc: update params of memhp_default_state=
docs: Add book to process/kernel-docs.rst
docs: sparse: fix invalid link addresses
docs: vfs: clean up after the iterate() removal
docs: Add a section on surveys to the researcher guidelines
docs: move mips under arch
docs: move loongarch under arch
...
153 lines
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ReStructuredText
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ReStructuredText
=========================================
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I915 GuC Submission/DRM Scheduler Section
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=========================================
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Upstream plan
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=============
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For upstream the overall plan for landing GuC submission and integrating the
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i915 with the DRM scheduler is:
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* Merge basic GuC submission
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* Basic submission support for all gen11+ platforms
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* Not enabled by default on any current platforms but can be enabled via
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modparam enable_guc
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* Lots of rework will need to be done to integrate with DRM scheduler so
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no need to nit pick everything in the code, it just should be
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functional, no major coding style / layering errors, and not regress
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execlists
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* Update IGTs / selftests as needed to work with GuC submission
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* Enable CI on supported platforms for a baseline
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* Rework / get CI heathly for GuC submission in place as needed
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* Merge new parallel submission uAPI
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* Bonding uAPI completely incompatible with GuC submission, plus it has
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severe design issues in general, which is why we want to retire it no
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matter what
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* New uAPI adds I915_CONTEXT_ENGINES_EXT_PARALLEL context setup step
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which configures a slot with N contexts
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* After I915_CONTEXT_ENGINES_EXT_PARALLEL a user can submit N batches to
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a slot in a single execbuf IOCTL and the batches run on the GPU in
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paralllel
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* Initially only for GuC submission but execlists can be supported if
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needed
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* Convert the i915 to use the DRM scheduler
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* GuC submission backend fully integrated with DRM scheduler
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* All request queues removed from backend (e.g. all backpressure
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handled in DRM scheduler)
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* Resets / cancels hook in DRM scheduler
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* Watchdog hooks into DRM scheduler
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* Lots of complexity of the GuC backend can be pulled out once
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integrated with DRM scheduler (e.g. state machine gets
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simpler, locking gets simpler, etc...)
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* Execlists backend will minimum required to hook in the DRM scheduler
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* Legacy interface
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* Features like timeslicing / preemption / virtual engines would
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be difficult to integrate with the DRM scheduler and these
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features are not required for GuC submission as the GuC does
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these things for us
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* ROI low on fully integrating into DRM scheduler
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* Fully integrating would add lots of complexity to DRM
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scheduler
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* Port i915 priority inheritance / boosting feature in DRM scheduler
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* Used for i915 page flip, may be useful to other DRM drivers as
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well
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* Will be an optional feature in the DRM scheduler
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* Remove in-order completion assumptions from DRM scheduler
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* Even when using the DRM scheduler the backends will handle
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preemption, timeslicing, etc... so it is possible for jobs to
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finish out of order
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* Pull out i915 priority levels and use DRM priority levels
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* Optimize DRM scheduler as needed
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TODOs for GuC submission upstream
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=================================
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* Need an update to GuC firmware / i915 to enable error state capture
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* Open source tool to decode GuC logs
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* Public GuC spec
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New uAPI for basic GuC submission
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=================================
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No major changes are required to the uAPI for basic GuC submission. The only
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change is a new scheduler attribute: I915_SCHEDULER_CAP_STATIC_PRIORITY_MAP.
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This attribute indicates the 2k i915 user priority levels are statically mapped
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into 3 levels as follows:
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* -1k to -1 Low priority
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* 0 Medium priority
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* 1 to 1k High priority
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This is needed because the GuC only has 4 priority bands. The highest priority
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band is reserved with the kernel. This aligns with the DRM scheduler priority
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levels too.
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Spec references:
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----------------
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* https://www.khronos.org/registry/EGL/extensions/IMG/EGL_IMG_context_priority.txt
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* https://www.khronos.org/registry/vulkan/specs/1.2-extensions/html/chap5.html#devsandqueues-priority
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* https://spec.oneapi.com/level-zero/latest/core/api.html#ze-command-queue-priority-t
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New parallel submission uAPI
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============================
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The existing bonding uAPI is completely broken with GuC submission because
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whether a submission is a single context submit or parallel submit isn't known
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until execbuf time activated via the I915_SUBMIT_FENCE. To submit multiple
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contexts in parallel with the GuC the context must be explicitly registered with
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N contexts and all N contexts must be submitted in a single command to the GuC.
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The GuC interfaces do not support dynamically changing between N contexts as the
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bonding uAPI does. Hence the need for a new parallel submission interface. Also
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the legacy bonding uAPI is quite confusing and not intuitive at all. Furthermore
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I915_SUBMIT_FENCE is by design a future fence, so not really something we should
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continue to support.
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The new parallel submission uAPI consists of 3 parts:
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* Export engines logical mapping
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* A 'set_parallel' extension to configure contexts for parallel
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submission
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* Extend execbuf2 IOCTL to support submitting N BBs in a single IOCTL
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Export engines logical mapping
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------------------------------
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Certain use cases require BBs to be placed on engine instances in logical order
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(e.g. split-frame on gen11+). The logical mapping of engine instances can change
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based on fusing. Rather than making UMDs be aware of fusing, simply expose the
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logical mapping with the existing query engine info IOCTL. Also the GuC
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submission interface currently only supports submitting multiple contexts to
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engines in logical order which is a new requirement compared to execlists.
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Lastly, all current platforms have at most 2 engine instances and the logical
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order is the same as uAPI order. This will change on platforms with more than 2
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engine instances.
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A single bit will be added to drm_i915_engine_info.flags indicating that the
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logical instance has been returned and a new field,
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drm_i915_engine_info.logical_instance, returns the logical instance.
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A 'set_parallel' extension to configure contexts for parallel submission
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------------------------------------------------------------------------
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The 'set_parallel' extension configures a slot for parallel submission of N BBs.
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It is a setup step that must be called before using any of the contexts. See
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I915_CONTEXT_ENGINES_EXT_LOAD_BALANCE or I915_CONTEXT_ENGINES_EXT_BOND for
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similar existing examples. Once a slot is configured for parallel submission the
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execbuf2 IOCTL can be called submitting N BBs in a single IOCTL. Initially only
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supports GuC submission. Execlists supports can be added later if needed.
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Add I915_CONTEXT_ENGINES_EXT_PARALLEL_SUBMIT and
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drm_i915_context_engines_parallel_submit to the uAPI to implement this
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extension.
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.. c:namespace-push:: rfc
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.. kernel-doc:: include/uapi/drm/i915_drm.h
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:functions: i915_context_engines_parallel_submit
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.. c:namespace-pop::
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Extend execbuf2 IOCTL to support submitting N BBs in a single IOCTL
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-------------------------------------------------------------------
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Contexts that have been configured with the 'set_parallel' extension can only
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submit N BBs in a single execbuf2 IOCTL. The BBs are either the last N objects
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in the drm_i915_gem_exec_object2 list or the first N if I915_EXEC_BATCH_FIRST is
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set. The number of BBs is implicit based on the slot submitted and how it has
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been configured by 'set_parallel' or other extensions. No uAPI changes are
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required to the execbuf2 IOCTL.
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