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Add documentation to describe the DesginWare-based GMAC controllers in the T-HEAD TH1520 SoC. Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Jisheng Zhang <jszhang@kernel.org> Signed-off-by: Emil Renner Berthing <emil.renner.berthing@canonical.com> Signed-off-by: Drew Fustini <dfustini@tenstorrent.com> Link: https://patch.msgid.link/20241103-th1520-gmac-v7-1-ef094a30169c@tenstorrent.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
111 lines
2.8 KiB
YAML
111 lines
2.8 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/net/thead,th1520-gmac.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: T-HEAD TH1520 GMAC Ethernet controller
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maintainers:
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- Drew Fustini <dfustini@tenstorrent.com>
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description: |
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The TH1520 GMAC is described in the TH1520 Peripheral Interface User Manual
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https://git.beagleboard.org/beaglev-ahead/beaglev-ahead/-/tree/main/docs
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Features include
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- Compliant with IEEE802.3 Specification
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- IEEE 1588-2008 standard for precision networked clock synchronization
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- Supports 10/100/1000Mbps data transfer rate
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- Supports RGMII/MII interface
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- Preamble and start of frame data (SFD) insertion in Transmit path
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- Preamble and SFD deletion in the Receive path
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- Automatic CRC and pad generation options for receive frames
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- MDIO master interface for PHY device configuration and management
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The GMAC Registers consists of two parts
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- APB registers are used to configure clock frequency/clock enable/clock
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direction/PHY interface type.
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- AHB registers are use to configure GMAC core (DesignWare Core part).
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GMAC core register consists of DMA registers and GMAC registers.
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select:
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properties:
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compatible:
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contains:
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enum:
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- thead,th1520-gmac
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required:
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- compatible
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allOf:
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- $ref: snps,dwmac.yaml#
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properties:
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compatible:
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items:
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- enum:
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- thead,th1520-gmac
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- const: snps,dwmac-3.70a
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reg:
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items:
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- description: DesignWare GMAC IP core registers
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- description: GMAC APB registers
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reg-names:
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items:
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- const: dwmac
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- const: apb
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clocks:
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items:
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- description: GMAC main clock
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- description: Peripheral registers interface clock
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clock-names:
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items:
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- const: stmmaceth
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- const: pclk
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interrupts:
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items:
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- description: Combined signal for various interrupt events
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interrupt-names:
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items:
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- const: macirq
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required:
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- clocks
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- clock-names
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unevaluatedProperties: false
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examples:
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- |
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gmac0: ethernet@e7070000 {
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compatible = "thead,th1520-gmac", "snps,dwmac-3.70a";
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reg = <0xe7070000 0x2000>, <0xec003000 0x1000>;
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reg-names = "dwmac", "apb";
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clocks = <&clk 1>, <&clk 2>;
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clock-names = "stmmaceth", "pclk";
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interrupts = <66>;
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interrupt-names = "macirq";
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phy-mode = "rgmii-id";
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snps,fixed-burst;
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snps,axi-config = <&stmmac_axi_setup>;
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snps,pbl = <32>;
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phy-handle = <&phy0>;
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mdio {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "snps,dwmac-mdio";
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phy0: ethernet-phy@0 {
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reg = <0>;
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};
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};
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};
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