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Move the x86 documentation under Documentation/arch/ as a way of cleaning up the top-level directory and making the structure of our docs more closely match the structure of the source directories it describes. All in-kernel references to the old paths have been updated. Acked-by: Dave Hansen <dave.hansen@linux.intel.com> Cc: linux-arch@vger.kernel.org Cc: x86@kernel.org Cc: Borislav Petkov <bp@alien8.de> Cc: Thomas Gleixner <tglx@linutronix.de> Link: https://lore.kernel.org/lkml/20230315211523.108836-1-corbet@lwn.net/ Signed-off-by: Jonathan Corbet <corbet@lwn.net>
241 lines
12 KiB
ReStructuredText
241 lines
12 KiB
ReStructuredText
.. SPDX-License-Identifier: GPL-2.0
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==========================
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PAT (Page Attribute Table)
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==========================
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x86 Page Attribute Table (PAT) allows for setting the memory attribute at the
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page level granularity. PAT is complementary to the MTRR settings which allows
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for setting of memory types over physical address ranges. However, PAT is
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more flexible than MTRR due to its capability to set attributes at page level
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and also due to the fact that there are no hardware limitations on number of
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such attribute settings allowed. Added flexibility comes with guidelines for
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not having memory type aliasing for the same physical memory with multiple
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virtual addresses.
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PAT allows for different types of memory attributes. The most commonly used
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ones that will be supported at this time are:
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=== ==============
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WB Write-back
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UC Uncached
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WC Write-combined
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WT Write-through
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UC- Uncached Minus
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=== ==============
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PAT APIs
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========
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There are many different APIs in the kernel that allows setting of memory
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attributes at the page level. In order to avoid aliasing, these interfaces
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should be used thoughtfully. Below is a table of interfaces available,
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their intended usage and their memory attribute relationships. Internally,
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these APIs use a reserve_memtype()/free_memtype() interface on the physical
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address range to avoid any aliasing.
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+------------------------+----------+--------------+------------------+
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| API | RAM | ACPI,... | Reserved/Holes |
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+------------------------+----------+--------------+------------------+
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| ioremap | -- | UC- | UC- |
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+------------------------+----------+--------------+------------------+
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| ioremap_cache | -- | WB | WB |
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+------------------------+----------+--------------+------------------+
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| ioremap_uc | -- | UC | UC |
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+------------------------+----------+--------------+------------------+
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| ioremap_wc | -- | -- | WC |
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+------------------------+----------+--------------+------------------+
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| ioremap_wt | -- | -- | WT |
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+------------------------+----------+--------------+------------------+
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| set_memory_uc, | UC- | -- | -- |
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| set_memory_wb | | | |
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+------------------------+----------+--------------+------------------+
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| set_memory_wc, | WC | -- | -- |
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| set_memory_wb | | | |
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+------------------------+----------+--------------+------------------+
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| set_memory_wt, | WT | -- | -- |
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| set_memory_wb | | | |
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+------------------------+----------+--------------+------------------+
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| pci sysfs resource | -- | -- | UC- |
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+------------------------+----------+--------------+------------------+
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| pci sysfs resource_wc | -- | -- | WC |
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| is IORESOURCE_PREFETCH | | | |
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+------------------------+----------+--------------+------------------+
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| pci proc | -- | -- | UC- |
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| !PCIIOC_WRITE_COMBINE | | | |
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+------------------------+----------+--------------+------------------+
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| pci proc | -- | -- | WC |
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| PCIIOC_WRITE_COMBINE | | | |
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+------------------------+----------+--------------+------------------+
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| /dev/mem | -- | WB/WC/UC- | WB/WC/UC- |
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| read-write | | | |
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+------------------------+----------+--------------+------------------+
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| /dev/mem | -- | UC- | UC- |
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| mmap SYNC flag | | | |
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+------------------------+----------+--------------+------------------+
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| /dev/mem | -- | WB/WC/UC- | WB/WC/UC- |
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| mmap !SYNC flag | | | |
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| and | |(from existing| (from existing |
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| any alias to this area | |alias) | alias) |
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+------------------------+----------+--------------+------------------+
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| /dev/mem | -- | WB | WB |
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| mmap !SYNC flag | | | |
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| no alias to this area | | | |
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| and | | | |
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| MTRR says WB | | | |
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+------------------------+----------+--------------+------------------+
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| /dev/mem | -- | -- | UC- |
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| mmap !SYNC flag | | | |
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| no alias to this area | | | |
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| and | | | |
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| MTRR says !WB | | | |
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+------------------------+----------+--------------+------------------+
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Advanced APIs for drivers
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=========================
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A. Exporting pages to users with remap_pfn_range, io_remap_pfn_range,
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vmf_insert_pfn.
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Drivers wanting to export some pages to userspace do it by using mmap
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interface and a combination of:
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1) pgprot_noncached()
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2) io_remap_pfn_range() or remap_pfn_range() or vmf_insert_pfn()
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With PAT support, a new API pgprot_writecombine is being added. So, drivers can
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continue to use the above sequence, with either pgprot_noncached() or
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pgprot_writecombine() in step 1, followed by step 2.
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In addition, step 2 internally tracks the region as UC or WC in memtype
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list in order to ensure no conflicting mapping.
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Note that this set of APIs only works with IO (non RAM) regions. If driver
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wants to export a RAM region, it has to do set_memory_uc() or set_memory_wc()
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as step 0 above and also track the usage of those pages and use set_memory_wb()
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before the page is freed to free pool.
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MTRR effects on PAT / non-PAT systems
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=====================================
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The following table provides the effects of using write-combining MTRRs when
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using ioremap*() calls on x86 for both non-PAT and PAT systems. Ideally
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mtrr_add() usage will be phased out in favor of arch_phys_wc_add() which will
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be a no-op on PAT enabled systems. The region over which a arch_phys_wc_add()
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is made, should already have been ioremapped with WC attributes or PAT entries,
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this can be done by using ioremap_wc() / set_memory_wc(). Devices which
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combine areas of IO memory desired to remain uncacheable with areas where
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write-combining is desirable should consider use of ioremap_uc() followed by
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set_memory_wc() to white-list effective write-combined areas. Such use is
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nevertheless discouraged as the effective memory type is considered
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implementation defined, yet this strategy can be used as last resort on devices
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with size-constrained regions where otherwise MTRR write-combining would
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otherwise not be effective.
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::
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==== ======= === ========================= =====================
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MTRR Non-PAT PAT Linux ioremap value Effective memory type
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==== ======= === ========================= =====================
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PAT Non-PAT | PAT
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|PCD |
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||PWT |
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WC 000 WB _PAGE_CACHE_MODE_WB WC | WC
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WC 001 WC _PAGE_CACHE_MODE_WC WC* | WC
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WC 010 UC- _PAGE_CACHE_MODE_UC_MINUS WC* | UC
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WC 011 UC _PAGE_CACHE_MODE_UC UC | UC
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==== ======= === ========================= =====================
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(*) denotes implementation defined and is discouraged
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.. note:: -- in the above table mean "Not suggested usage for the API". Some
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of the --'s are strictly enforced by the kernel. Some others are not really
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enforced today, but may be enforced in future.
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For ioremap and pci access through /sys or /proc - The actual type returned
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can be more restrictive, in case of any existing aliasing for that address.
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For example: If there is an existing uncached mapping, a new ioremap_wc can
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return uncached mapping in place of write-combine requested.
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set_memory_[uc|wc|wt] and set_memory_wb should be used in pairs, where driver
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will first make a region uc, wc or wt and switch it back to wb after use.
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Over time writes to /proc/mtrr will be deprecated in favor of using PAT based
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interfaces. Users writing to /proc/mtrr are suggested to use above interfaces.
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Drivers should use ioremap_[uc|wc] to access PCI BARs with [uc|wc] access
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types.
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Drivers should use set_memory_[uc|wc|wt] to set access type for RAM ranges.
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PAT debugging
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=============
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With CONFIG_DEBUG_FS enabled, PAT memtype list can be examined by::
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# mount -t debugfs debugfs /sys/kernel/debug
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# cat /sys/kernel/debug/x86/pat_memtype_list
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PAT memtype list:
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uncached-minus @ 0x7fadf000-0x7fae0000
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uncached-minus @ 0x7fb19000-0x7fb1a000
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uncached-minus @ 0x7fb1a000-0x7fb1b000
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uncached-minus @ 0x7fb1b000-0x7fb1c000
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uncached-minus @ 0x7fb1c000-0x7fb1d000
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uncached-minus @ 0x7fb1d000-0x7fb1e000
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uncached-minus @ 0x7fb1e000-0x7fb25000
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uncached-minus @ 0x7fb25000-0x7fb26000
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uncached-minus @ 0x7fb26000-0x7fb27000
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uncached-minus @ 0x7fb27000-0x7fb28000
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uncached-minus @ 0x7fb28000-0x7fb2e000
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uncached-minus @ 0x7fb2e000-0x7fb2f000
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uncached-minus @ 0x7fb2f000-0x7fb30000
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uncached-minus @ 0x7fb31000-0x7fb32000
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uncached-minus @ 0x80000000-0x90000000
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This list shows physical address ranges and various PAT settings used to
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access those physical address ranges.
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Another, more verbose way of getting PAT related debug messages is with
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"debugpat" boot parameter. With this parameter, various debug messages are
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printed to dmesg log.
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PAT Initialization
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==================
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The following table describes how PAT is initialized under various
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configurations. The PAT MSR must be updated by Linux in order to support WC
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and WT attributes. Otherwise, the PAT MSR has the value programmed in it
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by the firmware. Note, Xen enables WC attribute in the PAT MSR for guests.
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==== ===== ========================== ========= =======
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MTRR PAT Call Sequence PAT State PAT MSR
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==== ===== ========================== ========= =======
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E E MTRR -> PAT init Enabled OS
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E D MTRR -> PAT init Disabled -
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D E MTRR -> PAT disable Disabled BIOS
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D D MTRR -> PAT disable Disabled -
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- np/E PAT -> PAT disable Disabled BIOS
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- np/D PAT -> PAT disable Disabled -
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E !P/E MTRR -> PAT init Disabled BIOS
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D !P/E MTRR -> PAT disable Disabled BIOS
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!M !P/E MTRR stub -> PAT disable Disabled BIOS
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==== ===== ========================== ========= =======
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Legend
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========= =======================================
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E Feature enabled in CPU
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D Feature disabled/unsupported in CPU
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np "nopat" boot option specified
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!P CONFIG_X86_PAT option unset
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!M CONFIG_MTRR option unset
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Enabled PAT state set to enabled
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Disabled PAT state set to disabled
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OS PAT initializes PAT MSR with OS setting
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BIOS PAT keeps PAT MSR with BIOS setting
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========= =======================================
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