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Add Bus Lock Detect (called Bus Lock Trap in AMD docs) support for AMD platforms. Bus Lock Detect is enumerated with CPUID Fn0000_0007_ECX_x0 bit [24 / BUSLOCKTRAP]. It can be enabled through MSR_IA32_DEBUGCTLMSR. When enabled, hardware clears DR6[11] and raises a #DB exception on occurrence of Bus Lock if CPL > 0. More detail about the feature can be found in AMD APM[1]. [1]: AMD64 Architecture Programmer's Manual Pub. 40332, Rev. 4.07 - June 2023, Vol 2, 13.1.3.6 Bus Lock Trap https://bugzilla.kernel.org/attachment.cgi?id=304653 Signed-off-by: Ravi Bangoria <ravi.bangoria@amd.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Tom Lendacky <thomas.lendacky@amd.com> Link: https://lore.kernel.org/all/20240808062937.1149-3-ravi.bangoria@amd.com
134 lines
4.9 KiB
ReStructuredText
134 lines
4.9 KiB
ReStructuredText
.. SPDX-License-Identifier: GPL-2.0
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.. include:: <isonum.txt>
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===============================
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Bus lock detection and handling
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===============================
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:Copyright: |copy| 2021 Intel Corporation
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:Authors: - Fenghua Yu <fenghua.yu@intel.com>
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- Tony Luck <tony.luck@intel.com>
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Problem
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=======
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A split lock is any atomic operation whose operand crosses two cache lines.
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Since the operand spans two cache lines and the operation must be atomic,
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the system locks the bus while the CPU accesses the two cache lines.
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A bus lock is acquired through either split locked access to writeback (WB)
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memory or any locked access to non-WB memory. This is typically thousands of
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cycles slower than an atomic operation within a cache line. It also disrupts
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performance on other cores and brings the whole system to its knees.
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Detection
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=========
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Intel processors may support either or both of the following hardware
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mechanisms to detect split locks and bus locks. Some AMD processors also
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support bus lock detect.
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#AC exception for split lock detection
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--------------------------------------
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Beginning with the Tremont Atom CPU split lock operations may raise an
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Alignment Check (#AC) exception when a split lock operation is attempted.
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#DB exception for bus lock detection
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------------------------------------
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Some CPUs have the ability to notify the kernel by an #DB trap after a user
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instruction acquires a bus lock and is executed. This allows the kernel to
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terminate the application or to enforce throttling.
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Software handling
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=================
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The kernel #AC and #DB handlers handle bus lock based on the kernel
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parameter "split_lock_detect". Here is a summary of different options:
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+------------------+----------------------------+-----------------------+
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|split_lock_detect=|#AC for split lock |#DB for bus lock |
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+------------------+----------------------------+-----------------------+
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|off |Do nothing |Do nothing |
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+------------------+----------------------------+-----------------------+
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|warn |Kernel OOPs |Warn once per task and |
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|(default) |Warn once per task, add a |and continues to run. |
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| |delay, add synchronization | |
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| |to prevent more than one | |
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| |core from executing a | |
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| |split lock in parallel. | |
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| |sysctl split_lock_mitigate | |
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| |can be used to avoid the | |
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| |delay and synchronization | |
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| |When both features are | |
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| |supported, warn in #AC | |
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+------------------+----------------------------+-----------------------+
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|fatal |Kernel OOPs |Send SIGBUS to user. |
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| |Send SIGBUS to user | |
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| |When both features are | |
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| |supported, fatal in #AC | |
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+------------------+----------------------------+-----------------------+
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|ratelimit:N |Do nothing |Limit bus lock rate to |
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|(0 < N <= 1000) | |N bus locks per second |
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| | |system wide and warn on|
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| | |bus locks. |
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+------------------+----------------------------+-----------------------+
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Usages
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======
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Detecting and handling bus lock may find usages in various areas:
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It is critical for real time system designers who build consolidated real
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time systems. These systems run hard real time code on some cores and run
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"untrusted" user processes on other cores. The hard real time cannot afford
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to have any bus lock from the untrusted processes to hurt real time
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performance. To date the designers have been unable to deploy these
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solutions as they have no way to prevent the "untrusted" user code from
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generating split lock and bus lock to block the hard real time code to
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access memory during bus locking.
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It's also useful for general computing to prevent guests or user
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applications from slowing down the overall system by executing instructions
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with bus lock.
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Guidance
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========
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off
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---
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Disable checking for split lock and bus lock. This option can be useful if
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there are legacy applications that trigger these events at a low rate so
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that mitigation is not needed.
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warn
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----
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A warning is emitted when a bus lock is detected which allows to identify
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the offending application. This is the default behavior.
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fatal
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-----
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In this case, the bus lock is not tolerated and the process is killed.
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ratelimit
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---------
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A system wide bus lock rate limit N is specified where 0 < N <= 1000. This
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allows a bus lock rate up to N bus locks per second. When the bus lock rate
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is exceeded then any task which is caught via the buslock #DB exception is
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throttled by enforced sleeps until the rate goes under the limit again.
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This is an effective mitigation in cases where a minimal impact can be
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tolerated, but an eventual Denial of Service attack has to be prevented. It
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allows to identify the offending processes and analyze whether they are
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malicious or just badly written.
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Selecting a rate limit of 1000 allows the bus to be locked for up to about
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seven million cycles each second (assuming 7000 cycles for each bus
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lock). On a 2 GHz processor that would be about 0.35% system slowdown.
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