Commit Graph

4568 Commits

Author SHA1 Message Date
Jonas Gorski
76f42fe811 MIPS: BCM63XX: Move the PCI initialization into its own function
Also make the cpu check a bit more explicit.

Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: Maxime Bizon <mbizon@freebox.fr>
Cc: Florian Fainelli <florian@openwrt.org>
Cc: Kevin Cernekee <cernekee@gmail.com>
Patchwork: https://patchwork.linux-mips.org/patch/3953/
Reviewed-by: Florian Fainelli <florian@openwrt.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-24 16:33:13 +02:00
Jonas Gorski
e5766aea5b MIPS: BCM63XX: Add basic BCM6328 support
This includes CPU speed, memory size detection and working UART, but
lacking the appropriate drivers, no support for attached flash.

Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: Maxime Bizon <mbizon@freebox.fr>
Cc: Florian Fainelli <florian@openwrt.org>
Cc: Kevin Cernekee <cernekee@gmail.com>
Patchwork: https://patchwork.linux-mips.org/patch/3951/
Reviewed-by: Florian Fainelli <florian@openwrt.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-24 16:33:12 +02:00
Jonas Gorski
288752a8aa MIPS: BCM63XX: Use the Chip ID register for identifying the SoC
Newer BCM63XX SoCs use virtually the same CPU ID, differing only in the
revision bits. But since they all have the Chip ID register at the same
location, we can use that to identify the SoC we are running on.

Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: Maxime Bizon <mbizon@freebox.fr>
Cc: Florian Fainelli <florian@openwrt.org>
Cc: Kevin Cernekee <cernekee@gmail.com>
Patchwork: https://patchwork.linux-mips.org/patch/3955/
Reviewed-by: Florian Fainelli <florian@openwrt.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-24 16:33:12 +02:00
Jonas Gorski
aaf3fedb56 MIPS: BCM63XX: Add flash type detection
On BCM6358 and BCM6368 the attached flash type is exposed through a
bootstrapping register. Use it for auto detecting the flash type on
those and default to parallel flash for earlier SoCs.

Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: Maxime Bizon <mbizon@freebox.fr>
Cc: Florian Fainelli <florian@openwrt.org>
Cc: Kevin Cernekee <cernekee@gmail.com>
Patchwork: https://patchwork.linux-mips.org/patch/3954/
Reviewed-by: Florian Fainelli <florian@openwrt.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-24 16:33:11 +02:00
Jonas Gorski
4b897d5483 MIPS: BCM63XX: Move flash registration out of board_bcm963xx.c
board_bcm963xx.c is already large enough.

Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: Maxime Bizon <mbizon@freebox.fr>
Cc: Florian Fainelli <florian@openwrt.org>
Cc: Kevin Cernekee <cernekee@gmail.com>
Patchwork: https://patchwork.linux-mips.org/patch/3952/
Reviewed-by: Florian Fainelli <florian@openwrt.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-24 16:33:11 +02:00
Florian Fainelli
b73ab84199 MIPS: BCM63XX: add RNG driver platform_device stub
Signed-off-by: Florian Fainelli <florian@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: mpm@selenic.com
Cc: herbert@gondor.apana.org.au
Patchwork: https://patchwork.linux-mips.org/patch/3325/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-24 16:33:10 +02:00
Florian Fainelli
8aecfe9462 MIPS: BCM63XX: add RNG peripheral definitions
Signed-off-by: Florian Fainelli <florian@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: mpm@selenic.com
Cc: herbert@gondor.apana.org.au
Patchwork: https://patchwork.linux-mips.org/patch/3326/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-24 16:33:10 +02:00
Florian Fainelli
0b55561bc6 MIPS: BCM63XX: add support for "ipsec" clock
This module is only available on BCM6368 so far and does not require
resetting the block.

Signed-off-by: Florian Fainelli <florian@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: mpm@selenic.com
Cc: herbert@gondor.apana.org.au
Patchwork: https://patchwork.linux-mips.org/patch/3324/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-24 16:33:09 +02:00
David Daney
a03822ea5d MIPS: OCTEON: Remove some unused files.
These FPA related files are not used anywhere in the kernel.  Remove
them.

Signed-off-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3892/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-24 16:33:09 +02:00
Florian Fainelli
94c58b7f23 MIPS: BCM63XX: Fix platform_devices id
There is only one watchdog and VoIP DSP platform devices per board, use
-1 as the platform_device id accordingly.

Signed-off-by: Florian Fainelli <florian@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3313/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-24 16:33:09 +02:00
Kelvin Cheung
2fa36399e6 MIPS: Add CPU support for Loongson1B
Loongson 1B is a 32-bit SoC designed by Institute of Computing Technology
(ICT) and the Chinese Academy of Sciences (CAS), which implements the
MIPS32 release 2 instruction set.

[ralf@linux-mips.org: But which is not strictly a MIPS32 compliant device
which also is why it identifies itself with the Legacy Vendor ID in the
PrID register.  When applying the patch I shoveled some code around to
keep things in alphabetical order and avoid forward declarations.]

Signed-off-by: Kelvin Cheung <keguang.zhang@gmail.com>
Cc: To: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Cc: wuzhangjin@gmail.com
Cc: zhzhl555@gmail.com
Cc: Kelvin Cheung <keguang.zhang@gmail.com>
Patchwork: https://patchwork.linux-mips.org/patch/3976/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-23 13:57:04 +01:00
Lluís Batlle i Rossell
f9c9affc57 MIPS: Enable vmlinuz for JZ4740
This patch adds support for building a compressed kernel for the JZ4740
architecture.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Maarten ter Huurne <maarten@treewalker.org>
Cc: Sergei Shtylyov <sshtylyov@mvista.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3563/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-23 13:56:21 +01:00
Maarten ter Huurne
ea3952e01c MIPS: JZ4740: reset: Initialize hibernate wakeup counters.
In hibernation mode only the wakeup logic and the RTC are left running,
so this is what users perceive as power down.

If the counters are not initialized, the corresponding pin (typically
connected to the power button) has to be asserted for two seconds
before the device wakes up. Most users expect a shorter wakeup time.

I took the timing values of 100 ms and 60 ms from BouKiCHi's patch for
the Dingoo A320 kernel.

Signed-off-by: Maarten ter Huurne <maarten@treewalker.org>
Cc: Sergei Shtylyov <sshtylyov@mvista.com>
Cc: Lars-Peter Clausen <lars@metafoo.de>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3563/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-23 13:56:20 +01:00
Maarten ter Huurne
56635d7993 MIPS: JZ4740: qi_lb60: Look for NAND chip in bank 1.
All NanoNotes have their NAND in bank 1.
Specifying the bank is required since multi-bank support was introduced.

Signed-off-by: Maarten ter Huurne <maarten@treewalker.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3561/
Acked-By: David Woodhouse <David.Woodhouse@intel.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-23 13:56:20 +01:00
Maarten ter Huurne
1471d41a5b MTD: NAND: JZ4740: Multi-bank support with autodetection
The platform data can now specify which external memory banks to probe
for NAND chips, and in which order. Banks that contain a NAND are used
and the other banks are freed.

Squashed version of development done in jz-2.6.38 branch.
Original patch by Lars-Peter Clausen with some bug fixes from me.
Thanks to Paul Cercueil for the initial autodetection patch.

Signed-off-by: Maarten ter Huurne <maarten@treewalker.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3560/
Acked-By: David Woodhouse <David.Woodhouse@intel.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-23 13:56:20 +01:00
Steven J. Hill
71a1c776d5 MIPS: Fixup ordering of micro assembler instructions.
A number of new instructions have been added to the micro assembler causing
the list to no longer be in alphabetical order. This patch fixes up the name
ordering.

Signed-off-by: Steven J. Hill <sjhill@mips.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3789/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-23 13:55:56 +01:00
David Daney
bb0757ebb9 MIPS: Unify memcpy.S and memcpy-inatomic.S
We can save the 451 lines of code that comprise memcpy-inatomic.S at the
expense of a single instruction in the memcpy prolog.  We also use an
additional register (t6), so this may cause increased register pressure in
some places as well.  But I think the reduced maintenance burden, of not
having two nearly identical implementations, makes it worth it.

Signed-off-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-23 13:55:55 +01:00
David Daney
914f848077 MIPS: Octeon: Implement Octeon specific __copy_user_inatomic
The generic version seems to prefetch past the end of memory.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3929/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-23 13:55:55 +01:00
Ralf Baechle
497e5ff03f MIPS: Malta: Move PIIX4 PCI fixup to where it belongs.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-23 13:55:55 +01:00
Ralf Baechle
f7257d38eb MIPS: PCI: Add missing __devinit attributions to fixup functions.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-23 13:55:55 +01:00
Thomas Meyer
a6196bab64 MIPS: Alchemy: Use kmemdup rather than duplicating its implementation
The semantic patch that makes this change is available
in scripts/coccinelle/api/memdup.cocci.

Signed-off-by: Thomas Meyer <thomas@m3y3r.de>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/3058/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-23 13:55:55 +01:00
Florian Fainelli
a551fafba2 MIPS: loongson: use IS_ENABLED()
Signed-off-by: Florian Fainelli <florian@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3336/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-23 13:55:54 +01:00
Florian Fainelli
baf69e2753 MIPS: DEC: use IS_ENABLED()
Signed-off-by: Florian Fainelli <florian@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3333/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-23 13:55:54 +01:00
Florian Fainelli
dbebd6b1c5 MIPS: TX49XX: use IS_ENABLED()
Signed-off-by: Florian Fainelli <florian@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3335/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-23 13:55:54 +01:00
Florian Fainelli
b33b440737 MIPS: TXX9: use IS_ENABLED() macro
Signed-off-by: Florian Fainelli <florian@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3334/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-23 13:55:54 +01:00
Florian Fainelli
c1d7f41cfe MIPS: PNX833x: use IS_ENABLED() macro
Signed-off-by: Florian Fainelli <florian@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3332/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-23 13:55:53 +01:00
Florian Fainelli
4bd5a5740e MIPS: Alchemy: use IS_ENABLED() macro
Signed-off-by: Florian Fainelli <florian@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3331/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-23 13:55:53 +01:00
Steven J. Hill
889a4c7b33 MIPS: SMTC: Support for Multi-threaded FPUs
Signed-off-by: Steven J. Hill <sjhill@mips.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3603/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-23 13:55:53 +01:00
Steven J. Hill
2244f12865 MIPS: Remove dead code related to 1004K oprofile support.
Signed-off-by: Steven J. Hill <sjhill@mips.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3854/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-23 13:55:16 +01:00
David Daney
b59b284101 MIPS: Octeon: Use device tree to register serial ports.
Switch to using the device tree to register serial ports.

Add all the ports with compatible = "cavium,octeon-3860-uart".  Octeon serial
ports have their own device type, required port flags, and I/O
functions, so using of_serial.c is not indicated.

We need to do this as late_initcall, as the 8250 driver must be
initialized before we add any ports.  8250 initialization is done at
device_initcall time.

The OCTEON_IRQ_UART{0,1,2} symbols are removed as they are now unused
and interfere with irq_domain used by the device tree code.

Signed-off-by: David Daney <david.daney@cavium.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Cc: linux-mips@linux-mips.org
Cc: devicetree-discuss@lists.ozlabs.org
Cc: Rob Herring <rob.herring@calxeda.com>
Cc: linux-kernel@vger.kernel.org
Cc: David Daney <david.daney@cavium.com>
Patchwork: https://patchwork.linux-mips.org/patch/3942/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-23 13:54:53 +01:00
David Daney
368bec0d4a netdev: octeon_mgmt: Convert to use device tree.
The device tree will supply the register bank base addresses, make
register addressing relative to those.  PHY connection is now
described by the device tree.

The OCTEON_IRQ_MII{0,1} symbols are also removed as they are now
unused and interfere with the irq_domain used for device tree irq
mapping.

Signed-off-by: David Daney <david.daney@cavium.com>
Acked-by: David S. Miller <davem@davemloft.net>
Cc: linux-mips@linux-mips.org
Cc: devicetree-discuss@lists.ozlabs.org
Cc: Grant Likely <grant.likely@secretlab.ca>
Cc: Rob Herring <rob.herring@calxeda.com>
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/3941/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-23 13:54:53 +01:00
David Daney
2fd46f47be netdev: mdio-octeon.c: Convert to use device tree.
Get the MDIO bus controller addresses from the device tree, small
clean up in use of devm_*

Remove, now unused, platform device setup code.

Signed-off-by: David Daney <david.daney@cavium.com>
Acked-by: David S. Miller <davem@davemloft.net>
Cc: linux-mips@linux-mips.org
Cc: devicetree-discuss@lists.ozlabs.org
Cc: Grant Likely <grant.likely@secretlab.ca>
Cc: Rob Herring <rob.herring@calxeda.com>
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/3938/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-23 13:54:53 +01:00
David Daney
f353a218de i2c: Convert i2c-octeon.c to use device tree.
There are three parts to this:

1) Remove the definitions of OCTEON_IRQ_TWSI and OCTEON_IRQ_TWSI2.
   The interrupts are specified by the device tree and these hard
   coded irq numbers block the used of the irq lines by the irq_domain
   code.

2) Remove platform device setup code from octeon-platform.c, it is
   now unused.

3) Convert i2c-octeon.c to use device tree.  Part of this includes
   using the devm_* functions instead of the raw counterparts, thus
   simplifying error handling.  No functionality is changed.

Signed-off-by: David Daney <david.daney@cavium.com>
Acked-by: Rob Herring <rob.herring@calxeda.com>
Acked-by: Wolfram Sang <w.sang@pengutronix.de>
Cc: linux-mips@linux-mips.org
Cc: devicetree-discuss@lists.ozlabs.org
Cc: Grant Likely <grant.likely@secretlab.ca>
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/3939/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-23 13:54:53 +01:00
David Daney
a0c16582b5 MIPS: Octeon: Setup irq_domains for interrupts.
Create two domains.  One for the GPIO lines, and the other for on-chip
sources.

Signed-off-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Cc: devicetree-discuss@lists.ozlabs.org
Cc: Grant Likely <grant.likely@secretlab.ca>
Cc: Rob Herring <rob.herring@calxeda.com>
Cc: linux-kernel@vger.kernel.org
Cc: David Daney <david.daney@cavium.com>
Patchwork: https://patchwork.linux-mips.org/patch/3936/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-23 13:54:53 +01:00
David Daney
7ed1815296 MIPS: Octeon: Initialize and fixup device tree.
If a compiled in device tree template is used, trim out unwanted parts
based on legacy platform probing.

Signed-off-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Cc: devicetree-discuss@lists.ozlabs.org
Cc: Grant Likely <grant.likely@secretlab.ca>
Cc: Rob Herring <rob.herring@calxeda.com>
Cc: linux-kernel@vger.kernel.org
Cc: David Daney <david.daney@cavium.com>
Patchwork: https://patchwork.linux-mips.org/patch/3935/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-23 13:54:52 +01:00
David Daney
b01da9f130 MIPS: Prune some target specific code out of prom.c
This code is not common enough to be in a shared file.  It is also not
used by any existing boards, so just remove it.

[ralf@linux-mips.org: Dropped removal of irq_create_of_mapping which was
already removed by abd2363f6a
[irq_domain/mips: Allow irq_domain on MIPS].  Moved device_tree_init() and
dependencies to its sole user, the XLP code.]

Signed-off-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Cc: devicetree-discuss@lists.ozlabs.org
Cc: grant.likely@secretlab.ca
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/2946/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-23 13:54:52 +01:00
David Daney
736b1c9c95 MIPS: Octeon: Add device tree source files.
The two device tree files octeon_3xxx.dts and octeon_68xx.dts are
trimmed by code in a subsequent patch to reflect the hardware actually
present on the board.  To this end several properties that are not
part of the declared bindings are added to aid in trimming off
unwanted nodes.  Since the device tree and the code that trims it are
bound into the kernel binary, these 'marker' properties never escape
into the wild, and are purely an implementation detail of the kernel
early boot process.  This is done for backwards compatibility with
existing boards (identified by a board type enumeration value by their
bootloaders).  New boards will always pass a device tree from the
bootloader, the built-in trees are ignored in this case.

Signed-off-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Cc: devicetree-discuss@lists.ozlabs.org
Cc: Grant Likely <grant.likely@secretlab.ca>
Cc: Rob Herring <rob.herring@calxeda.com>
Cc: linux-kernel@vger.kernel.org
Cc: David Daney <david.daney@cavium.com>
Patchwork: https://patchwork.linux-mips.org/patch/3937/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-23 13:54:52 +01:00
David Daney
a339aef904 MIPS: OCTEON: Consolidate the edge and level irq_chip structures.
We can consolidate octeon_irq_chip_ciu_edge and octeon_irq_chip_ciu as
they only differ in the .irq_ack element, and that is unused by the
level handler.  This gets rid of a bunch of duplicate definitions.

Signed-off-by: David Daney <david.daney@cavium.com>
Cc:  linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3931/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-23 13:54:52 +01:00
David Daney
f5e0828421 MIPS: OCTEON: Remove unneeded OCTEON_IRQ_* defines.
The follow-on patch to add irq_domain support will be the supported
method for using these irq lines, so get these defines out of the way
in preperation for that.

Signed-off-by: David Daney <david.daney@cavium.com>
Cc:  linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3930/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-23 13:54:52 +01:00
David Daney
0b28b823ac MIPS: Octeon: Remove use of OCTEON_IRQ_RST.
This symbol will be removed, so don't use it as part of the definition of
OCTEON_IRQ_LAST.

Set OCTEON_IRQ_LAST to 127 so there is space for all the automatically
allocated (via irq_domain) irqs.

Signed-off-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3946/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-23 13:54:52 +01:00
David Daney
6d1ab4c22d MIPS: Octeon: Add irq handlers for GPIO interrupts.
This is needed for follow-on on patches for Octeon to use the Device
Tree to configure GPIO interrupts.

Signed-off-by: David Daney <david.daney@cavium.com>
Cc:  linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3932/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-23 13:54:51 +01:00
David Daney
05b8c8c128 MIPS: OCTEON: Remove some unused files.
These FPA related files are not used anywhere in the kernel.  Remove
them.

Signed-off-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3892/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-23 13:54:51 +01:00
Florian Fainelli
76ca4e1484 MIPS: BCM63xx: Make board setup code register the spi platform device
Signed-off-by: Florian Fainelli <florian@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: grant.likely@secretlab.ca
Cc: spi-devel-general@lists.sourceforge.net
Patchwork: https://patchwork.linux-mips.org/patch/3317/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-23 13:54:34 +01:00
Florian Fainelli
39ca476e34 MIPS: BCM63xx: Add stub to register the SPI platform driver
This patch adds the necessary stub to register the SPI platform driver.
Since the registers are shuffled between the 4 BCM63xx CPUs supported by
this SPI driver we also need to generate the internal register layout and
export this layout for the driver to use it properly.

Signed-off-by: Florian Fainelli <florian@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: grant.likely@secretlab.ca
Cc: spi-devel-general@lists.sourceforge.net
Patchwork: https://patchwork.linux-mips.org/patch/3321/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-23 13:54:33 +01:00
Florian Fainelli
0f6db0d072 MIPS: BCM63xx: Define internal registers offsets of the SPI controller
BCM6338, BCM6348, BCM6358 and BCM6368 basically use the same SPI controller
though the internal registers are shuffled, which still allows a common
driver to drive that IP block.

Signed-off-by: Florian Fainelli <florian@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: grant.likely@secretlab.ca
Cc: spi-devel-general@lists.sourceforge.net
Patchwork: https://patchwork.linux-mips.org/patch/3318/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-23 13:54:33 +01:00
Florian Fainelli
15514e7838 MIPS: BCM63xx: Remove SPI2 register
This register was introduced with the support of the BCM6368 CPU in the idea
that its internal layout was different from the other CPUs SPI controller.
The controller is actually the same as the one present on BCM6358 so we can
remove this register and use the usual SPI register instead.

Signed-off-by: Florian Fainelli <florian@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: grant.likely@secretlab.ca
Cc: spi-devel-general@lists.sourceforge.net
Patchwork: https://patchwork.linux-mips.org/patch/3316/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-23 13:54:33 +01:00
Florian Fainelli
7546d71a9c MIPS: BCM63xx: Define SPI register sizes.
There are two distinct sizes for the SPI register depending on the SoC
generation (6338 & 6348 vs 6358 & 6368).

Signed-off-by: Florian Fainelli <florian@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: grant.likely@secretlab.ca
Cc: spi-devel-general@lists.sourceforge.net
Patchwork: https://patchwork.linux-mips.org/patch/3314/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-23 13:54:33 +01:00
Florian Fainelli
19372b2478 MIPS: BCM63xx: Add BCM6368 SPI clock mask
Signed-off-by: Florian Fainelli <florian@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: grant.likely@secretlab.ca
Cc: spi-devel-general@lists.sourceforge.net
Patchwork: https://patchwork.linux-mips.org/patch/3319/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-23 13:54:32 +01:00
Florian Fainelli
9e368e49da MIPS: BCM63xx: Define BCM6358 SPI base address
Signed-off-by: Florian Fainelli <florian@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: grant.likely@secretlab.ca
Cc: spi-devel-general@lists.sourceforge.net
Patchwork: https://patchwork.linux-mips.org/patch/3315/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-23 13:54:32 +01:00
Florian Fainelli
0aeee715b0 MIPS: BCM63xx: Add IRQ_SPI and CPU specific SPI IRQ values
Signed-off-by: Florian Fainelli <florian@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: grant.likely@secretlab.ca
Cc: spi-devel-general@lists.sourceforge.net
Patchwork: https://patchwork.linux-mips.org/patch/3320/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-23 13:54:32 +01:00
Florian Fainelli
d9831a41e3 MIPS: BCM63XX: Be consistent in clock bits enable naming
Remove the _CLK suffix from the BCM6368 clock bits definitions to be
consistent with what is already present.

Signed-off-by: Florian Fainelli <florian@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3312/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-23 13:54:32 +01:00
Manuel Lauss
6c2be5cf1d MIPS: Alchemy: handle db1200 cpld ints as they come in
Remove the loop in the cascade handler and instead unconditionally
handle just the first set interrupt coming from the CPLD.

This gets rid of a lot of spurious interrupts being triggered for
the SMSC91111 ethernet chip especially under high(er) IDE load:
"eth0: spurious interrupt (mask = 0xb3)"

Verified on DB1200 and DB1300.

Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3288/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-23 13:53:38 +01:00
Manuel Lauss
278bf05cf6 MIPS: Alchemy: devboards: kill prom.c
move contents to already existing platform.c file.

Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3287/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-23 13:53:38 +01:00
Manuel Lauss
3e25f4f243 MIPS: Alchemy: use 64MB RAM as minimum for devboards
YAMON on all devboards provides the "memsize" envvar; in the unlikely
case that it can't be parsed just assume 64MB, which all boards have
at least.

Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3286/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-23 13:53:37 +01:00
Linus Torvalds
d75e2c9ad9 Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus
Pull late MIPS fixes from Ralf Baechle:
 "This fixes a number of lose ends in the MIPS code and various bug
  fixes.

  Aside of dropping some patch that should not be in this pull request
  everything has sat in -next for quite a while and there are no known
  issues.

  The biggest patch in this patch set moves the allocation of an array
  that is aliased to a function (for runtime generated code) to
  assembler code.  This avoids an issue with certain toolchains when
  building for microMIPS."

* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (35 commits)
  MIPS: PCI: Move fixups from __init to __devinit.
  MIPS: Fix bug.h MIPS build regression
  MIPS: sync-r4k: remove redundant irq operation
  MIPS: smp: Warn on too early irq enable
  MIPS: call set_cpu_online() on cpu being brought up with irq disabled
  MIPS: call ->smp_finish() a little late
  MIPS: Yosemite: delay irq enable to ->smp_finish()
  MIPS: SMTC: delay irq enable to ->smp_finish()
  MIPS: BMIPS: delay irq enable to ->smp_finish()
  MIPS: Octeon: delay enable irq to ->smp_finish()
  MIPS: Oprofile: Fix build as a module.
  MIPS: BCM63XX: Fix BCM6368 IPSec clock bit
  MIPS: perf: Fix build error caused by unused counters_per_cpu_to_total()
  MIPS: Fix Magic SysRq L kernel crash.
  MIPS: BMIPS: Fix duplicate header inclusion.
  mips: mark const init data with __initconst instead of __initdata
  MIPS: cmpxchg.h: Add missing include
  MIPS: Malta may also be equipped with MIPS64 R2 processors.
  MIPS: Fix typo multipy -> multiply
  MIPS: Cavium: Fix duplicate ARCH_SPARSEMEM_ENABLE in kconfig.
  ...
2012-07-20 12:02:02 -07:00
David S. Miller
abaa72d7fd Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net
Conflicts:
	drivers/net/ethernet/intel/ixgbevf/ixgbevf_main.c
2012-07-19 11:17:30 -07:00
Sebastian Andrzej Siewior
85a053fa5f MIPS: PCI: Move fixups from __init to __devinit.
Fixups are executed once the pci-device is found which is during boot
process so __init seems fine as long as the platform does not support
hotplug.
However it is possible to remove the PCI bus at run time and have it
rediscovered again via "echo 1 > /sys/bus/pci/rescan" and this will call
the fixups again.

[ralf@linux-mips.org: Made piixirqmap[] in malta_piix_func0_fixup()
__initdata.]

Signed-off-by: Sebastian Andrzej Siewior <sebastian@breakpoint.cc>
Cc: linux-mips@linux-mips.org
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-19 11:27:23 +02:00
Yoichi Yuasa
3592c3cd06 MIPS: Fix bug.h MIPS build regression
Commit: 3777808873 [bug.h: need linux/kernel.h
for TAINT_WARN.] breaks all MIPS builds.

  CC      arch/mips/kernel/machine_kexec.o
In file included from include/linux/kernel.h:20:0,
                 from include/asm-generic/bug.h:35,
                 from /home/yuasa/src/linux/kernel/git/linux-2.6/arch/mips/include/asm/bug.h:41,
                 from /home/yuasa/src/linux/kernel/git/linux-2.6/arch/mips/include/asm/bitops.h:20,
                 from include/linux/bitops.h:22,
                 from include/linux/signal.h:38,
                 from include/linux/elfcore.h:5,
                 from include/linux/kexec.h:60,
                 from arch/mips/kernel/machine_kexec.c:9:
include/linux/log2.h: In function '__ilog2_u32':
include/linux/log2.h:34:2: error: implicit declaration of function 'fls' [-Werror=implicit-function-declaration]
include/linux/log2.h: In function '__ilog2_u64':
include/linux/log2.h:42:2: error: implicit declaration of function 'fls64' [-Werror=implicit-function-declaration]
include/linux/log2.h: In function '__roundup_pow_of_two':
include/linux/log2.h:63:2: error: implicit declaration of function 'fls_long' [-Werror=implicit-function-declaration]
In file included from include/linux/bitops.h:22:0,
                 from include/linux/signal.h:38,
                 from include/linux/elfcore.h:5,
                 from include/linux/kexec.h:60,
                 from arch/mips/kernel/machine_kexec.c:9:
/home/yuasa/src/linux/kernel/git/linux-2.6/arch/mips/include/asm/bitops.h: At top level:
/home/yuasa/src/linux/kernel/git/linux-2.6/arch/mips/include/asm/bitops.h:615:19: error: static declaration of 'fls' follows non-static declaration
include/linux/log2.h:34:9: note: previous implicit declaration of 'fls' was here
In file included from /home/yuasa/src/linux/kernel/git/linux-2.6/arch/mips/include/asm/bitops.h:651:0,
                 from include/linux/bitops.h:22,
                 from include/linux/signal.h:38,
                 from include/linux/elfcore.h:5,
                 from include/linux/kexec.h:60,
                 from arch/mips/kernel/machine_kexec.c:9:
include/asm-generic/bitops/fls64.h:18:28: error: static declaration of 'fls64' follows non-static declaration
include/linux/log2.h:42:9: note: previous implicit declaration of 'fls64' was here
In file included from include/linux/signal.h:38:0,
                 from include/linux/elfcore.h:5,
                 from include/linux/kexec.h:60,
                 from arch/mips/kernel/machine_kexec.c:9:
include/linux/bitops.h:160:24: error: conflicting types for 'fls_long'
include/linux/log2.h:63:16: note: previous implicit declaration of 'fls_long' was here
cc1: all warnings being treated as errors

make[2]: *** [arch/mips/kernel/machine_kexec.o] Error 1

Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org>
Cc: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: yuasa@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Cc: Linuxppc-dev <linuxppc-dev@ozlabs.org>
Cc: Linux MIPS Mailing List <linux-mips@linux-mips.org>
Cc: Linux-sh list <linux-sh@vger.kernel.org>
Cc: Chris Zankel <chris@zankel.net>
Patchwork: https://patchwork.linux-mips.org/patch/4000/
Tested-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-19 11:27:17 +02:00
Yong Zhang
f2b88d65aa MIPS: sync-r4k: remove redundant irq operation
Since we have delayed irq enabling to ->smp_finish()

Signed-off-by: Yong Zhang <yong.zhang0@gmail.com>
Cc: Sergei Shtylyov <sshtylyov@mvista.com>
Cc: David Daney <david.daney@cavium.com>
Acked-by: David Daney <david.daney@cavium.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-19 11:23:44 +02:00
Yong Zhang
b789ad63ac MIPS: smp: Warn on too early irq enable
Just to catch a potential issue.

Signed-off-by: Yong Zhang <yong.zhang0@gmail.com>
Cc: Sergei Shtylyov <sshtylyov@mvista.com>
Cc: David Daney <david.daney@cavium.com>
Acked-by: David Daney <david.daney@cavium.com>
Patchwork: https://patchwork.linux-mips.org/patch/3852/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-19 11:23:44 +02:00
Yong Zhang
b9a09a0660 MIPS: call set_cpu_online() on cpu being brought up with irq disabled
To prevent a problem as commit 5fbd036b [sched: Cleanup cpu_active madness]
and commit 2baab4e9 [sched: Fix select_fallback_rq() vs cpu_active/cpu_online]
try to resolve, move set_cpu_online() to the brought up CPU and with irq
disabled.

Signed-off-by: Yong Zhang <yong.zhang0@gmail.com>
Cc: Sergei Shtylyov <sshtylyov@mvista.com>
Cc: David Daney <david.daney@cavium.com>
Acked-by: David Daney <david.daney@cavium.com>
Patchwork: https://patchwork.linux-mips.org/patch/3851/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-19 11:23:44 +02:00
Yong Zhang
5309bdac70 MIPS: call ->smp_finish() a little late
We have move irq enable to ->smp_finish. Place ->smp_finish() a little
late to prepare for move set_cpu_online() into start_secondary.
And it's not necessary to call cpu_set(cpu, cpu_callin_map) and
synchronise_count_slave() with irq enabled.

Signed-off-by: Yong Zhang <yong.zhang0@gmail.com>
Cc: Sergei Shtylyov <sshtylyov@mvista.com>
Cc: David Daney <david.daney@cavium.com>
Acked-by: David Daney <david.daney@cavium.com>
Patchwork: https://patchwork.linux-mips.org/patch/3850/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-19 11:23:44 +02:00
Yong Zhang
263afbdd1c MIPS: Yosemite: delay irq enable to ->smp_finish()
To prepare for smoothing set_cpu_[active|online]() mess up

Signed-off-by: Yong Zhang <yong.zhang0@gmail.com>
Cc: Sergei Shtylyov <sshtylyov@mvista.com>
Cc: David Daney <david.daney@cavium.com>
Acked-by: David Daney <david.daney@cavium.com>
Patchwork: https://patchwork.linux-mips.org/patch/3848/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-19 11:23:44 +02:00
Yong Zhang
70dc8fa782 MIPS: SMTC: delay irq enable to ->smp_finish()
To prepare for smoothing set_cpu_[active|online]() mess up

Signed-off-by: Yong Zhang <yong.zhang0@gmail.com>
Cc: Sergei Shtylyov <sshtylyov@mvista.com>
Cc: David Daney <david.daney@cavium.com>
Acked-by: David Daney <david.daney@cavium.com>
Patchwork: https://patchwork.linux-mips.org/patch/3847/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-19 11:23:44 +02:00
Yong Zhang
856ac3c6e0 MIPS: BMIPS: delay irq enable to ->smp_finish()
To prepare for smoothing set_cpu_[active|online]() mess up

Signed-off-by: Yong Zhang <yong.zhang0@gmail.com>
Cc: Sergei Shtylyov <sshtylyov@mvista.com>
Cc: David Daney <david.daney@cavium.com>
Acked-by: David Daney <david.daney@cavium.com>
Patchwork: https://patchwork.linux-mips.org/patch/3846/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-19 11:23:44 +02:00
Yong Zhang
1bcfecc028 MIPS: Octeon: delay enable irq to ->smp_finish()
To prepare for smoothing set_cpu_[active|online]() mess up

Signed-off-by: Yong Zhang <yong.zhang0@gmail.com>
Cc: Sergei Shtylyov <sshtylyov@mvista.com>
Cc: David Daney <david.daney@cavium.com>
Acked-by: David Daney <david.daney@cavium.com>
Patchwork: https://patchwork.linux-mips.org/patch/3845/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-19 11:23:44 +02:00
Ralf Baechle
68b6352cdc MIPS: Oprofile: Fix build as a module.
When building oprofile as a module for R10000 or R7000 class processors,
E9000 or MIPSxx class cores since 3572a2c37f
[MIPS: make oprofile use cp0_perfcount_irq if it is set] an

ERROR: "cp0_compare_irq" [arch/mips/oprofile/oprofile.ko] undefined!

error will happen.  Fixed by exporting cp0_compare_irq.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-19 11:23:44 +02:00
Florian Fainelli
38be3c7e77 MIPS: BCM63XX: Fix BCM6368 IPSec clock bit
The IPsec clock bit is 18 and not 17.

Signed-off-by: Florian Fainelli <florian@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: mpm@selenic.com
Cc: herbert@gondor.apana.org.au
Patchwork: https://patchwork.linux-mips.org/patch/3323/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-19 11:23:44 +02:00
Florian Fainelli
6c37c95804 MIPS: perf: Fix build error caused by unused counters_per_cpu_to_total()
cc1: warnings being treated as errors
arch/mips/kernel/perf_event_mipsxx.c:166: error: 'counters_per_cpu_to_total' defined but not used
make[2]: *** [arch/mips/kernel/perf_event_mipsxx.o] Error 1
make[2]: *** Waiting for unfinished jobs....

It was first introduced by 82091564cf [MIPS:
perf: Add support for 64-bit perf counters.] in 3.2.

Signed-off-by: Florian Fainelli <florian@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: david.daney@cavium.com
Patchwork: https://patchwork.linux-mips.org/patch/3357/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-19 11:23:44 +02:00
Vincent Wen
e909be8252 MIPS: Fix Magic SysRq L kernel crash.
show_backtrace() was passed a NULL pointer which caused paging
request fail. Set to current task as other architectures (ARM,
etc) do when passed a NULL task pointer.

Signed-off-by: Vincent Wen <vincentwenlinux@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: cernekee@gmail.com
Patchwork: https://patchwork.linux-mips.org/patch/3524/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-19 11:23:44 +02:00
Danny Kukawka
ca760ca523 MIPS: BMIPS: Fix duplicate header inclusion.
Signed-off-by: Danny Kukawka <danny.kukawka@bisect.de>
Cc: Danny Kukawka <dkukawka@suse.de>
Cc: Kevin Cernekee <cernekee@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/3369/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-19 11:23:44 +02:00
Uwe Kleine-König
4a043d79dc mips: mark const init data with __initconst instead of __initdata
As long as there is no other non-const variable marked __initdata in the
same compilation unit it doesn't hurt. If there were one however
compilation would fail with

	error: $variablename causes a section type conflict

because a section containing const variables is marked read only and so
cannot contain non-const variables.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Cc: linux-mips@linux-mips.org
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Cc: kernel@pengutronix.de
Patchwork: https://patchwork.linux-mips.org/patch/3565/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-19 11:23:43 +02:00
Aaro Koskinen
5520e42690 MIPS: cmpxchg.h: Add missing include
Fix the following build breakage in v3.4-rc1:

  CC      kernel/irq_work.o
In file included from include/linux/irq_work.h:4:0,
                 from kernel/irq_work.c:10:
include/linux/llist.h: In function 'llist_del_all':
include/linux/llist.h:178:2: error: implicit declaration of function 'BUILD_BUG_ON' [-Werror=implicit-function-declaration]

Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Cc: linux-kernel@vger.kernel.org
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3568/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-19 11:23:43 +02:00
Leonid Yegoshin
5d9fbed18e MIPS: Malta may also be equipped with MIPS64 R2 processors.
Signed-off-by: Leonid Yegoshin <yegoshin@mips.com>
Signed-off-by: Steven J. Hill <sjhill@mips.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3792/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-19 11:23:43 +02:00
Ralf Baechle
a586e14f2c MIPS: Fix typo multipy -> multiply
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-19 11:23:43 +02:00
Yoichi Yuasa
7ee91de45a MIPS: Cavium: Fix duplicate ARCH_SPARSEMEM_ENABLE in kconfig.
Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3883/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-19 11:23:43 +02:00
Yoichi Yuasa
b96b62db8c MIPS: BCM47xx: Fix BCMA_DRIVER_PCI_HOSTMODE config dependencies
warning: (BCM47XX_BCMA) selects BCMA_DRIVER_PCI_HOSTMODE which has unmet direct dependencies (BCMA_POSSIBLE && BCMA && MIPS && BCMA_HOST_PCI)
warning: (BCM47XX_BCMA) selects BCMA_DRIVER_PCI_HOSTMODE which has unmet direct dependencies (BCMA_POSSIBLE && BCMA && MIPS && BCMA_HOST_PCI)

Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3882/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-19 11:23:43 +02:00
Ralf Baechle
c7b2ec2106 MIPS: SMTC: Spelling and grammar corrections.
Extractd from Steven J. Hill's https://patchwork.linux-mips.org/patch/3603/.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-19 11:23:43 +02:00
David Daney
7b1c0d26a8 MIPS: Properly align the .data..init_task section.
Improper alignment can lead to unbootable systems and/or random
crashes.

[ralf@linux-mips.org: This is a lond standing bug since
6eb10bc9e2 (kernel.org) rsp.
c422a10917f75fd19fa7fe070aaaa23e384dae6f (lmo) [MIPS: Clean up linker script
using new linker script macros.] so dates back to 2.6.32.]

Signed-off-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Cc: <stable@vger.kernel.org>
Patchwork: https://patchwork.linux-mips.org/patch/3881/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-19 11:23:43 +02:00
Steven J. Hill
c5de50dada MIPS: Malta: Change start address to avoid conflicts.
There are ACPI and SMB devices in the 0x1000..0x1fff address range.

Signed-off-by: Steven J. Hill <sjhill@mips.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3581/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-19 11:23:43 +02:00
Leonid Yegoshin
2dd17030c9 MIPS: Fix race condition with FPU thread task flag during context switch.
[ralf@linux-mips.org: Cosmetic changes; also fixed up r2300_switch.S and
octeon_switch.S which needed similar modifications.]

Signed-off-by: Leonid Yegoshin <yegoshin@mips.com>
Signed-off-by: Steven J. Hill <sjhill@mips.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3784/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-19 11:23:43 +02:00
Douglas Leung
dc34b05fea MIPS: Fix decoding of c0_config1 for MIPSxx caches with 32 ways per set.
This affects certain 4Kc cores.

Signed-off-by: Douglas Leung <douglas@mips.com>
Signed-off-by: Steven J. Hill <sjhill@mips.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3855/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-19 11:23:43 +02:00
Steven J. Hill
c022630633 MIPS: Refactor 'clear_page' and 'copy_page' functions.
Remove usage of the '__attribute__((alias("...")))' hack that aliased
to integer arrays containing micro-assembled instructions. This hack
breaks when building a microMIPS kernel. It also makes the code much
easier to understand.

[ralf@linux-mips.org: Added back export of the clear_page and copy_page
symbols so certain modules will work again.  Also fixed build with
CONFIG_SIBYTE_DMA_PAGEOPS enabled.]

Signed-off-by: Steven J. Hill <sjhill@mips.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3866/
Acked-by: David Daney <david.daney@cavium.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-19 11:23:43 +02:00
Leonid Yegoshin
78d4803f75 MIPS: Don't panic on 5KEc.
It's a bloody bog standard MIPS64R2 core with just a new PrId ID.  Iow
that essentially means Linux just panics because it doesn't know how to
name the core.

[ralf@linux-mips.org: Split original patch into several smaller patches.]

Signed-off-by: Leonid Yegoshin <yegoshin@mips.com>
Signed-off-by: Steven J. Hill <sjhill@mips.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3792/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-19 11:22:48 +02:00
Yoichi Yuasa
893a0574de mips: fix bug.h build regression
Commit 377780887 ("bug.h: need linux/kernel.h for TAINT_WARN.") broke
all MIPS builds:

    CC      arch/mips/kernel/machine_kexec.o
  include/linux/log2.h: In function '__ilog2_u32':
  include/linux/log2.h:34:2: error: implicit declaration of function 'fls' [-Werror=implicit-function-declaration]
  include/linux/log2.h: In function '__ilog2_u64':
  include/linux/log2.h:42:2: error: implicit declaration of function 'fls64' [-Werror=implicit-function-declaration]
  ...

Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org>
Tested-by: John Crispin <blogic@openwrt.org>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: David Daney <ddaney@caviumnetworks.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2012-07-18 18:35:57 -07:00
Joe Perches
6e5928f6df arch: Use eth_random_addr
Convert the existing uses of random_ether_addr to
the new eth_random_addr.

Signed-off-by: Joe Perches <joe@perches.com>
Acked-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
2012-07-16 22:39:25 -07:00
Bjorn Helgaas
9349b44a45 Merge branch 'pci/myron-final-fixups-v2' into next
* pci/myron-final-fixups-v2:
  PCI: call final fixups hot-added devices
  PCI: move final fixups from __init to __devinit
  x86/PCI: move final fixups from __init to __devinit
  MIPS/PCI: move final fixups from __init to __devinit
  PCI: never discard enable/suspend/resume_early/resume fixups
  PCI: release temporary reference in __nv_msi_ht_cap_quirk()
  PCI: restructure 'pci_do_fixups()'
2012-07-09 20:56:54 -06:00
Myron Stowe
02d4b36bf0 MIPS/PCI: move final fixups from __init to __devinit
Final fixups are executed during device enumeration.  If we support
hotplug, this may be after boot, so final fixups cannot be __init.

[bhelgaas: changelog]
Signed-off-by: Myron Stowe <myron.stowe@redhat.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2012-07-09 20:56:45 -06:00
Steven J. Hill
113c62d984 MIPS: Add support for the M14Kc core.
[ralf@linux-mips.org: Fixed whitespace damage.]

Signed-off-by: Steven J. Hill <sjhill@mips.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3773/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-06 23:56:00 +02:00
Ralf Baechle
839efb4ffb MIPS: MT: Fix indentation damage.
Split off from https://patchwork.linux-mips.org/patch/3603/.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-06 23:56:00 +02:00
Steven J. Hill
f0b77f2c0e MIPS: Clean-up GIC and vectored interrupts.
This change adds macros for routing of GIC interrupts for EIC and
non-EIC hardware modes. Also added Malta GIC macros having to do
with performance and timer interrupts.

Signed-off-by: Steven J. Hill <sjhill@mips.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3576/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-06 23:56:00 +02:00
Ralf Baechle
c6a4ebb9ae MIPS: Provide a symbol for the legacy performance counter interrupt.
Based on https://patchwork.linux-mips.org/patch/3576 - but this really
deserves its own patchset and the symbol should also be used :)

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-06 23:56:00 +02:00
Bjorn Helgaas
85a00dd391 Merge branch 'pci/myron-pcibios_setup' into next
* pci/myron-pcibios_setup:
  xtensa/PCI: factor out pcibios_setup()
  x86/PCI: adjust section annotations for pcibios_setup()
  unicore32/PCI: adjust section annotations for pcibios_setup()
  tile/PCI: factor out pcibios_setup()
  sparc/PCI: factor out pcibios_setup()
  sh/PCI: adjust section annotations for pcibios_setup()
  sh/PCI: factor out pcibios_setup()
  powerpc/PCI: factor out pcibios_setup()
  parisc/PCI: factor out pcibios_setup()
  MIPS/PCI: adjust section annotations for pcibios_setup()
  MIPS/PCI: factor out pcibios_setup()
  microblaze/PCI: factor out pcibios_setup()
  ia64/PCI: factor out pcibios_setup()
  cris/PCI: factor out pcibios_setup()
  alpha/PCI: factor out pcibios_setup()
  PCI: pull pcibios_setup() up into core
2012-07-05 15:31:05 -06:00
Myron Stowe
938ca5162e MIPS/PCI: adjust section annotations for pcibios_setup()
Make pcibios_setup() consistently use the "__init" section annotation.

Signed-off-by: Myron Stowe <myron.stowe@redhat.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2012-07-05 15:09:12 -06:00
Myron Stowe
11206c93c8 MIPS/PCI: factor out pcibios_setup()
The PCI core provides a generic pcibios_setup() routine.  Drop this
architecture-specific version in favor of that.

Signed-off-by: Myron Stowe <myron.stowe@redhat.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2012-07-05 15:09:12 -06:00
Roland Stigge
42b14cb037 mips: pci-lantiq: Fix check for valid gpio
This patch fixes two checks for valid gpio number, formerly (wrongly)
considering zero as invalid, now using gpio_is_valid().

Signed-off-by: Roland Stigge <stigge@antcom.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-07-05 15:02:18 +02:00
Jayachandran C
b876c1a0bc MIPS: Netlogic: Fix TLB size of boot CPU.
Starting other threads in the core will change the number of
TLB entries of a CPU.  Re-calculate current_cpu_data.tlbsize
on the boot cpu after enabling and waking up other threads.

The secondary CPUs do not need this logic because the threads
are enabled on the secondary cores at wakeup and before cpu_probe.

Signed-off-by: Jayachandran C <jayachandranc@netlogicmicro.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3751/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-03 19:04:02 +02:00
Ganesan Ramalingam
249e2a38fb MIPS: Netlogic: MSI enable fix for XLS
MSI interrupts do not work on XLS after commit a776c49
( "PCI: msi: Disable msi interrupts when we initialize a pci device" )
because the change disables MSI interrupts on the XLS PCIe bridges
during the PCI enumeration.

Fix this by enabling MSI interrupts on the bridge in the
arch_setup_msi_irq() function. A new function xls_get_pcie_link()
has been introduced to get the PCI device corresponding to the
top level PCIe bridge on which MSI has to be enabled.

Also, update get_irq_vector() to use the new xls_get_pcie_link()
function and PCI_SLOT() macro for determining the IRQ of PCI devices.

Signed-off-by: Ganesan Ramalingam <ganesanr@broadcom.com>
Signed-off-by: Jayachandran C <jayachandranc@netlogicmicro.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3753/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-03 18:57:19 +02:00
Jayachandran C
ea8e867d9b MIPS: Netlogic: Fix PCIX irq on XLR chips
The correct irq is PIC_PCIX_IRQ

Signed-off-by: Jayachandran C <jayachandranc@netlogicmicro.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3750/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-03 18:57:19 +02:00
Yinghai Lu
b918c62e08 PCI: replace struct pci_bus secondary/subordinate with busn_res
Replace the struct pci_bus secondary/subordinate members with the
struct resource busn_res.  Later we'll build a resource tree of these
bus numbers.

[bhelgaas: changelog]
Signed-off-by: Yinghai Lu <yinghai@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2012-06-13 15:42:22 -06:00