This implements simple support for adjusting the pin config value via the
pinctrl API. The pinconf-generic code is abandoned for now until we've
got a chance to revamp the pinmux_type state tracking that's needed by
legacy code.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
While this code is still being shuffled around the KBUILD_MODNAME value
isn't particularly useful, switch to something a bit more useful.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This follows the function support by simply doing 1 pin per group
encapsulation in order to keep with legacy behaviour. This will be
built on incrementally as SoCs define their own pin groups.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
If we encounter invalid entries in the pinmux GPIO range, make sure we've
still got a dummy pin definition but don't otherwise map it.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This maps out all of the function types to pinctrl function groups.
Presently this is restricted to one pin per function to maintain
compatability with legacy behaviour. This will be extended as groups
are introduced and exiting users migrated.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This begins the migration of the PFC core to the pinctrl subsystem.
Initial support is very basic, with the bulk of the implementation simply
being nopped out in such a way to allow registration with the pinctrl
core to succeed.
The gpio chip driver is stripped down considerably now relying purely on
pinctrl API calls to manage the bulk of its operations.
This provides a basis for further PFC refactoring, including decoupling
pin functions from the GPIO API, establishing pin groups, and so forth.
These will all be dealt with incrementally so as to introduce as few
growing and migratory pains to tree-wide PFC pinmux users today.
When the interfaces have been well established and in-tree users have
been migrated off of the legacy interfaces it will be possible to strip
down the core considerably, leading to eventual drivers/pinctrl rehoming.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This follows the intc/clk changes and shuffles the PFC support code under
its own directory. This will facilitate better code sharing, and allow us
to trim down the exported interface by quite a margin.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
The encoding is tightly packed, and future changes (such as
pinconf-generic support) can easily lead to a situation where we violate
the encoding constraints and trample data bit/reg bits. This plugs in
some sanity checks by way of a BUILD_BUG_ON() to blow up if we fail to
fit.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This implements some Kconfig knobs for ensuring that the PFC gpio chip
can be disabled or built as a module in the cases where it's optional, or
forcibly enabled in cases where it's not.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This implements a bit of rework for the PFC code, making the core itself
slightly more pluggable and moving out the gpio chip handling completely.
The API is preserved in such a way that platforms that depend on it for
early configuration are still able to do so, while making it possible to
migrate to alternate interfaces going forward.
This is the first step of chainsawing necessary to support the pinctrl
API, with the eventual goal being able to decouple pin function state
from the gpio API while retaining gpio chip tie-in for gpio pin functions
only, relying on the pinctrl/pinmux API for non-gpio function demux.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
At present reserving the IRLs in the IRQ bitmap in addition to the
dropping of the legacy IRQ pre-allocation prevent IRL IRQs from being
allocated for the x3proto board.
The only reason to permit reservations was to lock down possible hardware
vectors prior to dynamic IRQ scanning, but this doesn't matter much given
that the hardware controller configuration is sorted before we get around
to doing any dynamic IRQ allocation anyways. Beyond that, all of the
tables are __init annotated, so quite a bit more work would need to be
done to support reconfiguring things like IRL controllers on the fly,
much more than would ever make it worth the hassle.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This follows the MSTP clock change and implements variable access size
support for the rest of the CPG clocks, too. Upcoming SH-2A support has
need of this for 16-bit div4 clocks, while others will follow.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
The bulk of the MSTP users require 32-bit access, but this isn't the case
for some of the SH-2A parts, so add in some basic infrastructure to let
the CPU define its required access size in preparation.
Requested-by: Phil Edworthy <phil.edworthy@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Merge tag 'sh-for-linus' of git://github.com/pmundt/linux-sh
Pull SuperH updates from Paul Mundt.
* tag 'sh-for-linus' of git://github.com/pmundt/linux-sh: (25 commits)
sh: Support I/O space swapping where needed.
sh: use set_current_blocked() and block_sigmask()
sh: no need to reset handler if SA_ONESHOT
sh: intc: Fix up section mismatch for intc_ack_data
sh: select ARCH_DISCARD_MEMBLOCK.
sh: Consolidate duplicate _32/_64 unistd definitions.
sh: ecovec: switch SDHI controllers to card polling
sh: Avoid exporting unimplemented syscalls.
sh: add platform_device for RSPI in setup-sh7757
SH: pci-sh7780: enable big-endian operation.
serial: sh-sci: fix a race of DMA submit_tx on transfer
sh: dma: Collect up CHCR of SH7763, SH7764, SH7780 and SH7785
sh: dma: Collect up CHCR of SH7723 and SH7730
sh/next: Fix build fail by asm/system.h in asm/bitops.h
arch/sh/drivers/dma/{dma-g2,dmabrg}.c: ensure arguments to request_irq and free_irq are compatible
sh: cpufreq: Wire up scaling_available_freqs support.
sh: cpufreq: notify about rate rounding fallback.
sh: cpufreq: Support CPU clock frequency table.
sh: cpufreq: struct device lookup from CPU topology.
sh: cpufreq: percpu struct clk accounting.
...
Pull more ARM updates from Russell King.
This got a fair number of conflicts with the <asm/system.h> split, but
also with some other sparse-irq and header file include cleanups. They
all looked pretty trivial, though.
* 'for-linus' of git://git.linaro.org/people/rmk/linux-arm: (59 commits)
ARM: fix Kconfig warning for HAVE_BPF_JIT
ARM: 7361/1: provide XIP_VIRT_ADDR for no-MMU builds
ARM: 7349/1: integrator: convert to sparse irqs
ARM: 7259/3: net: JIT compiler for packet filters
ARM: 7334/1: add jump label support
ARM: 7333/2: jump label: detect %c support for ARM
ARM: 7338/1: add support for early console output via semihosting
ARM: use set_current_blocked() and block_sigmask()
ARM: exec: remove redundant set_fs(USER_DS)
ARM: 7332/1: extract out code patch function from kprobes
ARM: 7331/1: extract out insn generation code from ftrace
ARM: 7330/1: ftrace: use canonical Thumb-2 wide instruction format
ARM: 7351/1: ftrace: remove useless memory checks
ARM: 7316/1: kexec: EOI active and mask all interrupts in kexec crash path
ARM: Versatile Express: add NO_IOPORT
ARM: get rid of asm/irq.h in asm/prom.h
ARM: 7319/1: Print debug info for SIGBUS in user faults
ARM: 7318/1: gic: refactor irq_start assignment
ARM: 7317/1: irq: avoid NULL check in for_each_irq_desc loop
ARM: 7315/1: perf: add support for the Cortex-A7 PMU
...
intc_ack_data is flagged as __init when it shouldn't be, causing section
mismatches in non-init paths like intc_set_ack_handle():
WARNING: drivers/built-in.o(.text+0x5d760):
Section mismatch in reference from the function
intc_set_ack_handle() to the function .init.text:intc_ack_data()
The function intc_set_ack_handle()
references the function __init intc_ack_data().
This is often because intc_set_ack_handle lacks a __init
annotation or the annotation of intc_ack_data is wrong.
Reported-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
SH intc has a compile time dependency on NR_IRQS. Make this dependency a
local define so that shmobile (and ARM in general) can have run-time
NR_IRQS setting.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
This ensures that the sense/prio lists are sorted at registration time,
enabling us to use a simple binary search for an optimized lookup
(something that had been on the TODO for some time).
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
intc_set_affinity() updates the cpumask in place, so there's no need for
the upper layer to do this itself.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
It's possible to use IRQCHIP_SKIP_SET_WAKE to get the behaviour that
we're after, without having to bother with a dummy ->set_wake() callback
for the IRQ chip.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Various problems will happen if clk parent was set up directly.
it should use clk_reparent()
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Merge tag 'rmobile-for-linus' of git://github.com/pmundt/linux-sh
SH/R-Mobile updates for 3.3 merge window.
* tag 'rmobile-for-linus' of git://github.com/pmundt/linux-sh: (32 commits)
arm: mach-shmobile: add a resource name for shdma
ARM: mach-shmobile: r8a7779 SMP support V3
ARM: mach-shmobile: Add kota2 defconfig.
ARM: mach-shmobile: Add marzen defconfig.
ARM: mach-shmobile: r8a7779 power domain support V2
ARM: mach-shmobile: Fix up marzen build for recent GIC changes.
ARM: mach-shmobile: r8a7779 PFC function support
ARM: mach-shmobile: Flush caches in platform_cpu_die()
ARM: mach-shmobile: Allow SoC specific CPU kill code
ARM: mach-shmobile: Fix headsmp.S code to use CPUINIT
ARM: mach-shmobile: clock-r8a7779: clkz/clkzs support
ARM: mach-shmobile: clock-r8a7779: add DIV4 clock support
ARM: mach-shmobile: Marzen LAN89218 support
ARM: mach-shmobile: Marzen SCIF2/SCIF4 support
ARM: mach-shmobile: r8a7779 PFC GPIO-only support V2
ARM: mach-shmobile: r8a7779 and Marzen base support V2
sh: pfc: Unlock register support
sh: pfc: Variable bitfield width config register support
sh: pfc: Add config_reg_helper() function
sh: pfc: Convert index to field and value pair
...
When CONFIG_PM_RUNTIME is off, drivers/sh/pm_runtime.o still has to be
built on sh platforms, because then it provides means to statically
switch on device PM clocks.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
sh_clk_init_parent() are using clk->mapped_reg
which is mapped in clk_register()
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Add PFC support for a 32-bit unlock register. Needed to
drive the r8a7779 PFC that comes with a funky PMMR register.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Add support for variable config reg hardware by adding
the macro PINMUX_CFG_REG_VAR(). The width of each bitfield
needs to be passed to the macro, and the correct space must
be consumed by each bitfield in the enum table following the
macro. Data registers still need to have fixed bitfields.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Add a helper function for shared config reg access
calculations. This allows us to reduce the amount
of duplicated code, and at the same time prepare
for a common place for future variable bitwidth
config reg support.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Update the way the PFC code is passing bitfield
selection between configure register functions.
Convert the code from using index only to bitfield
number and selected value. First step towards future
variable bitfield width support.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Introduce gpio_read_bit() for data register read access
and modify sh_gpio_get_value() to make use of the new
function instead of gpio_read_reg(). The purpose of
this change is to update the code to only use the
gpio_read_reg() function for config register access.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* 'pm-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: (76 commits)
PM / Hibernate: Implement compat_ioctl for /dev/snapshot
PM / Freezer: fix return value of freezable_schedule_timeout_killable()
PM / shmobile: Allow the A4R domain to be turned off at run time
PM / input / touchscreen: Make st1232 use device PM QoS constraints
PM / QoS: Introduce dev_pm_qos_add_ancestor_request()
PM / shmobile: Remove the stay_on flag from SH7372's PM domains
PM / shmobile: Don't include SH7372's INTCS in syscore suspend/resume
PM / shmobile: Add support for the sh7372 A4S power domain / sleep mode
PM: Drop generic_subsys_pm_ops
PM / Sleep: Remove forward-only callbacks from AMBA bus type
PM / Sleep: Remove forward-only callbacks from platform bus type
PM: Run the driver callback directly if the subsystem one is not there
PM / Sleep: Make pm_op() and pm_noirq_op() return callback pointers
PM/Devfreq: Add Exynos4-bus device DVFS driver for Exynos4210/4212/4412.
PM / Sleep: Merge internal functions in generic_ops.c
PM / Sleep: Simplify generic system suspend callbacks
PM / Hibernate: Remove deprecated hibernation snapshot ioctls
PM / Sleep: Fix freezer failures due to racy usermodehelper_is_disabled()
ARM: S3C64XX: Implement basic power domain support
PM / shmobile: Use common always on power domain governor
...
Fix up trivial conflict in fs/xfs/xfs_buf.c due to removal of unused
XBT_FORCE_SLEEP bit
This resolves the conflict in the arch/arm/mach-s3c64xx/s3c6400.c file,
and it fixes the build error in the arch/x86/kernel/microcode_core.c
file, that the merge did not catch.
The microcode_core.c patch was provided by Stephen Rothwell
<sfr@canb.auug.org.au> who was invaluable in the merge issues involved
with the large sysdev removal process in the driver-core tree.
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Since the SH7372's INTCS in included into syscore suspend/resume,
which causes the chip to be accessed when PM domains have been
turned off during system suspend, the A4R domain containing the
INTCS has to stay on during system sleep, which is suboptimal
from the power consumption point of view.
For this reason, add a new INTC flag, skip_syscore_suspend, to mark
the INTCS for intc_suspend() and intc_resume(), so that they don't
touch it. This allows the A4R domain to be turned off during
system suspend and the INTCS state is resrored during system
resume by the A4R's "power on" code.
Suggested-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
Acked-by: Magnus Damm <damm@opensource.se>
After all sysdev classes are ported to regular driver core entities, the
sysdev implementation will be entirely removed from the kernel.
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: Magnus Damm <magnus.damm@gmail.com>
Cc: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kay Sievers <kay.sievers@vrfy.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Add support for non-entity mapped PFC registers through
the use of struct resource and ioremap()/iounmap().
The PFC main data structure gets updated with a pointer
to a struct resources array that point out all register
windows used by the PFC instance. The register definitions
are kept as physical addresses but the PFC code will do
transparent conversion into virtual addresses whenever
register windows are specified using with struct resource.
To introduce as little performance penalty as possible the
virtual address of each data register is cached in memory.
The virtual address of each configuration register is however
calculated during run time. This because the configuration
is considered slow path so focus is instead put on keeping
memory foot print as small as possible.
The PFC register access code is in this patch updated from
__raw_readN() / __raw_writeN() into ioreadN() / iowriteN().
This patch is needed to support the PFC block in r8a7779.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Convert the CPG DIV6 helper code to use the new mapped_reg
together with ioread32() and iowrite32().
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Convert the CPG DIV4 helper code to use the new mapped_reg
together with ioread32() and iowrite32().
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Convert the CPG MSTP32 helper code to use the new mapped_reg
together with ioread32() and iowrite32().
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Add a "mapped_reg" member to struct clk and use that
to keep the ioremapped register based on enable_reg.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>