Instead of having a hard coded virt-to-phys address
conversion code in sleep-sh7372.S, rework the code
to do the conversion in C using virt_to_phys().
This removes the need for PLAT_PHYS_OFFSET which
in turn is needed for ARCH_MULTIPLATFORM.
Signed-off-by: Magnus Damm <damm@opensource.se>
[horms+renesas@verge.net.au: squashed in build fix posted as
"ARM: shmobile: sh7372 build fix for SUSPEND=n && CPU_IDLE=n"]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* Ether device name updates for r8a7778 and r8a7779 Sergei Shtylyov
* Extended clock and driver coverage for r8a7778 by Goda-san and Morimoto-san
* Extended clock and coverage for r8a73a4 and r8a7790 by Guennadi Liakhovetski
* HSCIF support for r8a7790 by Ulrich Hecht
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.12 (GNU/Linux)
iQIcBAABAgAGBQJRuWnoAAoJENfPZGlqN0++mkAP/iOpvtb8sND7n9g8SHE7/6W5
sXHWSTbeGlF0ST47EsIdrmAcGAWMelg8GF0F7hBEwzb3zl+MPBnopI/RAVphVhIy
6Z1p1wuDvV4Zj1JsHNB3Y1NjHPO3be+14TZyTTwHpV9Ri1navYNB9jMnhShJHsYq
qfP9CryfXJgxv9YKyAv90UUvVfGNTQxRpEqkEYCDHtAJoWIcw3H4GpaxejTUp1xv
0L2/lvfeQbm4lUsd0i3I5Lm7+IQ375/nzQc2k9wqTNsHdAoeHC2LvKKzq5NXUv+/
4U+bmla6DxDioVzcYutCnOrbxNp0iIaNZFJqaHaxlllG45oSqOLFtwAXRLVW7YXO
gP5ZxeX3ITaLNxia9KZvwPP77guZQ8XS1TQ+vU0noDkA3V4qKbYDvvg7FkpUL+H4
sPhCFx2VG3WWStWas4IA9Db04z9m5bReN1BsQeTSaRrjA19ctkuOsaLDrW83ngvu
xQ754d26Yrmy/HaUojqVqR/oI+e6h3ps8lCtAKyi7MT7DTDve5EEMdw8ukte8RY0
v7Ad2bKFBdibYAH4Mfmmn0OX/uKZCDur0lMgUioi38Cto7SuIENnwm3vz0lg0t6x
79L3awlkaMP/Hvt4U9sLtV4bzyo1FVNzntmu0vaQDFSk1o29YSoNhR//WL67CeFr
grNpVRBO9g9iEx78yGHV
=wQKf
-----END PGP SIGNATURE-----
Merge tag 'renesas-soc2-for-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc
From Simon Horman:
Second Round of Renesas ARM-based SoC updates for v3.11
* Ether device name updates for r8a7778 and r8a7779 Sergei Shtylyov
* Extended clock and driver coverage for r8a7778 by Goda-san and Morimoto-san
* Extended clock and coverage for r8a73a4 and r8a7790 by Guennadi Liakhovetski
* HSCIF support for r8a7790 by Ulrich Hecht
* tag 'renesas-soc2-for-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: r8a7790: add clock definitions and aliases for MMCIF and SDHI
ARM: shmobile: r8a73a4: add clock definitions and aliases for MMCIF and SDHI
ARM: shmobile: r8a7778: add support MMC driver
ARM: shmobile: r8a7778: add support HSPI driver
ARM: shmobile: r8a7778: add support I2C driver
ARM: shmobile: r8a7778: add support MMC clock
ARM: shmobile: r8a7778: add support HSPI clock
ARM: shmobile: r8a7778: add support I2C clock
ARM: shmobile: r8a7790: HSCIF support
ARM: shmobile: r8a7778: fix Ether device name
ARM: shmobile: r8a7779: fix Ether device name
Signed-off-by: Olof Johansson <olof@lixom.net>
Conflicts:
arch/arm/mach-shmobile/clock-r8a7778.c
arch/arm/mach-shmobile/include/mach/r8a7778.h
These data will be kmemdup()'ed on
platform_device_add_resources() and platform_device_add_data()
This patch removed "const" to avoid section type conflict
with r8a7790_boards_compat_dt
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
SH-PFC:
* Entries for INTC external IRQs
* Remove dependency on GPIOLIB
* PFC support for r8a7790 SoC
* Pinmux support for r8a7778 SoC
* Increase pin group and function coverage for sh7372, r8a7740,
r8a7778, r8a7779 and r8a7790 SoCs
* Use pinctrl mapping on mackerel, ap4evb, armadillo800eva,
bonito, bockw, lager boards
* Use RCAR_GP_PIN macro in marzen board
* Remove unused GPIOs for sh7372, sh73a0, r8a7740 and r8a7790 SoCs
* Add bias (pull-up/down) pinconf support for r8a7740 SoC
* Add VCCQ support for sh73a0
GPIO car:
* Add RCAR_GP_PIN macro
* Add support for IRQ_TYPE_EDGE_BOTH
* Make the platform data gpio_base field signed
The GPIO changes have been included as the RCAR_GP_PIN and
IRQ_TYPE_EDGE_BOTH changes are depended on by SH-PFC changes.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.12 (GNU/Linux)
iQIcBAABAgAGBQJRrvTrAAoJENfPZGlqN0++OGkP/0ZqhzLRSqojR4YgoWlsL2UE
lKS41m8/eW2mPbyW2U+rpSWzPghJic9b9AgyKZXcpV5kzp2GQLzyLqRT3gqOoDP/
/4mxstqoCpvHq0+UsGSlv2yk9zMzYjL7dDbGslPhVXZD5SmGN/NM0W80le37ZDEd
UqIzg6O/dB+vZl343nXrZKvGc73HlDY9EiWhpgB6tbLiUvmbT+hATTg+ExY8cwEF
742klazJoqN+DVF6ihx7BQwDWs/beUyqp+ii0rfzcU5yI+fWe0cyHa+v64rZFQhI
F2rWLQu6rkDRCpcwvfu21azDKPFG8cMiV0xxgxF5bvg6STUfiAEpaCmjw1v+F30g
S+TdoeUlXkH1x761CDJ0qo0N4SQ2ueJ8/UPMOaA4cRU9mGCSp4o+S8PlUCd1HSVH
vKQzfxnyaqt0LPi23KAkXbAiwxwrq4ru06XvsuC9KbAdAK9n+FpnJKFZ7fv8c1uw
8a7FDSFdVnQ6E6DKvxl33JfDMsPEpFmikw+Nr/1Jnxms9THpCMphhZVc4mUDmdQT
BLxSXa2Y5ihiQoaHjJnrENUGRI4o4oZwVDCU5i0eUQBeqbx00UEW85iUNiVPecW1
aKphnrhoxqQZMHRrU2MqCe2mY5SPSnbKdc2YVcTW9/yxS7Q16txmAsiDyfiVB+bd
ZHw324BCBEvSk4NM2syW
=zNOH
-----END PGP SIGNATURE-----
mergetag object 413bfd0e67
type commit
tag renesas-soc-for-v3.11
tagger Simon Horman <horms@verge.net.au> 1370590998 +0900
Renesas ARM-based SoC updates for v3.11
* Increased clock coverage for r8a7740, r8a73a4, r8a7778 and r8a7790
* Use fixed clock ratio for r8a7778
* Always use shmobile_setup_delay for sh73a0
* Add add CPUFreq support for sh73a0
* Check kick bit before changing rate on sh73a0
* Do not overwrite all div4 clock operations on sh73a0
* Cleanup SH_FIXED_RATIO_CLK and SH_FIXED_RATIO_CLK macros
* sh73a0: Use DEFINE_RES_MEM*() everywhere
* r8a7740: Make private clock arrays static
* r8a7778: Correct model number
The last four changes listed above are cleanups. I have included them
in this series as all bar the last one are dependencies of non-cleanup
patches.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.12 (GNU/Linux)
iQIcBAABAgAGBQJRsY+RAAoJENfPZGlqN0++q3cP/0UR42WWj+pm6a7N7JDiby+b
+Dv1qxQB4zN+1eBFfLoNUNponGbKLPXP7ULHkN0BX0j5xLYhVpZJeCdAdMvHnKG7
rvDLfjE0eBWyxxnaKIx/UyOmE6TTWn/TRbj726qpQWv4CFNEtEx+WdRymMSikSPK
HeaXuhpm98kwqYpCH8yVu2VYgYMgv8fJxhd/N2ppsN65KKoTq5EITZ9K7+sqlueX
uwG45uquBM3K+UGfr/7KMhEY/IvWHrCqq2MpgRrcJAy6ROK39oNDtG/YfI8II/dK
T8IOCpHKbDvsvU/XGY3E0e2H1FRZCqzfI0dYp9Q/iSd9HSfOR3CwoMlZCC6zRBq2
dzHRqsklurbYjCSOQlHRxGNISBaSnaf6Fy8Ok720Zh7xDPinZeQrfxGccYA8eQaW
+Z7k3k6M5RaipRln5Hj4XiWc+Vk5ieJ1/clvSNpq+mmIxwGLJOdsqwhBktnGwsgs
3hxlzH6owR6JgP5iDZYcTdngRqhPb8AZeQduA0I3Lwf/1eyBKYH6ryPaKVutH89Q
PKJnxKETbEDN7eueblV5EhBeFHewTRn5U6wnOkD2ompuGUQCs1T2djF4F0IFy5WD
KZBaTkaKORaUq5woRzc12RYnLkRVlyQ1W+1u3e7NpZSG0ZlSufgW2m4pnfSpBJ6h
y+IBsNzw4ZHkNbwtj5ai
=9UCz
-----END PGP SIGNATURE-----
Merge tags 'renesas-pinmux-for-v3.11' and 'renesas-soc-for-v3.11' into cleanup
This merge has been performed in order to provide the pre-requisites for
a cleanup patch for the lager board to annotate various structures
with __initdata.
Conflicts:
arch/arm/mach-shmobile/Kconfig
arch/arm/mach-shmobile/include/mach/r8a7778.h
arch/arm/mach-shmobile/setup-r8a7778.c
This patch enables Spansion S25FL008K chip on HSPI0
Signed-off-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This patch enables rx8581 on I2C0
Signed-off-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Register Ether device from bockw_init(), passing the platform data to it, adding
only the RMII pin group to bockw_pinctrl_map[]. Although the LINK signal exists
on the board, it's connected to the link/activity LED output of the PHY, thus
the link disappears and reappears after each packet. We'd be better off ignoring
such signal and getting the link state from the PHY indirectly.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
[horms+renesas@verge.net.au: manually applied]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add MSTP clock definitions and fix aliases for the two MMCIF and four SDHI
interfaces on r8a7790 (H2).
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
[horms+renesas@verge.net.au: applied manually]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add MSTP clock definitions and fix aliases for the two MMCIF and three SDHI
interfaces on r8a73a4 (APE6).
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Instead of relying on CONFIG_MEMORY_START for memory
base address, let each romImage board header file
specify this information.
This is reworks code not to rely on CONFIG_MEMORY_START
which in turn is needed for ARCH_MULTIPLATFORM.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This is V2 of the mach-shmobile uImage load address rework patch.
Rework the mach-shmobile uImage load address calculation by storing
the per-board load addresses in Makefile.boot. This removes the
CONFIG_MEMORY_START dependency from Makefile.boot, and it also makes
it possible to create safe kernel images that boot on multiple boards.
This is one of several series of code that reworks code not to rely on
CONFIG_MEMORY_START/SIZE which in turn is needed for ARCH_MULTIPLATFORM.
Signed-off-by: Magnus Damm <damm@opensource.se>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add a platform device for the r8a7778 MMC.
Signed-off-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add a platform device for the r8a7778 HSPI.
Signed-off-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add a platform device for the r8a7778 I2C.
Signed-off-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This patch adds r8a7778 HSPI clock support.
It also adds shyway_clk which is requiested
from sh-hspi driver
Signed-off-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This patch adds r8a7778 I2C clock support.
It also adds peripheral_clk which is requiested
from i2c-rcar driver
Signed-off-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Register the USB PHY device from bockw_init(), passing the platform data to it.
Set machine's init_late() method to r8a7778_init_late() in order for [EO]HCI to
get registered too...
Don't forget to add USB PENC0/1 pins to bockw_pinctrl_map[].
The patch has been tested on the BOCK-W board.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add USB clock and EHCI, OHCI, and USB PHY platform devices for R8A7778 SoC; add
a function to register PHY device with board-specific platform data and register
EHCI and OHCI platfrom devices from the init_late() board method.
Also, don't forget to enable CONFIG_ARCH_HAS_[EO]HCI options for R8A7778 SoC in
Kconfig...
The patch has been tested on the BOCK-W board.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Since we're now going to setup the USBPCTRL0 register using the USB PHY device's
platform data, we now need a way to pass those platform data from the board file
to the device which is situated in setup-r8a7779.c -- and what I'm suggesting is
r8a7779_add_usb_phy_device() that will register USB PHY platform device with the
passed platform data using platform_device_register_resndata() call; creating
this function involves deletion of 'usb_phy_device' from r8a7779_devices_dt[],
so that it will no longer be registered for the generic R8A7779 machine (where
we can't provide the platform data anyway), hence EHCI/OHCI drivers will fail
to load as well.
For the Marzen board, this new function will be called from marzen_init() to
register the USB PHY device early enough.
Note that the board and the SoC code have to be in one patch to keep the code
bisectable...
The patch has been tested on the Marzen board.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
[horms+renesas@verge.net.au: manually applied]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The memory region that is used by the driver overlaps EHCI and OHCI register
regions for absolutely no reason now -- fix it by adding offset of 0x800 to
the base address, changing the register #define's accordingly. This has extra
positive effect that we now can use devm_ioremap_resource()...
Note that the driver and the SoC code have to be in one patch to keep the code
bisectable...
The patch has been tested on the Marzen board.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Now that 'drivers/usb/phy/phy-rcar-usb.c' doesn't require the second memory
resource anymore, we can remove it from the R8A7779's USB PHY platform device.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Setup the EHCI internal buffer (before EHCI driver has a chance to touch the
registers) using the pre_setup() method in 'struct usb_ehci_pdata'.
The patch has been tested on the Marzen board.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
USB EHCI, OHCI, and common PHY are the SoC devices but are wrongly defined and
registered in the Marzen board file. Move the data and code to their proper
place in setup-r8a7779.c; while at it, we have to rename r8a7779_late_devices[]
to r8a7779_standard_devices[] -- this seems legitimate since they are registered
from r8a7779_add_standard_devices() anyway.
Note that I'm deliberately changing the USB PHY platform device's 'id' field
from (previously just omitted) 0 to -1 as the device is a single of its kind.
Note also that the board and SoC code have to be in one patch to keep the code
bisectable...
The patch has been tested on the Marzen board.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
[horms+renesas@verge.net.au: manually applied]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Adds support for HSCIF0 and HSCIF1 on the r8a7790.
Signed-off-by: Ulrich Hecht <ulrich.hecht@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
While recasting commit 524219146a (ARM: shmobile:
R8A7778: add Ether support), I made a typo in the platform device's name: used
underscore instead of hyphen.
However, there's now patch merged to net-next.git renaming the platform device
from "sh-eth" to "r8a777x-ehter", so it makes the most sense to change the name
straight to that one.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
While recasting commit dace48d04d (ARM: shmobile:
R8A7779: add Ether support), I made a typo in the platform device's name: used
underscore instead of hyphen.
However, there's now patch merged to net-next.git renaming the platform device
from "sh-eth" to "r8a777x-ehter", so it makes the most sense to change the name
straight to that one.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This branch acts as a base for adding USB support to
r8A7778/BOCK-W and r8A7779/Marzen.
It includes the soc branch to provide dependencies in
the r8A7778 clock code.
It includes pinmux to provide pinmux initialisation for Bock-W
which is a dependency.
Conflicts:
arch/arm/mach-shmobile/Kconfig
arch/arm/mach-shmobile/include/mach/r8a7778.h
arch/arm/mach-shmobile/setup-r8a7778.c
* Armadillo800eva reference DT - bring up armadillo800eva baord
using DT as much as possible
* Remove unused GIC dtsi entries for r8a7790 and r8a73a4
* Add AS3711 and CPUFreq DT bindings for kzm9g-reference
* Add irqpin DT support for marzen-reference
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.12 (GNU/Linux)
iQIcBAABAgAGBQJRrr1MAAoJENfPZGlqN0++IO8P/0KwAef6d4UNK26RlK8/rFLH
VJteLNoocz0Le/qgkJNYZ79p4azW6ou9U6Muk/tKgZSdHyBo/y4mDdNTkJyefqTI
fx6r/3SZPh2/hhfBhaaoZy6FiUWzoZk/OFLsE/LJkDTmQ/9wUcZlz7fl/sPc8tt2
yV9oKJLx2s1lsAsWTQx7NvKZQQu3OX7e0SlYVTIDWtFvxy6gyM/95uj1tIyPrr1d
af4wyLS+Tk7wa08i5+ROqtBc+CIR/UAwo9xejkAK+CXiamIvdVt31WkqSmaBmvh0
BYPm8TlNk5TkaRbb+a3v3eYSE5B7de9b771GJfvqZNy+M4o66P6jP0keYhj8kfu/
KpzZPPIJmRmrWnJgkJ7MuTZ5TpPkif/ivYWcY22jftaRsWuEtKI9a2vIKv3lp088
ojOb7nJHyiPbEBT8ebvP7Wb0NkxsvMzv+jzaPlJUK1to8waKUzPoBukJs39J/Hj7
Y+i7ZOBXJcDDby4ad5VVKuMtGKBeZWF/mixo/Cs+9UHrrMJBom97EANR+xpHteKA
Emrd9zvOXb9+G870KtAhq5i7G+C0LBOZhvpDjcYTS3SopRjZ3Gl55RphjexF25Gs
EHJ7cHmauEZAw6IJ7n8outRTiAWDAotTwBcXxuoCwK3uIbyMHWn4hI2oHyIcJ7uV
ZT9Xjgp5LZuXyJU/5kIP
=6tQE
-----END PGP SIGNATURE-----
Merge tag 'renesas-dt-for-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt
From Simon Horman:
Renesas ARM-based SoC DT updates for v3.11
* Armadillo800eva reference DT - bring up armadillo800eva baord
using DT as much as possible
* Remove unused GIC dtsi entries for r8a7790 and r8a73a4
* Add AS3711 and CPUFreq DT bindings for kzm9g-reference
* Add irqpin DT support for marzen-reference
* tag 'renesas-dt-for-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: marzen-reference: add irqpin support in DT
ARM: shmobile: kzm9g-reference: add AS3711 and CPUFreq DT bindings
ARM: shmobile: armadillo800eva: Reference DT implementation
ARM: shmobile: Remove unused r8a7790 GIC CPU interface DT bits
ARM: shmobile: Remove unused r8a73a4 GIC CPU interface DT bits
ARM: shmobile: r8a7740: Prepare for reference DT setup
ARM: shmobile: r8a7740: Add OF support to initialze the GIC
Signed-off-by: Olof Johansson <olof@lixom.net>
Get the R-Car code/data in the driver out of #ifdef by adding "r8a777x-ether" to
the platfrom driver's ID table; since it's the last #ifdef, we remove CARDNAME
from the ID table and no longer check the driver data before assigning it to
'mdp->cd'...
Change the Ether platform device's name in the ARM platform code accordingly.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Get the R8A7740 code/data in the driver out of #ifdef by adding "r8a7740-gether"
to the platform driver's ID table. Change the GEther platform device's name in
the ARM platform code accordingly.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
* Correction to USB OVC and PENC pin groupings on r8a7779 SoC.
This avoids conflicts when the USB_OVCn pins are used by another function.
This has been observed to be a problem in v3.10-rc1.
* Update CMT clock rating for sh73a0 SoC to resolve boot failure
on kzm9g-reference. This resolves a regression between v3.9 and v3.10-rc1.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.12 (GNU/Linux)
iQIcBAABAgAGBQJRrZpLAAoJENfPZGlqN0++t0UQAIBErmUK+bGdZ21NmWmjIMb3
mOegzj53Fvl3nWixPqYEGOSBEMtAltL4BnuEIJ5cC4jIijHYn9YtAfGQYSmgyV4+
KxloM8ZpJ6deGsKC5NyPnq9Hf+8Qec44LxQRuZxh58gchZFoUn2DAZBCBeLYlSs1
t2BHBD4aMaI6VYfMpBOaSPNn7oCds2kzqQ7pkiLkLdUWw1pnfxkWzBB+4+JYCOx1
BqfwgoxuhHSf7J9W2sb4EakDh19ZjBPfcjdS/DJOSk3Q6WyhkyaC6VkdYiVXekWg
tcedXxB4QavDkDiAje1/z9gBJHnE58ZKB+Q3MakHgwunhr5wMBzS1Hk62ybcPW+W
fUzhzmJd/BLxfzAJbguNoGistWmY6qcf8F2Zvx6VyI+X+BK4OulZvJzle4t5mDu6
GdYXRYP/dX9IuMrA5i5uemYF3/7Qj+CXkyO+6r6baGSBub9rE+dDI15Zjzm7en8n
DpSji9h2gvmN3jJ5fq22MikRegk+UyMGahr3P7DqgJdv6SPNGVe5cEJRLrijYojM
qC9MCyh4Jnai0NRnFoIf4+DhF3/fqbmgcBCOINDpkisf1u7Qxrm10c7kFHngu20w
ub9xhHq3hYgzcwn4rk/c/H5deWdOj5LoKM+ddy4isihbCOKtcPrOVHTWSnGuL+th
hnXe/GxU9Tyq0yF+JgT7
=oukw
-----END PGP SIGNATURE-----
Merge tag 'renesas-fixes-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into fixes
From Simon Horman, Renesas ARM based SoC fixes for v3.10:
- Correction to USB OVC and PENC pin groupings on r8a7779 SoC.
This avoids conflicts when the USB_OVCn pins are used by another function.
This has been observed to be a problem in v3.10-rc1.
- Update CMT clock rating for sh73a0 SoC to resolve boot failure
on kzm9g-reference. This resolves a regression between v3.9 and v3.10-rc1.
* tag 'renesas-fixes-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: sh73a0: Update CMT clockevent rating to 80
sh-pfc: r8a7779: Don't group USB OVC and PENC pins
Signed-off-by: Olof Johansson <olof@lixom.net>
In 8a4da6e: "arm: arch_timer: move core to drivers/clocksource", the
selection of ARM_ARCH_TIMER was indirected via HAVE_ARM_ARCH_TIMER,
though mach-exynos's selection of ARM_ARCH_TIMER was missed, and since
then mach-shmobile, mach-tegra, and mach-virt have begun selecting
ARM_ARCH_TIMER. This can lead to architected timer support erroneously
appearing to not be selected in menuconfig.
This patch fixes up the Kconfigs for those platforms to select
HAVE_ARM_ARCH_TIMER.
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Simon Horman <horms+renesas@verge.net.au>
Cc: Kukjin Kim <kgene.kim@samsung.com>
Cc: Marc Zyngier <marc.zyngier@arm.com>
marzen_init_late() should be static
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This patch is directly accessing to PUPR4 register which can
control SDHI0 CD/WP pin pull-up setting.
It should be replaced in the future.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Update the marzen board to use the INTC External IRQ pin driver for SMSC.
This code was originally posted by Magnus Damm as part of
"ARM: shmobile: INTC External IRQ pin driver on r8a7779"
but somehow omitted when I applied that patch.
Cc: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The lager board has pins 1 - 4 of SW2 wired up to GPIO pins.
This patch allows access to those pins as KEYS 1 - 4 using
gpio-keys.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The board has 3 LEDs connected to GPIOs. Add a led-gpio device to
support them.
Based on "ARM: shmobile: marzen: Add GPIO LEDs" by Laurent Pinchart.
Cc: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
SMSC driver will try to get regulator if .config had CONFIG_REGULATOR,
and, shmobile_defconfig has it.
SMSC driver on Bock-W board will be failed if it doens't have
dummy regulator settings.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Debug serial (= SCIF0) is connected to CN9 upper side,
and it is shared by RCAN.
This patch adds SCIF/RCAN dipswitch explanation on
comment area for developers.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
KZM9G uses an AS3711 PMIC to supply power to the CPU and the LCD backlight.
The PMIC on the board is pre-programmed to supply correct voltages to the
CPU, power supply to the backlight has to be turned on at run-time. The
latter is currently performed by a hard-coded I2C command sequence in the
board file. This patch removes the backlight hack and instead adds an I2C
device to instantiate the AS3711 MFD driver, which will add a regulator
device to dynamically adjust CPU voltages and a backlight device.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
As the kzm9d only has one smsc911x device it
may be registered as a platform device with id -1.
This allows the kzm9d board to access the smsc911x device
when CONFIG_REGULATOR (and CONFIG_REGULATOR_FIXED_VOLTAGE)
are set. The motivation for which is twofold: using regulators
seems to be generally a good thing; it will move the kzm9d defconfig
one step closer to being able to be consolidated with other
shmobile defconfigs.
An alternate but so far untested approach would be to
update the definition of dummy_supplies in board-kzm9d.c
to use "smsc911x.0" instead of "smsc911x".
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Bock-W board will needs more board specific ioremap() method.
This patch tidyup current FPGA specific settings
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The orignal commit 3263e09d287fbaa8a9424b5e69396599a3bbd518
(ARM: shmobile: Initial r8a73a4 SoC support V3)
put MP clock parent as EXTAL2, but its code was removed
on DIV6 clock support commit.
This patch makes it consistent.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
According to the datasheet, it is not allowed to change div4 clock rates
if an earlier rate change operation is still in progress, as indicated by
a set kick bit.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
An earlier commit "ARM: shmobile: sh73a0: add support for adjusting CPU
frequency" intended to replace some clock operations only for the Z-clock,
instead it replaced them for all div4 clocks, since all div4 clocks share
the same copy of clock operations. Fix this by using a separate clock
operations structure for Z-clock.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Break out the function sh73a0_init_delay() that now
gets called both for the C version of the code and
the DT -reference boards. This way we handle both
cases in the same way.
Allows us to boot with TWD only in the kernel configuration
for C board code. TWD is not yet enabled in the case of
DT -reference - this due to a dependency on CCF.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This patch enables the use of the generic cpufreq-cpu0 driver on sh73a0.
Providing a regulator, a list of OPPs in DT, combined with a virtual
cpufreq-cpu0 platform device and a clock, attached to it is everything,
the cpufreq-cpu0 driver needs. The first sh73a0 platform, implementing
such CPUFreq support is kzm9g-reference.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
On SH73A0 the output of PLL0 is supplied to two dividers, feeding clock to
the CPU core and SGX. Lower CPU frequencies allow the use of lower supply
voltages and thus reduce power consumption.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Both clock-r8a7740.c and clock-r8a7790.c define a div4_clks array as
non-static. Compiling support for both SoCs thus result in a symbol
redefinition. Fix it by defining the arrays as static.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Almost all clock needs main clock which is basis clock on r8a7790.
This patch adds it, and, set its parent/ratio via MD pin.
It is based on v0.05 datasheet
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This patch adds SDHI register function which needs id number (= 0/1/2)
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
R-Car M1 has many clocks, and it is possible to
read/use clock ratio of these clocks from FRQMRx.
But, these ratio are fixed value and
these are decided by MD pin status.
This patch reads MD pin status,
and used fixed ratio clock for other clocks.
It was tesed on bock-w board.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
DIV6 clocks control each core clocks.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
DIV4 clocks control each core clocks.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
PLL clocks are basis clock for other clock.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Almost all clock needs main clock which is basis clock on r8a73a4.
This patch adds it, and, set parent clock via CKSCR register.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add clock association for i2c0 and i2c1 for the new DT names.
Signed-off-by: Bastian Hecht <hechtb+renesas@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
When we use the ethernet device via DT setup, we need to add it
to a lookup list until this is properly handled later in a DT-only
fashion.
Signed-off-by: Bastian Hecht <hechtb+renesas@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Ether setup code position was scattering.
This patch fixes it up
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
SH_CLK_SET_RATIO() will be trouble without this patch
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Convert code to use DEFINE_RES_MEM*() macros.
These macros were already used in this file,
this change makes their usage consistent throughout the file.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The correct model name is R-Car M1A or R8A77781; R8A77780 corresponds to R-Car
M1S which is a SH based SoC.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
[horms+renesas@verge.net.au: manually applied]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Both clock-r8a7740.c and clock-r8a7790.c define a div4_clks array as
non-static. Compiling support for both SoCs thus result in a symbol
redefinition. Fix it by defining the arrays as static.
To avoid further similar issues, also define the main_clks as static.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Replace hardcoded pin numbers with the RCAR_GP_PIN macro to make the
code match the documentation.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Initialize r8a7790 pinmuxing and register mappings for the two debug
serial ports.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Use DEFINE_RES_MEM() and platform_device_register_simple()
to save a couple of lines of code.
Signed-off-by: Magnus Damm <damm@opensource.se>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
"gpio-rcar: Support IRQ_TYPE_EDGE_BOTH" adds support to the R-Car GPIO
driver for IRQ_TYPE_EDGE_BOTH. As hardware support for this feature is
not universal for all SoCs a flag, has_both_edge_trigger, has been
added to the platform data of the driver to allow this feature to be
enabled.
As the r8a7790 SoC hardware supports this feature enable it.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The VCCQ MC0 power gate is now controlled by a regulator registered by
the PFC driver. Remove the corresponding function GPIO.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The VCCQ MC0 power gate is now controlled by a regulator registered by
the PFC driver. Remove the corresponding function GPIO.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Use DEFINE_RES_MEM() to save a couple of lines of code.
Signed-off-by: Magnus Damm <damm@opensource.se>
[lp: Don't declare r8a7779_pfc_resources as const]
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Function GPIOs are not used anymore, and all code use the GPIO numbers
directly. Remove the GPIOs enumeration.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Move GPIOs handling from the PFC device to separate GPIO devices.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This patch was tested on Bock-W board
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Function GPIOs are not used anymore, and all code use the GPIO numbers
directly. Remove the GPIOs enumeration.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Those GPIOs have been deprecated by the pinctrl API. They are unused and
unneeded, remove them.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Those GPIOs have been deprecated by the pinctrl API. They are unused and
unneeded, remove them.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Those GPIOs have been deprecated by the pinctrl API. They are unused and
unneeded, remove them.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Those GPIOs have been deprecated by the pinctrl API. They are unused and
unneeded, remove them.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Those GPIOs have been deprecated by the pinctrl API. They are unused and
unneeded, remove them.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Those GPIOs have been deprecated by the pinctrl API. They are unused and
unneeded, remove them.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Those GPIOs have been deprecated by the pinctrl API. They are unused and
unneeded, remove them.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
We use the new pinctrl framework now.
Signed-off-by: Bastian Hecht <hechtb+renesas@gmail.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The "index" field of struct cpufreq_frequency_table was never an
index and isn't used at all by the cpufreq core. It only is useful
for cpufreq drivers for their internal purposes.
Many people nowadays blindly set it in ascending order with the
assumption that the core will use it, which is a mistake.
Rename it to "driver_data" as that's what its purpose is. All of its
users are updated accordingly.
[rjw: Changelog]
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
