Commit Graph

9598 Commits

Author SHA1 Message Date
Anusha Rao
f6b2bd9cb2 clk: qcom: gcc-ipq9574: Enable crypto clocks
Enable the clocks required for crypto operation.

Reviewed-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Signed-off-by: Anusha Rao <quic_anusha@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230526161129.1454-3-quic_anusha@quicinc.com
2023-06-13 15:25:45 -07:00
Srinivas Kandagatla
c2ef1ec97c clk: qcom: Add lpass audio clock controller driver for SC8280XP
Add support for the lpass audio clock controller found on SC8280XP based
devices. This would allow lpass peripheral loader drivers to control the
clocks and bring the subsystems out of reset.

Currently this patch only supports resets as the Q6DSP is in control of
LPASS IP which manages most of the clocks via Q6PRM service on GPR rpmsg
channel.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230608125315.11454-5-srinivas.kandagatla@linaro.org
2023-06-13 11:14:04 -07:00
Srinivas Kandagatla
a5c9c3ba24 clk: qcom: Add lpass clock controller driver for SC8280XP
Add support for the lpass clock controller found on SC8280XP based devices.
This would allow lpass peripheral loader drivers to control the clocks and
bring the subsystems out of reset.

Currently this patch only supports resets as the Q6DSP is in control of
LPASS IP which manages most of the clocks via Q6PRM service on GPR rpmsg
channel.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230608125315.11454-4-srinivas.kandagatla@linaro.org
2023-06-13 11:14:04 -07:00
Jagadeesh Kona
bfae40744b clk: qcom: gpucc-sm8550: Add support for graphics clock controller
Add support for gpucc driver on SM8550, which provides clocks for the
graphics subsystem.

Co-developed-by: Taniya Das <quic_tdas@quicinc.com>
Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
Signed-off-by: Jagadeesh Kona <quic_jkona@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230524181800.28717-3-quic_jkona@quicinc.com
2023-05-26 18:24:05 -07:00
Konrad Dybcio
728692d49e clk: qcom: Add support for SM8450 GPUCC
The GPUCC manages the clocks for the Adreno GPU found on the
sm8450 SoCs.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230517-topic-waipio-gpucc-v1-4-4f40e282af1d@linaro.org
2023-05-26 18:23:24 -07:00
Konrad Dybcio
d4113d5f2b clk: qcom: gcc-sm8450: Enable hw_clk_ctrl
Enable hardware clock control on all RCGs.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230517-topic-waipio-gpucc-v1-3-4f40e282af1d@linaro.org
2023-05-26 18:22:58 -07:00
Konrad Dybcio
a0e0ec7424 clk: qcom: rcg2: Make hw_clk_ctrl toggleable
Certain SoCs use the HW_CLK_CTRL feature on some of the clocks they
host. This allows the clocks to be turned on automatically when a
downstream branch tries to change rate or config.

Make it togglable so that we can utilize this.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230517-topic-waipio-gpucc-v1-2-4f40e282af1d@linaro.org
2023-05-26 18:22:58 -07:00
Dmitry Baryshkov
8fd492e77f clk: qcom: mmcc-msm8974: use clk_rcg2_shared_ops for mdp_clk_src clock
The mdp_clk_src clock should not be turned off. Instead it should be
'parked' to the XO, as most of other mdp_clk_src clocks. Fix that by
using the clk_rcg2_shared_ops.

Fixes: d8b212014e ("clk: qcom: Add support for MSM8974's multimedia clock controller (MMCC)")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Tested-by: Luca Weiss <luca@z3ntu.xyz>
Acked-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230507175335.2321503-1-dmitry.baryshkov@linaro.org
2023-05-26 13:42:46 -07:00
Kathiravan T
7510e80f4a clk: qcom: ipq5332: fix the order of SLEEP_CLK and XO clock
The order of DT_SLEEP_CLK and DT_XO are swapped and it is incorrect.
Due to which the clocks for which the parent should be XO is having parent
as SLEEP_CLK and vice versa. So fix the same by re-ordering the entries.

Fixes: 3d89d52970 ("clk: qcom: add Global Clock controller (GCC) driver for IPQ5332 SoC")
Reported-by: Devi Priya <quic_devipriy@quicinc.com>
Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230417105607.4091-1-quic_kathirav@quicinc.com
2023-05-26 13:29:32 -07:00
Kathiravan T
81c1ef89a4 clk: qcom: ipq5332: fix the src parameter in ftbl_gcc_apss_axi_clk_src
480MHz is derived from P_GPLL4_OUT_AUX not from P_GPLL4_OUT_MAIN. Update
the freq_tbl with the correct src.

Fixes: 3d89d52970 ("clk: qcom: add Global Clock controller (GCC) driver for IPQ5332 SoC")
Reported-by: Manikanta Mylavarapu <quic_mmanikan@quicinc.com>
Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230417044342.9406-1-quic_kathirav@quicinc.com
2023-05-26 13:29:23 -07:00
Konrad Dybcio
63d56adf04 clk: qcom: dispcc-qcm2290: Fix GPLL0_OUT_DIV handling
GPLL0_OUT_DIV (.fw_name = "gcc_disp_gpll0_div_clk_src") was previously
made to reuse the same parent enum entry as GPLL0_OUT_MAIN
(.fw_name = "gcc_disp_gpll0_clk_src") in parent_map_2.

Resolve it by introducing its own entry in the parent enum and
correctly assigning it in disp_cc_parent_map_2[].

Fixes: cc517ea333 ("clk: qcom: Add display clock controller driver for QCM2290")
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230412-topic-qcm_dispcc-v2-2-bce7dd512fe4@linaro.org
2023-05-26 13:26:03 -07:00
Konrad Dybcio
92dfee0fc8 clk: qcom: dispcc-qcm2290: Fix BI_TCXO_AO handling
BI_TCXO_AO (.fw_name = "bi_tcxo_ao") was previously made to reuse the
same parent enum entry as BI_TCXO (.fw_name = "bi_tcxo") in parent_map_2.

Resolve it by introducing its own entry in the parent enum and
correctly assigning it in disp_cc_parent_map_2[].

Fixes: cc517ea333 ("clk: qcom: Add display clock controller driver for QCM2290")
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230412-topic-qcm_dispcc-v2-1-bce7dd512fe4@linaro.org
2023-05-26 13:26:02 -07:00
Robert Marko
349b5bed53 clk: qcom: ipq6018: fix networking resets
Networking resets in IPQ6018 all use bitmask as they require multiple
bits to be set and cleared instead of a single bit.

So, current networking resets have the same register and bit 0 set which
is clearly incorrect.

Fixes: d9db07f088 ("clk: qcom: Add ipq6018 Global Clock Controller support")
Signed-off-by: Robert Marko <robimarko@gmail.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230526190855.2941291-2-robimarko@gmail.com
2023-05-26 13:04:52 -07:00
Robert Marko
f4f0c8acee clk: qcom: gcc-ipq6018: update UBI32 PLL
Update the UBI32 alpha PLL config to the latest values from the downstream
QCA 5.4 kernel.

Signed-off-by: Robert Marko <robimarko@gmail.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230526190855.2941291-1-robimarko@gmail.com
2023-05-26 13:04:52 -07:00
Devi Priya
20beb85f7a clk: qcom: apss-ipq-pll: Add support for IPQ9574
Add the compatible and configuration values for A73 Huayra PLL found
on IPQ9574.

Co-developed-by: Praveenkumar I <quic_ipkumar@quicinc.com>
Signed-off-by: Praveenkumar I <quic_ipkumar@quicinc.com>
Signed-off-by: Devi Priya <quic_devipriy@quicinc.com>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230406061314.10916-3-quic_devipriy@quicinc.com
2023-05-26 12:16:40 -07:00
Krzysztof Kozlowski
ab7f00379f clk: qcom: restrict drivers per ARM/ARM64
There is no point to allow selecting clock controller drivers for
Qualcomm ARMv7 SoCs when building ARM64 kernel, and vice versa.  This
makes kernel configuration more difficult as many do not remember the
Qualcomm SoCs model names/numbers.  No features should be lost because:
1. There won't be a single image for ARMv7 and ARMv8/9 SoCs.
2. Newer ARMv8/9 SoCs won't be running in arm32 emulation mode.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230514114711.18258-1-krzysztof.kozlowski@linaro.org
2023-05-24 21:47:17 -07:00
Imran Shaik
108cdc09b2 clk: qcom: Add GCC driver support for SDX75
Add Global Clock Controller (GCC) support for SDX75 platform.

Signed-off-by: Imran Shaik <quic_imrashai@quicinc.com>
Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230512122347.1219-6-quic_tdas@quicinc.com
2023-05-24 21:47:17 -07:00
Imran Shaik
1c2360ff58 clk: qcom: rpmh: Add RPMH clocks support for SDX75
Add support for RPMH clocks for SDX75 platform.

Signed-off-by: Imran Shaik <quic_imrashai@quicinc.com>
Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230512122347.1219-5-quic_tdas@quicinc.com
2023-05-24 21:47:17 -07:00
Imran Shaik
9092d1083a clk: qcom: branch: Extend the invert logic for branch2 clocks
Add support to handle the invert logic for branch2 clocks.
Invert branch halt would indicate the clock ON when CLK_OFF
bit is '1' and OFF when CLK_OFF bit is '0'.

Signed-off-by: Imran Shaik <quic_imrashai@quicinc.com>
Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230512122347.1219-2-quic_tdas@quicinc.com
2023-05-24 21:47:17 -07:00
Luca Weiss
e9a2db5caf clk: qcom: smd-rpm: conditionally enable scaling before doing handover
On older platforms like msm8226, msm8974 and msm8916 the driver in the
downstream kernel enables scaling first before doing the handover of the
clocks.

While this normally doesn't seem to cause noticeable problems, on
apq8026-asus-sparrow this causes the device to immediately reboot,
perhaps due to older rpm firmware that becomes unhappy.

On newer platforms the order has swapped and enabling scaling is done
after the handover, so let's introduce this behavior only conditionally
for msm8226 and msm8974 for now.

Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230506-rpmcc-scaling-handover-v1-1-374338a8dfd9@z3ntu.xyz
2023-05-24 21:47:17 -07:00
Christian Marangi
bbd899f534 clk: qcom: gcc-sdm660: drop redundant F define
The same exact F frequency table entry is defined in clk-rcg.h
Drop the redundant define to cleanup code.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230417174408.23722-2-ansuelsmth@gmail.com
2023-05-24 21:47:17 -07:00
Christian Marangi
923f7d678b clk: qcom: gcc-ipq6018: drop redundant F define
The same exact F frequency table entry is defined in clk-rcg.h
Drop the redundant define to cleanup code.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230417174408.23722-1-ansuelsmth@gmail.com
2023-05-24 21:47:16 -07:00
Konrad Dybcio
7bf654a0d9 clk: qcom: gcc-qcm2290: Mark RCGs shared where applicable
The vast majority of shared RCGs were not marked as such. Fix it.

Fixes: 496d1a13d4 ("clk: qcom: Add Global Clock Controller driver for QCM2290")
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230403174807.345185-1-konrad.dybcio@linaro.org
2023-05-24 21:47:16 -07:00
Jagadeesh Kona
f53153a379 clk: qcom: videocc-sm8550: Add video clock controller driver for SM8550
Add support for the video clock controller for video clients to be able
to request for videocc clocks on SM8550 platform.

Co-developed-by: Taniya Das <quic_tdas@quicinc.com>
Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
Signed-off-by: Jagadeesh Kona <quic_jkona@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230524145203.13153-4-quic_jkona@quicinc.com
2023-05-24 21:47:16 -07:00
Jagadeesh Kona
34d54e5833 clk: qcom: clk-alpha-pll: Add support to configure PLL_TEST_CTL_U2
The lucid ole pll reuses lucid evo ops but it has an additional test
control register which is required to be programmed, add support to
program the same.

Signed-off-by: Jagadeesh Kona <quic_jkona@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230524145203.13153-2-quic_jkona@quicinc.com
2023-05-24 21:47:16 -07:00
Taniya Das
441fe711be clk: qcom: videocc-sm8450: Add video clock controller driver for SM8450
Add support for the video clock controller driver for peripheral clock
clients to be able to request for video cc clocks.

Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230524140656.7076-3-quic_tdas@quicinc.com
2023-05-24 21:47:16 -07:00
Konrad Dybcio
fd0b5b106f clk: qcom: Introduce SM8350 VIDEOCC
Add support for the Video Clock Controller found on the SM8350 SoC.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230413-topic-lahaina_vidcc-v4-2-86c714a66a81@linaro.org
2023-05-24 21:47:16 -07:00
Mantas Pucka
56e5ae0116 clk: qcom: gcc-ipq6018: Use floor ops for sdcc clocks
SDCC clocks must be rounded down to avoid overclocking the controller.

Fixes: d9db07f088 ("clk: qcom: Add ipq6018 Global Clock Controller support")
Signed-off-by: Mantas Pucka <mantas@8devices.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/1682413909-24927-1-git-send-email-mantas@8devices.com
2023-05-24 19:39:24 -07:00
Konrad Dybcio
ffd853c2ea clk: qcom: smd-rpm: Make BI_TCXO_AO critical
We should never let go of the active-only XO vote, as otherwise the
RPM may decide that there are no online users and it can be shut down,
resulting in a total, uncontrolled system collapse.

Guarantee this through adding the CLK_IS_CRITICAL flag.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Tested-by: Matti Lehtimäki <matti.lehtimaki@gmail.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230501-topic-rpmcc_xo_a-v1-3-93f18e47b607@linaro.org
2023-05-24 19:35:27 -07:00
Konrad Dybcio
2dd117943f clk: qcom: smd-rpm: Make DEFINE_CLK_SMD_RPM_BRANCH_A accept flags
In preparation for supporting keepalive clocks which can never be shut off
(as the platform would fall apart otherwise), make the
DEFINE_CLK_SMD_RPM_BRANCH_A macro accept clock flags for the active-only
clock.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Tested-by: Matti Lehtimäki <matti.lehtimaki@gmail.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230501-topic-rpmcc_xo_a-v1-2-93f18e47b607@linaro.org
2023-05-24 19:35:27 -07:00
Konrad Dybcio
24abad6039 clk: qcom: smd-rpm_ Make __DEFINE_CLK_SMD_RPM_BRANCH_PREFIX accept flags
In preparation for supporting keepalive clocks which can never be shut off
(as the platform would fall apart otherwise), make the
__DEFINE_CLK_SMD_RPM_BRANCH_PREFIX macro accept clock flags for the
active-only clock.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Tested-by: Matti Lehtimäki <matti.lehtimaki@gmail.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230501-topic-rpmcc_xo_a-v1-1-93f18e47b607@linaro.org
2023-05-24 19:35:26 -07:00
Konrad Dybcio
caa2347d02 clk: qcom: smd-rpm: Keep one rpm handle for all clocks
For no apparent reason (as there's just one RPM per SoC), all clocks
currently store a copy of a pointer to smd_rpm. Introduce a single,
global one to save up on space in each clk definition.

bloat-o-meter reports:

Total: Before=41887, After=40843, chg -2.49%

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230501130400.107771-1-konrad.dybcio@linaro.org
2023-05-24 19:34:28 -07:00
Taniya Das
3e4d179532 clk: qcom: camcc-sc7180: Add parent dependency to all camera GDSCs
Camera titan top GDSC is a parent supply to all other camera GDSCs. Titan
top GDSC is required to be enabled before enabling any other camera GDSCs
and it should be disabled only after all other camera GDSCs are disabled.
Ensure this behavior by marking titan top GDSC as parent of all other
camera GDSCs.

Fixes: 15d09e830b ("clk: qcom: camcc: Add camera clock controller driver for SC7180")
Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230501142932.13049-1-quic_tdas@quicinc.com
2023-05-24 19:33:55 -07:00
Dmitry Baryshkov
853c064b57 clk: qcom: mmcc-msm8974: remove oxili_ocmemgx_clk
After the internal discussions, it looks like this clock is managed by
RPM itself. Linux kernel should not touch it on its own, as this causes
disagreement with RPM. Shutting down this clock causes the OCMEM<->GPU
interface to stop working, resulting in GPU hangchecks/timeouts.

Fixes: d8b212014e ("clk: qcom: Add support for MSM8974's multimedia clock controller (MMCC)")
Suggested-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Tested-by: Luca Weiss <luca@z3ntu.xyz>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230508153319.2371645-1-dmitry.baryshkov@linaro.org
2023-05-24 19:29:33 -07:00
Kathiravan T
a30e62bf6b clk: qcom: gcc: ipq5332: Use floor ops for SDCC clocks
SDCC clocks must be rounded down to avoid overclocking the controller.

Fixes: 3d89d52970 ("clk: qcom: add Global Clock controller (GCC) driver for IPQ5332 SoC")
Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230508163145.9678-1-quic_kathirav@quicinc.com
2023-05-24 19:29:09 -07:00
Devi Priya
50205122b0 clk: qcom: gcc-ipq9574: constify struct clk_init_data
Make the clk_init_data struct constant.

Signed-off-by: Devi Priya <quic_devipriy@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230425084010.15581-5-quic_devipriy@quicinc.com
2023-05-17 19:41:46 -07:00
Devi Priya
5439a5be03 clk: qcom: gcc-ipq9574: Clean up included headers
Some included headers aren't actually used anywhere, while other headers
with the declaration of functions and structures aren't directly included.

Get rid of the unused ones, and add the ones that should be included
directly.

Signed-off-by: Devi Priya <quic_devipriy@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230425084010.15581-4-quic_devipriy@quicinc.com
2023-05-17 19:41:46 -07:00
Linus Torvalds
d6b8a8c49a A couple more patches that would be good to get into -rc1.
- Revert an i.MX patch that's causing video failures because division
    math goes sideways
  - Fix a clang + W=1 build isue where FIELD_PREP() is taking a 32-bit
    variable instead of the usual u64 type
  - Fix a Kconfig bug in the StarFive JH7110 clk config that selects a
    reset controller when it can't be selected
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Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk fixes from Stephen Boyd:
 "A couple more patches that would be good to get into -rc1:

   - Revert an i.MX patch that's causing video failures because division
     math goes sideways

   - Fix a clang + W=1 build isue where FIELD_PREP() is taking a 32-bit
     variable instead of the usual u64 type

   - Fix a Kconfig bug in the StarFive JH7110 clk config that selects a
     reset controller when it can't be selected"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux:
  clk: starfive: Fix RESET_STARFIVE_JH7110 can't be selected in a specified case
  clk: sp7021: Adjust width of _m in HWM_FIELD_PREP()
  Revert "clk: imx: composite-8m: Add support to determine_rate"
2023-05-07 10:31:45 -07:00
Hal Feng
31c6ed4e89 clk: starfive: Fix RESET_STARFIVE_JH7110 can't be selected in a specified case
When (ARCH_STARFIVE [=n] && COMPILE_TEST [=y] && RESET_CONTROLLER [=n]),
RESET_STARFIVE_JH7110 can't be selected by CLK_STARFIVE_JH7110_SYS
and CLK_STARFIVE_JH7110_AON.

Add a condition `if RESET_CONTROLLER` to fix it. Also, delete redundant
selected options of CLK_STARFIVE_JH7110_AON because these options are
already selected by the dependency.

Fixes: edab7204af ("clk: starfive: Add StarFive JH7110 system clock driver")
Fixes: b2ab3c94f4 ("clk: starfive: Add StarFive JH7110 always-on clock driver")
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
Link: https://lore.kernel.org/r/20230418123756.62495-2-hal.feng@starfivetech.com
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2023-05-02 18:34:49 -07:00
Nathan Chancellor
5c667d5a5a clk: sp7021: Adjust width of _m in HWM_FIELD_PREP()
When building with clang + W=1, there is a warning around an internal
comparison check within the FIELD_PREP() macro, due to a 32-bit variable
comparison against ~0ull:

  drivers/clk/clk-sp7021.c:316:8: error: result of comparison of constant 18446744073709551615 with expression of type 'typeof (_Generic((_m), ...' (aka 'unsigned int') is always false [-Werror,-Wtautological-constant-out-of-range-compare]
          r0 |= HWM_FIELD_PREP(MASK_SEL_FRA, clk->p[SEL_FRA]);
                ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  drivers/clk/clk-sp7021.c:45:15: note: expanded from macro 'HWM_FIELD_PREP'
          (_m << 16) | FIELD_PREP(_m, value);     \
                       ^~~~~~~~~~~~~~~~~~~~~
  include/linux/bitfield.h:114:3: note: expanded from macro 'FIELD_PREP'
                  __BF_FIELD_CHECK(_mask, 0ULL, _val, "FIELD_PREP: ");    \
                  ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  include/linux/bitfield.h:71:53: note: expanded from macro '__BF_FIELD_CHECK'
                  BUILD_BUG_ON_MSG(__bf_cast_unsigned(_mask, _mask) >     \
                  ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~~
  note: (skipping 1 expansions in backtrace; use -fmacro-backtrace-limit=0 to see all)
  include/linux/compiler_types.h:397:22: note: expanded from macro 'compiletime_assert'
          _compiletime_assert(condition, msg, __compiletime_assert_, __COUNTER__)
          ~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  include/linux/compiler_types.h:385:23: note: expanded from macro '_compiletime_assert'
          __compiletime_assert(condition, msg, prefix, suffix)
          ~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  include/linux/compiler_types.h:377:9: note: expanded from macro '__compiletime_assert'
                  if (!(condition))                                       \
                        ^~~~~~~~~

This is expected given the types of the input. Increase the size of the
temporary variable in HWM_FIELD_PREP() to eliminate the warning, which
follows the logic of commit cfd6fb45cf ("crypto: ccree - avoid
out-of-range warnings from clang") for the same reasons.

Signed-off-by: Nathan Chancellor <nathan@kernel.org>
Link: https://lore.kernel.org/r/20230501-sp7021-field_prep-warning-v1-1-5b36d71feefe@kernel.org
Reported-by: kernel test robot <lkp@intel.com>
Link: https://lore.kernel.org/202303221947.pXP2v4xJ-lkp@intel.com/
Reviewed-by: Nick Desaulniers <ndesaulniers@google.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2023-05-02 18:34:26 -07:00
Adam Ford
690dccc4a0 Revert "clk: imx: composite-8m: Add support to determine_rate"
This reverts commit 156e96ff21.

This patch was found to cause some division issues on the i.MX8MP
which causes the video clocks to not properly divide when division
was greate than 8.  This causes video failures on disp1_pix and
disp2_pix clocks.

Until a better solution is found, we'll have to revert this.

Signed-off-by: Adam Ford <aford173@gmail.com>
Link: https://lore.kernel.org/r/20230423123828.1346511-1-aford173@gmail.com
Acked-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2023-05-02 18:22:48 -07:00
Linus Torvalds
e81507acdc Nothing looks out of the ordinary in this batch of clk driver updates. There
are a couple patches to the core clk framework, but they're all basically
 cleanups or debugging aids. The driver updates and new additions are dominated
 in the diffstat by Qualcomm and MediaTek drivers. Qualcomm gained a handful of
 new drivers for various SoCs, and MediaTek gained a bunch of drivers for
 MT8188. The MediaTek drivers are being modernized as well, so there are
 updates all over that vendor's clk drivers. There's also a couple other new clk
 drivers in here, for example the Starfive JH7110 SoC support is added.
 
 Outside of the two major SoC vendors though, we have the usual collection of
 non-critical fixes and cleanups to various clk drivers. It's good to see that
 we're getting more cleanups and modernization patches. Maybe one day we'll be
 able to properly split clk providers from clk consumers.
 
 Core:
  - Print an informational message before disabling unused clks
 
 New Drivers:
  - BCM63268 timer clock and reset controller
  - Frequency Hopping (FHCTL) on MediaTek MT6795, MT8173, MT8192 and
    MT8195 SoCs
  - Mediatek MT8188 SoC clk drivers
  - Clock driver for Sunplus SP7021 SoC
  - Clk driver support for Loongson-2 SoCs
  - Clock driver for Skyworks Si521xx I2C PCIe clock generators
  - Initial Starfive JH7110 clk/reset support
  - Global clock controller drivers for Qualcomm SM7150, IPQ9574, MSM8917 and IPQ5332 SoCs
  - GPU clock controller drivers for SM6115, SM6125, SM6375 and SA8775P SoCs
 
 Updates:
  - Shrink size of clk_fractional_divider a little
  - Convert various clk drivers to devm_of_clk_add_hw_provider()
  - Convert platform clk drivers to remove_new()
  - Converted most Mediatek clock drivers to struct platform_driver
  - MediaTek clock drivers can be built as modules
  - Reimplement Loongson-1 clk driver with DT support
  - Migrate socfpga clk driver to of_clk_add_hw_provider()
  - Support for i3c clks on Aspeed ast2600 SoCs
  - Add clock generic devm_clk_hw_register_gate_parent_data
  - Add audiomix block control for i.MX8MP
  - Add support for determine_rate to i.MX composite-8m
  - Let the LCDIF Pixel clock of i.MX8MM and i.MX8MN set parent rate
  - Provide clock name in error message for clk-gpr-mux on get parent failure
  - Drop duplicate imx_clk_mux_flags macro
  - Register the i.MX8MP Media Disp2 Pix clock as bus clock
  - Add Media LDB root clock to i.MX8MP
  - Make i.MX8MP nand_usdhc_bus clock as non-critical
  - Fix the rate table for i.MX fracn-gppll
  - Disable HW control for the fracn-gppll in order to be controlled by
    register write
  - Add support for interger PLL in fracn-gppll
  - Add mcore_booted module parameter to i.MX93 provider
  - Add NIC, A55 and ARM PLL clocks to i.MX93
  - Fix i.MX8ULP XBAR_DIVBUS and AD_SLOW clock parents
  - Use "divider closest" clock type for PLL4_PFD dividers on i.MX8ULP to
    get more accurate clock rates
  - Mark the MU0_Bi and TPM5 clocks on i.MX8ULP as critical
  - Update some of the i.MX critical clocks flags to allow glitchless
    on-the-fly rate change.
  - Add I2C5 clock on Renesas R-Car V3H
  - Exynos850: Add CMU_G3D clock controller for the Mali GPU
  - Extract Exynos5433 (ARM64) clock controller power management code to
    common driver parts
  - Exynos850: make PMU_ALIVE_PCLK clock critical
  - Add Audio, thermal, camera (CSI-2), Image Signal Processor/Channel
    Selector (ISPCS), and video capture (VIN) clocks on Renesas R-Car V4H
  - Add video capture (VIN) clocks on Renesas R-Car V3H
  - Add Cortex-A53 System CPU (Z2) clocks on Renesas R-Car V3M and V3H
  - Support for Stromer Plus PLL on Qualcomm IPQ5332
  - Add a missing reset to Qualcomm QCM2290
  - Migrate Qualcomm IPQ4019 to clk_parent_data
  - Make USB GDSCs enter retention state when disabled on Qualcomm SM6375,
    MSM8996 and MSM8998 SoCs
  - Set floor rounding clk_ops for Qualcomm QCM2290 SDCC2 clk
  - Add two EMAC GDSCs on Qualcomm SC8280XP
  - Use shared rcg clk ops in Qualcomm SM6115 GCC
  - Park Qualcomm SM8350 PCIe PIPE clks when disabled
  - Add GDSCs to Qualcomm SC7280 LPASS audio clock controller
  - Add missing XO clocks to Qualcomm MSM8226 and MSM8974
  - Convert some Qualcomm clk DT bindings to YAML
  - Reparenting fix for the clock supplying camera modules on Rockchip rk3399
  - Mark more critical (bus-)clocks on Rockchip rk3588
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Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
 "Nothing looks out of the ordinary in this batch of clk driver updates.

  There are a couple patches to the core clk framework, but they're all
  basically cleanups or debugging aids. The driver updates and new
  additions are dominated in the diffstat by Qualcomm and MediaTek
  drivers. Qualcomm gained a handful of new drivers for various SoCs,
  and MediaTek gained a bunch of drivers for MT8188. The MediaTek
  drivers are being modernized as well, so there are updates all over
  that vendor's clk drivers. There's also a couple other new clk drivers
  in here, for example the Starfive JH7110 SoC support is added.

  Outside of the two major SoC vendors though, we have the usual
  collection of non-critical fixes and cleanups to various clk drivers.
  It's good to see that we're getting more cleanups and modernization
  patches. Maybe one day we'll be able to properly split clk providers
  from clk consumers.

  Core:
   - Print an informational message before disabling unused clks

  New Drivers:
   - BCM63268 timer clock and reset controller
   - Frequency Hopping (FHCTL) on MediaTek MT6795, MT8173, MT8192 and
     MT8195 SoCs
   - Mediatek MT8188 SoC clk drivers
   - Clock driver for Sunplus SP7021 SoC
   - Clk driver support for Loongson-2 SoCs
   - Clock driver for Skyworks Si521xx I2C PCIe clock generators
   - Initial Starfive JH7110 clk/reset support
   - Global clock controller drivers for Qualcomm SM7150, IPQ9574,
     MSM8917 and IPQ5332 SoCs
   - GPU clock controller drivers for SM6115, SM6125, SM6375 and SA8775P
     SoCs

  Updates:
   - Shrink size of clk_fractional_divider a little
   - Convert various clk drivers to devm_of_clk_add_hw_provider()
   - Convert platform clk drivers to remove_new()
   - Converted most Mediatek clock drivers to struct platform_driver
   - MediaTek clock drivers can be built as modules
   - Reimplement Loongson-1 clk driver with DT support
   - Migrate socfpga clk driver to of_clk_add_hw_provider()
   - Support for i3c clks on Aspeed ast2600 SoCs
   - Add clock generic devm_clk_hw_register_gate_parent_data
   - Add audiomix block control for i.MX8MP
   - Add support for determine_rate to i.MX composite-8m
   - Let the LCDIF Pixel clock of i.MX8MM and i.MX8MN set parent rate
   - Provide clock name in error message for clk-gpr-mux on get parent
     failure
   - Drop duplicate imx_clk_mux_flags macro
   - Register the i.MX8MP Media Disp2 Pix clock as bus clock
   - Add Media LDB root clock to i.MX8MP
   - Make i.MX8MP nand_usdhc_bus clock as non-critical
   - Fix the rate table for i.MX fracn-gppll
   - Disable HW control for the fracn-gppll in order to be controlled by
     register write
   - Add support for interger PLL in fracn-gppll
   - Add mcore_booted module parameter to i.MX93 provider
   - Add NIC, A55 and ARM PLL clocks to i.MX93
   - Fix i.MX8ULP XBAR_DIVBUS and AD_SLOW clock parents
   - Use "divider closest" clock type for PLL4_PFD dividers on i.MX8ULP
     to get more accurate clock rates
   - Mark the MU0_Bi and TPM5 clocks on i.MX8ULP as critical
   - Update some of the i.MX critical clocks flags to allow glitchless
     on-the-fly rate change.
   - Add I2C5 clock on Renesas R-Car V3H
   - Exynos850: Add CMU_G3D clock controller for the Mali GPU
   - Extract Exynos5433 (ARM64) clock controller power management code
     to common driver parts
   - Exynos850: make PMU_ALIVE_PCLK clock critical
   - Add Audio, thermal, camera (CSI-2), Image Signal Processor/Channel
     Selector (ISPCS), and video capture (VIN) clocks on Renesas R-Car
     V4H
   - Add video capture (VIN) clocks on Renesas R-Car V3H
   - Add Cortex-A53 System CPU (Z2) clocks on Renesas R-Car V3M and V3H
   - Support for Stromer Plus PLL on Qualcomm IPQ5332
   - Add a missing reset to Qualcomm QCM2290
   - Migrate Qualcomm IPQ4019 to clk_parent_data
   - Make USB GDSCs enter retention state when disabled on Qualcomm
     SM6375, MSM8996 and MSM8998 SoCs
   - Set floor rounding clk_ops for Qualcomm QCM2290 SDCC2 clk
   - Add two EMAC GDSCs on Qualcomm SC8280XP
   - Use shared rcg clk ops in Qualcomm SM6115 GCC
   - Park Qualcomm SM8350 PCIe PIPE clks when disabled
   - Add GDSCs to Qualcomm SC7280 LPASS audio clock controller
   - Add missing XO clocks to Qualcomm MSM8226 and MSM8974
   - Convert some Qualcomm clk DT bindings to YAML
   - Reparenting fix for the clock supplying camera modules on Rockchip
     rk3399
   - Mark more critical (bus-)clocks on Rockchip rk3588"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (290 commits)
  clk: qcom: gcc-sc8280xp: Add EMAC GDSCs
  clk: starfive: Delete the redundant dev_set_drvdata() in JH7110 clock drivers
  clk: rockchip: rk3588: make gate linked clocks critical
  clk: qcom: dispcc-qcm2290: Remove inexistent DSI1PHY clk
  clk: qcom: add the GPUCC driver for sa8775p
  dt-bindings: clock: qcom: describe the GPUCC clock for SA8775P
  clk: qcom: gcc-sm8350: fix PCIe PIPE clocks handling
  clk: qcom: lpassaudiocc-sc7280: Add required gdsc power domain clks in lpass_cc_sc7280_desc
  clk: qcom: lpasscc-sc7280: Skip qdsp6ss clock registration
  dt-bindings: clock: qcom,sc7280-lpasscc: Add qcom,adsp-pil-mode property
  clk: starfive: Avoid casting iomem pointers
  clk: microchip: fix potential UAF in auxdev release callback
  clk: qcom: rpm: Use managed `of_clk_add_hw_provider()`
  clk: mediatek: fhctl: Mark local variables static
  clk: sifive: make SiFive clk drivers depend on ARCH_ symbols
  clk: uniphier: Use managed `of_clk_add_hw_provider()`
  clk: si5351: Use managed `of_clk_add_hw_provider()`
  clk: si570: Use managed `of_clk_add_hw_provider()`
  clk: si514: Use managed `of_clk_add_hw_provider()`
  clk: lmk04832: Use managed `of_clk_add_hw_provider()`
  ...
2023-04-29 17:29:39 -07:00
Linus Torvalds
b6a7828502 modules-6.4-rc1
The summary of the changes for this pull requests is:
 
  * Song Liu's new struct module_memory replacement
  * Nick Alcock's MODULE_LICENSE() removal for non-modules
  * My cleanups and enhancements to reduce the areas where we vmalloc
    module memory for duplicates, and the respective debug code which
    proves the remaining vmalloc pressure comes from userspace.
 
 Most of the changes have been in linux-next for quite some time except
 the minor fixes I made to check if a module was already loaded
 prior to allocating the final module memory with vmalloc and the
 respective debug code it introduces to help clarify the issue. Although
 the functional change is small it is rather safe as it can only *help*
 reduce vmalloc space for duplicates and is confirmed to fix a bootup
 issue with over 400 CPUs with KASAN enabled. I don't expect stable
 kernels to pick up that fix as the cleanups would have also had to have
 been picked up. Folks on larger CPU systems with modules will want to
 just upgrade if vmalloc space has been an issue on bootup.
 
 Given the size of this request, here's some more elaborate details
 on this pull request.
 
 The functional change change in this pull request is the very first
 patch from Song Liu which replaces the struct module_layout with a new
 struct module memory. The old data structure tried to put together all
 types of supported module memory types in one data structure, the new
 one abstracts the differences in memory types in a module to allow each
 one to provide their own set of details. This paves the way in the
 future so we can deal with them in a cleaner way. If you look at changes
 they also provide a nice cleanup of how we handle these different memory
 areas in a module. This change has been in linux-next since before the
 merge window opened for v6.3 so to provide more than a full kernel cycle
 of testing. It's a good thing as quite a bit of fixes have been found
 for it.
 
 Jason Baron then made dynamic debug a first class citizen module user by
 using module notifier callbacks to allocate / remove module specific
 dynamic debug information.
 
 Nick Alcock has done quite a bit of work cross-tree to remove module
 license tags from things which cannot possibly be module at my request
 so to:
 
   a) help him with his longer term tooling goals which require a
      deterministic evaluation if a piece a symbol code could ever be
      part of a module or not. But quite recently it is has been made
      clear that tooling is not the only one that would benefit.
      Disambiguating symbols also helps efforts such as live patching,
      kprobes and BPF, but for other reasons and R&D on this area
      is active with no clear solution in sight.
 
   b) help us inch closer to the now generally accepted long term goal
      of automating all the MODULE_LICENSE() tags from SPDX license tags
 
 In so far as a) is concerned, although module license tags are a no-op
 for non-modules, tools which would want create a mapping of possible
 modules can only rely on the module license tag after the commit
 8b41fc4454 ("kbuild: create modules.builtin without Makefile.modbuiltin
 or tristate.conf").  Nick has been working on this *for years* and
 AFAICT I was the only one to suggest two alternatives to this approach
 for tooling. The complexity in one of my suggested approaches lies in
 that we'd need a possible-obj-m and a could-be-module which would check
 if the object being built is part of any kconfig build which could ever
 lead to it being part of a module, and if so define a new define
 -DPOSSIBLE_MODULE [0]. A more obvious yet theoretical approach I've
 suggested would be to have a tristate in kconfig imply the same new
 -DPOSSIBLE_MODULE as well but that means getting kconfig symbol names
 mapping to modules always, and I don't think that's the case today. I am
 not aware of Nick or anyone exploring either of these options. Quite
 recently Josh Poimboeuf has pointed out that live patching, kprobes and
 BPF would benefit from resolving some part of the disambiguation as
 well but for other reasons. The function granularity KASLR (fgkaslr)
 patches were mentioned but Joe Lawrence has clarified this effort has
 been dropped with no clear solution in sight [1].
 
 In the meantime removing module license tags from code which could never
 be modules is welcomed for both objectives mentioned above. Some
 developers have also welcomed these changes as it has helped clarify
 when a module was never possible and they forgot to clean this up,
 and so you'll see quite a bit of Nick's patches in other pull
 requests for this merge window. I just picked up the stragglers after
 rc3. LWN has good coverage on the motivation behind this work [2] and
 the typical cross-tree issues he ran into along the way. The only
 concrete blocker issue he ran into was that we should not remove the
 MODULE_LICENSE() tags from files which have no SPDX tags yet, even if
 they can never be modules. Nick ended up giving up on his efforts due
 to having to do this vetting and backlash he ran into from folks who
 really did *not understand* the core of the issue nor were providing
 any alternative / guidance. I've gone through his changes and dropped
 the patches which dropped the module license tags where an SPDX
 license tag was missing, it only consisted of 11 drivers.  To see
 if a pull request deals with a file which lacks SPDX tags you
 can just use:
 
   ./scripts/spdxcheck.py -f \
 	$(git diff --name-only commid-id | xargs echo)
 
 You'll see a core module file in this pull request for the above,
 but that's not related to his changes. WE just need to add the SPDX
 license tag for the kernel/module/kmod.c file in the future but
 it demonstrates the effectiveness of the script.
 
 Most of Nick's changes were spread out through different trees,
 and I just picked up the slack after rc3 for the last kernel was out.
 Those changes have been in linux-next for over two weeks.
 
 The cleanups, debug code I added and final fix I added for modules
 were motivated by David Hildenbrand's report of boot failing on
 a systems with over 400 CPUs when KASAN was enabled due to running
 out of virtual memory space. Although the functional change only
 consists of 3 lines in the patch "module: avoid allocation if module is
 already present and ready", proving that this was the best we can
 do on the modules side took quite a bit of effort and new debug code.
 
 The initial cleanups I did on the modules side of things has been
 in linux-next since around rc3 of the last kernel, the actual final
 fix for and debug code however have only been in linux-next for about a
 week or so but I think it is worth getting that code in for this merge
 window as it does help fix / prove / evaluate the issues reported
 with larger number of CPUs. Userspace is not yet fixed as it is taking
 a bit of time for folks to understand the crux of the issue and find a
 proper resolution. Worst come to worst, I have a kludge-of-concept [3]
 of how to make kernel_read*() calls for modules unique / converge them,
 but I'm currently inclined to just see if userspace can fix this
 instead.
 
 [0] https://lore.kernel.org/all/Y/kXDqW+7d71C4wz@bombadil.infradead.org/
 [1] https://lkml.kernel.org/r/025f2151-ce7c-5630-9b90-98742c97ac65@redhat.com
 [2] https://lwn.net/Articles/927569/
 [3] https://lkml.kernel.org/r/20230414052840.1994456-3-mcgrof@kernel.org
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Merge tag 'modules-6.4-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/mcgrof/linux

Pull module updates from Luis Chamberlain:
 "The summary of the changes for this pull requests is:

   - Song Liu's new struct module_memory replacement

   - Nick Alcock's MODULE_LICENSE() removal for non-modules

   - My cleanups and enhancements to reduce the areas where we vmalloc
     module memory for duplicates, and the respective debug code which
     proves the remaining vmalloc pressure comes from userspace.

  Most of the changes have been in linux-next for quite some time except
  the minor fixes I made to check if a module was already loaded prior
  to allocating the final module memory with vmalloc and the respective
  debug code it introduces to help clarify the issue. Although the
  functional change is small it is rather safe as it can only *help*
  reduce vmalloc space for duplicates and is confirmed to fix a bootup
  issue with over 400 CPUs with KASAN enabled. I don't expect stable
  kernels to pick up that fix as the cleanups would have also had to
  have been picked up. Folks on larger CPU systems with modules will
  want to just upgrade if vmalloc space has been an issue on bootup.

  Given the size of this request, here's some more elaborate details:

  The functional change change in this pull request is the very first
  patch from Song Liu which replaces the 'struct module_layout' with a
  new 'struct module_memory'. The old data structure tried to put
  together all types of supported module memory types in one data
  structure, the new one abstracts the differences in memory types in a
  module to allow each one to provide their own set of details. This
  paves the way in the future so we can deal with them in a cleaner way.
  If you look at changes they also provide a nice cleanup of how we
  handle these different memory areas in a module. This change has been
  in linux-next since before the merge window opened for v6.3 so to
  provide more than a full kernel cycle of testing. It's a good thing as
  quite a bit of fixes have been found for it.

  Jason Baron then made dynamic debug a first class citizen module user
  by using module notifier callbacks to allocate / remove module
  specific dynamic debug information.

  Nick Alcock has done quite a bit of work cross-tree to remove module
  license tags from things which cannot possibly be module at my request
  so to:

   a) help him with his longer term tooling goals which require a
      deterministic evaluation if a piece a symbol code could ever be
      part of a module or not. But quite recently it is has been made
      clear that tooling is not the only one that would benefit.
      Disambiguating symbols also helps efforts such as live patching,
      kprobes and BPF, but for other reasons and R&D on this area is
      active with no clear solution in sight.

   b) help us inch closer to the now generally accepted long term goal
      of automating all the MODULE_LICENSE() tags from SPDX license tags

  In so far as a) is concerned, although module license tags are a no-op
  for non-modules, tools which would want create a mapping of possible
  modules can only rely on the module license tag after the commit
  8b41fc4454 ("kbuild: create modules.builtin without
  Makefile.modbuiltin or tristate.conf").

  Nick has been working on this *for years* and AFAICT I was the only
  one to suggest two alternatives to this approach for tooling. The
  complexity in one of my suggested approaches lies in that we'd need a
  possible-obj-m and a could-be-module which would check if the object
  being built is part of any kconfig build which could ever lead to it
  being part of a module, and if so define a new define
  -DPOSSIBLE_MODULE [0].

  A more obvious yet theoretical approach I've suggested would be to
  have a tristate in kconfig imply the same new -DPOSSIBLE_MODULE as
  well but that means getting kconfig symbol names mapping to modules
  always, and I don't think that's the case today. I am not aware of
  Nick or anyone exploring either of these options. Quite recently Josh
  Poimboeuf has pointed out that live patching, kprobes and BPF would
  benefit from resolving some part of the disambiguation as well but for
  other reasons. The function granularity KASLR (fgkaslr) patches were
  mentioned but Joe Lawrence has clarified this effort has been dropped
  with no clear solution in sight [1].

  In the meantime removing module license tags from code which could
  never be modules is welcomed for both objectives mentioned above. Some
  developers have also welcomed these changes as it has helped clarify
  when a module was never possible and they forgot to clean this up, and
  so you'll see quite a bit of Nick's patches in other pull requests for
  this merge window. I just picked up the stragglers after rc3. LWN has
  good coverage on the motivation behind this work [2] and the typical
  cross-tree issues he ran into along the way. The only concrete blocker
  issue he ran into was that we should not remove the MODULE_LICENSE()
  tags from files which have no SPDX tags yet, even if they can never be
  modules. Nick ended up giving up on his efforts due to having to do
  this vetting and backlash he ran into from folks who really did *not
  understand* the core of the issue nor were providing any alternative /
  guidance. I've gone through his changes and dropped the patches which
  dropped the module license tags where an SPDX license tag was missing,
  it only consisted of 11 drivers. To see if a pull request deals with a
  file which lacks SPDX tags you can just use:

    ./scripts/spdxcheck.py -f \
	$(git diff --name-only commid-id | xargs echo)

  You'll see a core module file in this pull request for the above, but
  that's not related to his changes. WE just need to add the SPDX
  license tag for the kernel/module/kmod.c file in the future but it
  demonstrates the effectiveness of the script.

  Most of Nick's changes were spread out through different trees, and I
  just picked up the slack after rc3 for the last kernel was out. Those
  changes have been in linux-next for over two weeks.

  The cleanups, debug code I added and final fix I added for modules
  were motivated by David Hildenbrand's report of boot failing on a
  systems with over 400 CPUs when KASAN was enabled due to running out
  of virtual memory space. Although the functional change only consists
  of 3 lines in the patch "module: avoid allocation if module is already
  present and ready", proving that this was the best we can do on the
  modules side took quite a bit of effort and new debug code.

  The initial cleanups I did on the modules side of things has been in
  linux-next since around rc3 of the last kernel, the actual final fix
  for and debug code however have only been in linux-next for about a
  week or so but I think it is worth getting that code in for this merge
  window as it does help fix / prove / evaluate the issues reported with
  larger number of CPUs. Userspace is not yet fixed as it is taking a
  bit of time for folks to understand the crux of the issue and find a
  proper resolution. Worst come to worst, I have a kludge-of-concept [3]
  of how to make kernel_read*() calls for modules unique / converge
  them, but I'm currently inclined to just see if userspace can fix this
  instead"

Link: https://lore.kernel.org/all/Y/kXDqW+7d71C4wz@bombadil.infradead.org/ [0]
Link: https://lkml.kernel.org/r/025f2151-ce7c-5630-9b90-98742c97ac65@redhat.com [1]
Link: https://lwn.net/Articles/927569/ [2]
Link: https://lkml.kernel.org/r/20230414052840.1994456-3-mcgrof@kernel.org [3]

* tag 'modules-6.4-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/mcgrof/linux: (121 commits)
  module: add debugging auto-load duplicate module support
  module: stats: fix invalid_mod_bytes typo
  module: remove use of uninitialized variable len
  module: fix building stats for 32-bit targets
  module: stats: include uapi/linux/module.h
  module: avoid allocation if module is already present and ready
  module: add debug stats to help identify memory pressure
  module: extract patient module check into helper
  modules/kmod: replace implementation with a semaphore
  Change DEFINE_SEMAPHORE() to take a number argument
  module: fix kmemleak annotations for non init ELF sections
  module: Ignore L0 and rename is_arm_mapping_symbol()
  module: Move is_arm_mapping_symbol() to module_symbol.h
  module: Sync code of is_arm_mapping_symbol()
  scripts/gdb: use mem instead of core_layout to get the module address
  interconnect: remove module-related code
  interconnect: remove MODULE_LICENSE in non-modules
  zswap: remove MODULE_LICENSE in non-modules
  zpool: remove MODULE_LICENSE in non-modules
  x86/mm/dump_pagetables: remove MODULE_LICENSE in non-modules
  ...
2023-04-27 16:36:55 -07:00
Stephen Boyd
a9863979fb Merge branch 'clk-imx' into clk-next
* clk-imx: (25 commits)
  clk: imx: imx8ulp: update clk flag for system critical clock
  clk: imx: imx8ulp: Add tpm5 clock as critical gate clock
  clk: imx: imx8ulp: keep MU0_B clock enabled always
  clk: imx: imx8ulp: Add divider closest support to get more accurate clock rate
  clk: imx: imx8ulp: Fix XBAR_DIVBUS and AD_SLOW clock parents
  clk: imx: imx93: Add nic and A55 clk
  dt-bindings: clock: imx93: add NIC, A55 and ARM PLL CLK
  clk: imx: imx93: add mcore_booted module paratemter
  clk: imx: fracn-gppll: Add 300MHz freq support for imx9
  clk: imx: fracn-gppll: support integer pll
  clk: imx: fracn-gppll: disable hardware select control
  clk: imx: fracn-gppll: fix the rate table
  clk: imx: imx8mp: change the 'nand_usdhc_bus' clock to non-critical
  clk: imx: imx8mp: Add LDB root clock
  dt-bindings: clock: imx8mp: Add LDB clock entry
  clk: imx: imx8mp: correct DISP2 pixel clock type
  clk: imx: drop duplicated macro
  clk: imx: clk-gpr-mux: Provide clock name in error message
  clk: imx: Let IMX8MN_CLK_DISP_PIXEL set parent rate
  clk: imx8mm: Let IMX8MM_CLK_LCDIF_PIXEL set parent rate
  ...
2023-04-25 11:52:39 -07:00
Stephen Boyd
c19c6c7b44 Merge branches 'clk-of', 'clk-samsung', 'clk-rockchip' and 'clk-qcom' into clk-next
* clk-of:
  clk: add missing of_node_put() in "assigned-clocks" property parsing

* clk-samsung:
  clk: samsung: exynos850: Make PMU_ALIVE_PCLK critical
  clk: samsung: Convert to platform remove callback returning void
  clk: samsung: exynos5433: Extract PM support to common ARM64 layer
  clk: samsung: Extract parent clock enabling to common function
  clk: samsung: Extract clocks registration to common function
  clk: samsung: exynos850: Add AUD and HSI main gate clocks
  clk: samsung: exynos850: Implement CMU_G3D domain
  clk: samsung: clk-pll: Implement pll0818x PLL type
  clk: samsung: Set dev in samsung_clk_init()
  clk: samsung: Don't pass reg_base to samsung_clk_register_pll()
  clk: samsung: Remove np argument from samsung_clk_init()
  dt-bindings: clock: exynos850: Add AUD and HSI main gate clocks
  dt-bindings: clock: exynos850: Add Exynos850 CMU_G3D

* clk-rockchip:
  clk: rockchip: rk3588: make gate linked clocks critical
  clk: rockchip: rk3399: allow clk_cifout to force clk_cifout_src to reparent

* clk-qcom: (57 commits)
  clk: qcom: gcc-sc8280xp: Add EMAC GDSCs
  clk: qcom: dispcc-qcm2290: Remove inexistent DSI1PHY clk
  clk: qcom: add the GPUCC driver for sa8775p
  dt-bindings: clock: qcom: describe the GPUCC clock for SA8775P
  clk: qcom: gcc-sm8350: fix PCIe PIPE clocks handling
  clk: qcom: lpassaudiocc-sc7280: Add required gdsc power domain clks in lpass_cc_sc7280_desc
  clk: qcom: lpasscc-sc7280: Skip qdsp6ss clock registration
  dt-bindings: clock: qcom,sc7280-lpasscc: Add qcom,adsp-pil-mode property
  clk: qcom: rpm: Use managed `of_clk_add_hw_provider()`
  clk: qcom: Add Global Clock Controller driver for IPQ9574
  dt-bindings: clock: Add ipq9574 clock and reset definitions
  clk: qcom: gpucc-sm6375: Configure CX_GDSC disable wait value
  clk: qcom: gcc-sm6115: Mark RCGs shared where applicable
  clk: qcom: dispcc-qcm2290: Add MDSS_CORE reset
  dt-bindings: clock: dispcc-qcm2290: Add MDSS_CORE reset
  clk: qcom: apss-ipq-pll: add support for IPQ5332
  dt-bindings: clock: qcom,a53pll: add IPQ5332 compatible
  clk: qcom: apss-ipq-pll: refactor the driver to accommodate different PLL types
  dt-bindings: mailbox: qcom,apcs-kpss-global: fix SDX55 'if' match
  dt-bindings: mailbox: qcom,apcs-kpss-global: correct SDX55 clocks
  ...
2023-04-25 11:52:25 -07:00
Stephen Boyd
1a86e99fa0 Merge branches 'clk-starfive', 'clk-fractional' and 'clk-devmof' into clk-next
- Shrink size of clk_fractional_divider a little
 - Convert various clk drivers to devm_of_clk_add_hw_provider()

* clk-starfive:
  clk: starfive: Delete the redundant dev_set_drvdata() in JH7110 clock drivers
  clk: starfive: Avoid casting iomem pointers
  MAINTAINERS: generalise StarFive clk/reset entries
  reset: starfive: Add StarFive JH7110 reset driver
  clk: starfive: Add StarFive JH7110 always-on clock driver
  clk: starfive: Add StarFive JH7110 system clock driver
  reset: starfive: jh71x0: Use 32bit I/O on 32bit registers
  reset: starfive: Rename "jh7100" to "jh71x0" for the common code
  reset: starfive: Extract the common JH71X0 reset code
  reset: starfive: Factor out common JH71X0 reset code
  reset: Create subdirectory for StarFive drivers
  reset: starfive: Replace SOC_STARFIVE with ARCH_STARFIVE
  clk: starfive: Rename "jh7100" to "jh71x0" for the common code
  clk: starfive: Rename clk-starfive-jh7100.h to clk-starfive-jh71x0.h
  clk: starfive: Factor out common JH7100 and JH7110 code
  clk: starfive: Replace SOC_STARFIVE with ARCH_STARFIVE
  dt-bindings: clock: Add StarFive JH7110 always-on clock and reset generator
  dt-bindings: clock: Add StarFive JH7110 system clock and reset generator

* clk-fractional:
  clk: Remove mmask and nmask fields in struct clk_fractional_divider
  clk: rockchip: Remove values for mmask and nmask in struct clk_fractional_divider
  clk: imx: Remove values for mmask and nmask in struct clk_fractional_divider
  clk: Compute masks for fractional_divider clk when needed.

* clk-devmof:
  clk: uniphier: Use managed `of_clk_add_hw_provider()`
  clk: si5351: Use managed `of_clk_add_hw_provider()`
  clk: si570: Use managed `of_clk_add_hw_provider()`
  clk: si514: Use managed `of_clk_add_hw_provider()`
  clk: lmk04832: Use managed `of_clk_add_hw_provider()`
  clk: hsdk-pll: Use managed `of_clk_add_hw_provider()`
  clk: cdce706: Use managed `of_clk_add_hw_provider()`
  clk: axs10x: Use managed `of_clk_add_hw_provider()`
  clk: axm5516: Use managed `of_clk_add_hw_provider()`
  clk: axi-clkgen: Use managed `of_clk_add_hw_provider()`
2023-04-25 11:50:49 -07:00
Stephen Boyd
caca6ad367 Merge branches 'clk-xilinx', 'clk-broadcom' and 'clk-platform' into clk-next
- BCM63268 timer clock and reset controller
 - Convert platform clk drivers to remove_new

* clk-xilinx:
  clocking-wizard: Support higher frequency accuracy
  clk: zynqmp: pll: Remove the limit

* clk-broadcom:
  clk: bcm: Add BCM63268 timer clock and reset driver
  dt-bindings: clock: Add BCM63268 timer binding
  dt-bindings: reset: add BCM63268 timer reset definitions
  dt-bindings: clk: add BCM63268 timer clock definitions

* clk-platform: (25 commits)
  clk: xilinx: Convert to platform remove callback returning void
  clk: x86: Convert to platform remove callback returning void
  clk: uniphier: Convert to platform remove callback returning void
  clk: ti: Convert to platform remove callback returning void
  clk: tegra: Convert to platform remove callback returning void
  clk: stm32: Convert to platform remove callback returning void
  clk: mvebu: Convert to platform remove callback returning void
  clk: mmp: Convert to platform remove callback returning void
  clk: keystone: Convert to platform remove callback returning void
  clk: hisilicon: Convert to platform remove callback returning void
  clk: stm32mp1: Convert to platform remove callback returning void
  clk: scpi: Convert to platform remove callback returning void
  clk: s2mps11: Convert to platform remove callback returning void
  clk: pwm: Convert to platform remove callback returning void
  clk: palmas: Convert to platform remove callback returning void
  clk: hsdk-pll: Convert to platform remove callback returning void
  clk: fixed-rate: Convert to platform remove callback returning void
  clk: fixed-mmio: Convert to platform remove callback returning void
  clk: fixed-factor: Convert to platform remove callback returning void
  clk: axm5516: Convert to platform remove callback returning void
  ...
2023-04-25 11:50:36 -07:00
Stephen Boyd
6f7478e3bb Merge branches 'clk-mediatek', 'clk-sunplus', 'clk-loongson' and 'clk-socfpga' into clk-next
- Frequency Hopping (FHCTL) on MediaTek MT6795, MT8173, MT8192 and
   MT8195 SoCs
 - Converted most Mediatek clock drivers to struct platform_driver
 - MediaTek clock drivers can be built as modules
 - Mediatek MT8188 SoC clk drivers
 - Clock driver for Sunplus SP7021 SoC
 - Reimplement Loongson-1 clk driver with DT support
 - Clk driver support for Loongson-2 SoCs
 - Migrate socfpga clk driver to of_clk_add_hw_provider()

* clk-mediatek: (84 commits)
  clk: mediatek: fhctl: Mark local variables static
  clk: mediatek: Use right match table, include mod_devicetable
  clk: mediatek: Add MT8188 adsp clock support
  clk: mediatek: Add MT8188 imp i2c wrapper clock support
  clk: mediatek: Add MT8188 wpesys clock support
  clk: mediatek: Add MT8188 vppsys1 clock support
  clk: mediatek: Add MT8188 vppsys0 clock support
  clk: mediatek: Add MT8188 vencsys clock support
  clk: mediatek: Add MT8188 vdosys1 clock support
  clk: mediatek: Add MT8188 vdosys0 clock support
  clk: mediatek: Add MT8188 vdecsys clock support
  clk: mediatek: Add MT8188 mfgcfg clock support
  clk: mediatek: Add MT8188 ipesys clock support
  clk: mediatek: Add MT8188 imgsys clock support
  clk: mediatek: Add MT8188 ccusys clock support
  clk: mediatek: Add MT8188 camsys clock support
  clk: mediatek: Add MT8188 infrastructure clock support
  clk: mediatek: Add MT8188 peripheral clock support
  clk: mediatek: Add MT8188 topckgen clock support
  clk: mediatek: Add MT8188 apmixedsys clock support
  ...

* clk-sunplus:
  clk: Add Sunplus SP7021 clock driver

* clk-loongson:
  clk: clk-loongson2: add clock controller driver support
  dt-bindings: clock: add loongson-2 boot clock index
  MAINTAINERS: remove obsolete file entry in MIPS/LOONGSON1 ARCHITECTURE
  MIPS: loongson32: Update the clock initialization
  clk: loongson1: Re-implement the clock driver
  clk: loongson1: Remove the outdated driver
  dt-bindings: clock: Add Loongson-1 clock

* clk-socfpga:
  clk: socfpga: arria10: use of_clk_add_hw_provider and improve error handling
  clk: socfpga: use of_clk_add_hw_provider and improve error handling
  clk: socfpga: arria10: use of_clk_add_hw_provider and improve error handling
  clk: socfpga: use of_clk_add_hw_provider and improve error handling
  clk: socfpga: arria10: use of_clk_add_hw_provider and improve error handling
  clk: socfpga: use of_clk_add_hw_provider and improve error handling
2023-04-25 11:50:08 -07:00
Stephen Boyd
4ec6a2f957 Merge branches 'clk-cleanup', 'clk-aspeed', 'clk-dt', 'clk-renesas' and 'clk-skyworks' into clk-next
- Support for i3c clks on Aspeed ast2600 SoCs
 - Clock driver for Skyworks Si521xx I2C PCIe clock generators

* clk-cleanup:
  clk: microchip: fix potential UAF in auxdev release callback
  clk: sifive: make SiFive clk drivers depend on ARCH_ symbols
  clk: stm32h7: Remove an unused field in struct stm32_fractional_divider
  clk: tegra20: fix gcc-7 constant overflow warning
  clock: milbeaut: use devm_platform_get_and_ioremap_resource()
  clk: Print an info line before disabling unused clocks
  clk: ti: Use of_address_to_resource()
  clk: remove unnecessary (void*) conversions
  clk: at91: clk-sam9x60-pll: fix return value check
  clk: visconti: remove unused visconti_pll_provider::regmap

* clk-aspeed:
  dt-bindings: clock: ast2600: Expand comment on reset definitions
  clk: ast2600: Add comment about combined clock + reset handling
  dt-bindings: clock: ast2600: remove IC36 & I3C7 clock definitions
  clk: ast2600: Add full configs for I3C clocks
  dt-bindings: clock: ast2600: Add top-level I3C clock
  clk: ast2600: allow empty entries in aspeed_g6_gates

* clk-dt:
  clk: mediatek: clk-pllfh: fix missing of_node_put() in fhctl_parse_dt()
  clk: Use of_property_present() for testing DT property presence

* clk-renesas:
  clk: renesas: r8a77980: Add I2C5 clock
  clk: rs9: Add support for 9FGV0441
  clk: rs9: Support device specific dif bit calculation
  dt-bindings: clk: rs9: Add 9FGV0441
  clk: rs9: Check for vendor/device ID
  clk: renesas: Convert to platform remove callback returning void
  clk: renesas: r9a06g032: Improve clock tables
  clk: renesas: r9a06g032: Document structs
  clk: renesas: r9a06g032: Drop unused fields
  clk: renesas: r9a06g032: Improve readability
  clk: renesas: r8a77980: Add Z2 clock
  clk: renesas: r8a77970: Add Z2 clock
  clk: renesas: r8a77995: Fix VIN parent clock
  clk: renesas: r8a77980: Add VIN clocks
  clk: renesas: r8a779g0: Add VIN clocks
  clk: renesas: r8a779g0: Add ISPCS clocks
  clk: renesas: r8a779g0: Add CSI-2 clocks
  clk: renesas: r8a779g0: Add thermal clock
  clk: renesas: r8a779g0: Add Audio clocks
  clk: renesas: cpg-mssr: Update MSSR register range for R-Car V4H

* clk-skyworks:
  clk: si521xx: Clock driver for Skyworks Si521xx I2C PCIe clock generators
  dt-bindings: clk: si521xx: Add Skyworks Si521xx I2C PCIe clock generators
2023-04-25 11:49:50 -07:00
Andrew Halaney
32c2f2a46d clk: qcom: gcc-sc8280xp: Add EMAC GDSCs
Add the EMAC GDSCs to allow the EMAC hardware to be enabled.

Acked-by: Stephen Boyd <sboyd@kernel.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Tested-by: Brian Masney <bmasney@redhat.com>
Signed-off-by: Andrew Halaney <ahalaney@redhat.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230413191541.1073027-2-ahalaney@redhat.com
2023-04-24 07:22:01 -07:00