Commit Graph

6 Commits

Author SHA1 Message Date
Colin Ian King
004123f3df iio: adc: stm32: make array stm32h7_adc_ckmodes_spec static
The array stm32h7_adc_ckmodes_spec does not need to be in global scope, so
make it static.

Cleans up sparse warning:
"symbol 'stm32h7_adc_ckmodes_spec' was not declared. Should it be static?"

Signed-off-by: Colin Ian King <colin.king@canonical.com>
Acked-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2017-07-02 10:24:52 +01:00
Fabrice Gasnier
95e339b6e8 iio: adc: stm32: add support for STM32H7
Add support for STM32H7 Analog to Digital Converter. It has up
to 20 external channels, resolution ranges from 8 to 16bits.
Either bus or asynchronous adc clock may be used.

Add registers & bitfields definition. Also add new configuration
options to enter/exit powerdown and perform self-calibration.

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2017-06-11 15:07:29 +01:00
Fabrice Gasnier
64ad7f6438 iio: adc: stm32: introduce compatible data cfg
Prepare support for stm32h7 adc variant by introducing compatible
configuration data.
Move STM32F4 specific stuff to compatible data structure:
- registers & bit fields
- input channels data
- start/stop procedures
- trigger definitions

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2017-06-11 15:07:25 +01:00
Fabrice Gasnier
9fd243c4fb iio: adc: stm32: make core adc clock optional by default
Analog clock input is mandatory on stm32f4. But newer version of
ADC hardware block allow to select either bus clock or asynchronous
clock, for analog circuitry.

So, make it optional by default, but enforce clk presence on stm32f4.

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2017-06-11 15:07:24 +01:00
Fabrice Gasnier
2763ea0585 iio: adc: stm32: add optional dma support
Add DMA optional support to STM32 ADC, as there is a limited number DMA
channels (request lines) that can be assigned to ADC. This way, driver
may fall back using interrupts when all DMA channels are in use for
other IPs.
Use dma cyclic mode with two periods. Allow to tune period length by
using watermark. Coherent memory is used for dma (max buffer size is
fixed to PAGE_SIZE).

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2017-01-29 12:49:17 +00:00
Fabrice Gasnier
1add698802 iio: adc: Add support for STM32 ADC core
Add core driver for STMicroelectronics STM32 ADC (Analog to Digital
Converter). STM32 ADC can be composed of up to 3 ADCs with shared
resources like clock prescaler, common interrupt line and analog
reference voltage.
This core driver basically manages shared resources.

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2016-11-19 12:17:45 +00:00