Commit Graph

50485 Commits

Author SHA1 Message Date
Fabio Estevam
6db5337388 ARM: imx_v6_v7_defconfig: Select CONFIG_IMX7D_ADC
Select CONFIG_IMX7D_ADC so that the i.MX7 ADC driver can be
built by default.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-06-18 07:32:01 +08:00
Christopher Spinrath
d8710c3fb9 ARM: dts: imx6q-cm-fx6: add sdio wifi/bt nodes
The cm-fx6 module has an on-board AW-NH387 WiFi/BT module which is
based on Marvell's SD8787 chip and is connected to the usdhc1
controller.

Unfortunately, the chip gets unresponsive if the Bluetooth AMP
(Alternate Mac/Phy) function gets probed but the loaded firmware
doesn't support it. For instance, this is the case for the most
recent firmware in linux-firmware (Version 14.66.35.p52).

Thus, just add the required nodes but leave the usdhc1 node disabled
explicitly. Users who disabled the Bluetooth (AMP) support of their
OS can then conveniently enable WiFi (or even plain Bluetooth) support
with a simple device tree overlay/bootloader configuration.

Signed-off-by: Christopher Spinrath <christopher.spinrath@rwth-aachen.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-06-17 21:17:04 +08:00
Peter Korsgaard
4fcee14d38 ARM: dts: kirkwood: Fix Openblock A6 nand partition overlap
The "test" and "conf" nand partitions partly overlap:

Creating 6 MTD partitions on "orion_nand":
0x000000000000-0x000000090000 : "uboot"
0x000000090000-0x0000000d4000 : "env"
0x0000000d4000-0x0000000f8000 : "test"
0x0000000f4000-0x0000004f4000 : "conf"

That is unlikely to be desired, and not matching the partition map used in
u-boot - So adjust the test partition size to fix this.

Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2017-06-17 09:08:47 +02:00
Javier Martinez Canillas
97800cf8b6 ARM: dts: turris-omnia: Add generic compatible string for I2C EEPROM
The at24 driver allows to register I2C EEPROM chips using different vendor
and devices, but the I2C subsystem does not take the vendor into account
when matching using the I2C table since it only has device entries.

But when matching using an OF table, both the vendor and device has to be
taken into account so the driver defines only a set of compatible strings
using the "atmel" vendor as a generic fallback for compatible I2C devices.

So add this generic fallback to the device node compatible string to make
the device to match the driver using the OF device ID table.

Signed-off-by: Javier Martinez Canillas <javier@dowhile0.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2017-06-17 08:16:46 +02:00
Ralph Sennhauser
41c8652096 ARM: dts: mvebu: add support for Linksys WRT3200ACM (Rango)
The Linksys WRT3200ACM (Rango) is the lates Armada-385 based router in
the Linksys WRT AC Series which got released in October 2016.

Key differences to the earlier Armada-385 based devices in the series is
a bigger flash chip, next generation wireless modules (Marvell 88W8964)
in the mini pcie slots as well as a Marvell SD8887. Finally the CPU is
clocked at 1866 GHz by default.

The file armada-385-linksys-rango.dts is loosly based off of a DTS
authored by Imre Kaloz.

As Rango is part of the armada-385-linksys family of boards use the
armada-385-linksys.dtsi as basis. As for functional differences to Imre
Kaloz dts, the wlan LEDs aren't connected to the expander chip pca9635
but directly to GPIOs. Then mpp47 controls the USB2.0 port and not the
USB3.0 port, so use the correct GPIO mpp44 for it. Finally use
non-removable instead of broken-cd with the sdhci node to avoid polling.

Other changes can be categorized as just cleanup / reorganization due to
using the armada-385-linksys.dtsi.

URL: 0abc3fa5a9/target/linux/mvebu/files/arch/arm/boot/dts/armada-385-linksys-rango.dts
Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2017-06-17 08:16:46 +02:00
Ralph Sennhauser
b2758f8edb ARM: dts: armada-385-linksys: fixup button node names
Buttons don't have a reg property; drop pseudo address and fixup names
of individual button nodes. Also drop #address-cells and #size-cells
properties.

Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2017-06-17 08:16:46 +02:00
Ralph Sennhauser
1216132f4d ARM: dts: armada-385-linksys: group pins in pinctrl
A pin group per node is sufficient, further specialization only serves
as documentation which can be a comment just as well. This simplifies
configuring pins for nodes in dependants.

Also use labels which end up right by the node they are intended for.

Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2017-06-17 08:16:46 +02:00
Ralph Sennhauser
bf6c959eb4 ARM: dts: armada-385-linksys: partition layout is board specific
Move the partition layout to individual boards. The Linksys WRT 3200 ACM
(Rango) comes with a 256MiB nand flash chip and different layout.

Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2017-06-17 08:16:46 +02:00
Ralph Sennhauser
0ebbb9575a ARM: dts: armada-385-linksys: use binary unit prefixes
Use IEEE 1541-2002 unit prefixes for sizes.

Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2017-06-17 08:16:46 +02:00
Ralph Sennhauser
4c38d10c75 ARM: dts: armada-385-linksys: drop legacy DSA bindings
The new ones work so there is little reason to keep the legacy bindings.
Use the rework as the opportunity to drop the legacy node.

Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2017-06-17 08:16:46 +02:00
Ralph Sennhauser
da3ac208f8 ARM: dts: armada-385-linksys: usb3 label cleanup
Now that we use the reference for the USB3.0 port update the node name
and labels for the phy and vbus to match the label used by
armada-38x.dtsi.

Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2017-06-17 08:16:46 +02:00
Ralph Sennhauser
a43df48fbe ARM: dts: armada-385-linksys: bm pools by label order
Which pools we assing doesn't matter. Use the order which doesen't leave
a chance for questions for first time readers.

Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2017-06-17 08:16:46 +02:00
Ralph Sennhauser
70fd74252e ARM: dts: armada-385-linksys: drop redundant properties in dependants
Drop redundant declaration of #address-cells and #size-cells.

Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2017-06-17 08:16:46 +02:00
Ralph Sennhauser
ecdcd24864 ARM: dts: armada-385-linksys: flatten dependants
Flatten dts of individual boards to match the new style used in
armada-385-linksys.dtsi and for the Rango addition.

* Caiman - Linksys WRT1200AC v1 & v2
* Cobra - Linksys WRT1900AC v2
* Shelby - Linksys WRT1900ACS v1 & v2

Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2017-06-17 08:16:45 +02:00
Ralph Sennhauser
77c82b5f83 ARM: dts: armada-385-linksys: label nodes
Add labels to nodes used by dependants. Also rename node gpio_keys to
gpio-keys to match the style of the rest of the file as well as the
documented example.

Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2017-06-17 08:16:45 +02:00
Ralph Sennhauser
a90c9eaefb ARM: dts: armada-385-linksys: flatten dtsi
Since the addition of the spi reference two styles are used. Use
references instead of recreating the same structure over and over again.

This helps to distinguish which are changes to the underlying nodes and
which are new additions and helps maintainability in general.

Verified the resulting dtb to be binary identical.

Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2017-06-17 08:16:45 +02:00
Chris Packham
3bef2ac4bd ARM: dts: mvebu: disable the rtc on 98dx3236 SoC
There is no rtc for the 98dx3236 and derivative SoCs. Disable the rtc
node inherited from the armada-370-xp base.

Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2017-06-17 08:16:45 +02:00
Chris Packham
948e7d98e6 ARM: dts: mvebu: add missing interrupt to 98dx4251 switch
The 98dx4251 has 4 interrupts for the packet processor whereas the
98dx3236 and 98dx3336 only have 3.

Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2017-06-17 08:16:45 +02:00
Andrew Lunn
8035eaadef ARM: dts: armada-xp: Use pwm-fan rather than gpio-fan
The mvebu GPIO driver can also perform PWM on some pins. Use the pwm-fan
driver to control the fan of the WRT1900AC, giving us finer grained control
over its speed and hence noise.

Signed-off-by: Andrew Lunn <andrew@lunn.ch>
URL: https://patchwork.ozlabs.org/patch/427291/
[Ralph Sennhauser: drop flags paramter from pwms, no longer used]
Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
Tested-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2017-06-17 08:16:45 +02:00
Ralph Sennhauser
7cb2acb3fb ARM: dts: mvebu: Add PWM properties for armada-38x
Add the required properties to the GPIO nodes for them to be used as PWM
lines.

Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2017-06-17 08:16:45 +02:00
Andrew Lunn
0c8c9ff8ec ARM: dts: mvebu: Add PWM properties to .dtsi files
Add properties to the GPIO nodes for Armada 370/XP to allow them to be
also used as PWM lines.

Signed-off-by: Andrew Lunn <andrew@lunn.ch>
URL: https://patchwork.ozlabs.org/patch/427294/
[Ralph Sennhauser: Add new compatible string marvell,armada-370-gpio]
Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
Tested-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2017-06-17 08:16:45 +02:00
Andrew Lunn
4cdcf1efcc ARM: mvebu: Enable SENSORS_PWM_FAN in defconfig
Now that the GPIO driver also supports PWM operation, enable the PWM
framework and fan driver in mvebu_v7_defconfig.

Signed-off-by: Andrew Lunn <andrew@lunn.ch>
URL: https://patchwork.ozlabs.org/patch/427297/
[Ralph Sennhauser: add fan driver to defconfig]
Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
Tested-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2017-06-17 08:14:10 +02:00
Martin Blumenstingl
f28d4bdb74 ARM: dts: meson: use the real ethernet clock on Meson8 and Meson8b
Until now clk81 was used as gate clock for the ethernet controller on
Meson8 whereas Meson8b did not configure a gate clock at all. Use
CLKID_ETH for both SoCs, which is the real gate clock for the ethernet
controller.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2017-06-16 12:07:11 -07:00
Martin Blumenstingl
d8dd3d29d0 ARM: dts: meson8b: add the SCU device node
Amlogic's Meson8b SoC has a Snoop Control Unit (SCU), just like many
other Cortex-A5 SoCs. Add the corresponding devicetree node so it can be
used during SMP boot.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2017-06-16 12:07:11 -07:00
Martin Blumenstingl
e29b1cf874 ARM: dts: meson: add USB support on Meson8 and Meson8b
This adds the DWC2 USB controller nodes and the corresponding USB2 PHY
nodes to meson.dtsi (as the same - or at least a very similar) IP block
is used on all SoCs (at the same physical address).
Additionally meson8.dtsi and meson8b.dtsi add the required clocks to the
DWC2 and USB2 PHY nodes, otherwise the DWC2 controller cannot be
initialized by the dwc2 driver.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2017-06-16 12:07:11 -07:00
Martin Blumenstingl
a35910d399 ARM: dts: meson: add the hardware random number generator
All supported Meson SoCs have a random number generator in CBUS.
Newer SoCs (GXBB, GXL and GXM) provide only one 32-bit random number
register, whereas the older SoCs (Meson6, Meson8 and Meson8b) have two
32-bit random number registers. The existing meson-rng driver only
supports the lower 32-bit - but it still works fine on the older SoCs
apart from this small limitation.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2017-06-16 12:07:11 -07:00
Martin Blumenstingl
8a7f0c52e8 ARM: dts: meson8: add reserved memory zones
There seem to be two memory regions that need to be reserved, otherwise
the system just hangs when running:
$ stress --vm-bytes $(awk '/MemFree/{printf "%d\n", $2 * 0.9;}' < /proc/meminfo)k \
  --vm-keep -m 1

The first memory region is really crucial and without it the system
hangs. I could not find any references to this in Amlogic's GPL kernel
sources.
The second region is used by the "suspend firmware". The u-boot sources
(/arch/arm/cpu/aml_meson/m8/firmwareld.c) state that the suspend
firmware is located at "64M + 15M" which matches CONFIG_MESON_SUSPEND in
the Amlogic GPL kernel sources. The "suspend firmware" is responsible
for waking up the system from suspend state.

This also fixes reading the full SD card as without this the system
would simply hang (probably related to the first memory region, if some
buffer is allocated there).

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2017-06-16 12:07:10 -07:00
Martin Blumenstingl
a39a3b9f4f ARM: dts: meson: add the SAR ADC
This adds the SAR ADC to meson.dtsi and configures the clocks on Meson8
and Meson8b to allow boards to use it. Some boards use it to connect a
button to it.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2017-06-16 12:07:10 -07:00
Martin Blumenstingl
d42ce5a98d ARM: dts: meson8: add the pins for the SDIO controller
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2017-06-16 12:07:10 -07:00
Martin Blumenstingl
192ec775f5 ARM: dts: meson8: add the PWM_E and PWM_F pins
This adds the definition of the PWM_E (CBUS) and PWM_F (AOBUS) to
meson8.dtsi, allowing devices to use them. PWM_E can be used on some
devices to generate the 32.768kHz clock for the SDIO wifi module, while
PWM_F can be used to control the power LED.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2017-06-16 12:07:10 -07:00
Martin Blumenstingl
5239e05048 ARM: dts: meson: use GIC_SPI and IRQ_TYPE_EDGE_RISING macros
This makes meson.dtsi easier to read as we are not using magic numbers
for the GIC interrupt type (GIC_SPI) and the interrupt polarity
(IRQ_TYPE_EDGE_RISING).

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2017-06-16 12:07:10 -07:00
Martin Blumenstingl
7a16f06b90 ARM: dts: meson: use C preprocessor friendly include syntax
This replaces the "/include/" syntax with the "#include" syntax in all
Amlogic Meson .dts and .dtsi files. That is required to use preprocessor
defines (like GIC_SPI and IRQ_TYPE_EDGE_RISING) in meson.dtsi (all files
which directly or indirectly include meson.dtsi need to use the
"#include" syntax, otherwise the .dts files cannot be compiled).

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2017-06-16 12:07:09 -07:00
Martin Blumenstingl
79eb80b70c ARM: dts: meson8: fix the IR receiver pins
The IR receiver pins are currently defined in the CBUS pin-controller.
However the pins are in the AO region, which is controlled by the AOBUS
pin-controller. Move the pins to pinctrl_aobus so they can actually be
used.

Fixes: b60e1157d8 ("ARM: dts: amlogic: Split pinctrl device for Meson8 / Meson8b")
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2017-06-16 12:06:53 -07:00
Hoegeun Kwon
bc8ebb8639 ARM: dts: exynos: Fix polarity of panel reset gpio in Rinato
This reset gpio is active low, therefore fix from active high to low.

Signed-off-by: Hoegeun Kwon <hoegeun.kwon@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2017-06-16 18:17:23 +02:00
Sekhar Nori
82cc56ccf1 ARM: davinci_all_defconfig: enable USB CDC NCM gadget
Enable USB CDC NCM gadget module in davinci_all_defconfig
to make it easier to use it on these devices.

Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2017-06-16 13:38:42 +05:30
Sekhar Nori
9e4ffee822 ARM: davinci_all_defconfig: enable mtdtests
mtdtests module has some useful tests to verify that
mtd drivers like davinci_nand are working correctly.

Enable it in davinci_all_defconfig to make testing and
debug easier.

Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2017-06-16 13:38:36 +05:30
Kevin Hilman
231ce279e6 ARM: davinci: fix const warnings
After VPIF was converted to enable getting subdevs from DT, the
pdata is no longer const, so remove these to avoid compiler warnings.

Signed-off-by: Kevin Hilman <khilman@baylibre.com>
[nsekhar@ti.com: minor commit message fixup]
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2017-06-15 19:18:24 +05:30
Hans Verkuil
82d1afbce1 ARM: dts: exynos: add needs-hpd to &hdmicec for Odroid-U3
The Odroid-U3 board has an IP4791CZ12 level shifter that is
disabled if the HPD is low, which means that the CEC pin is
disabled as well.

Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2017-06-15 15:16:41 +02:00
Arvind Yadav
d5f7b828ff arm: perf: make of_device_ids const
of_device_ids are not supposed to change at runtime. All functions
working with of_device_ids provided by <linux/of.h> work with const
of_device_ids. So mark the non-const structs as const.

Signed-off-by: Arvind Yadav <arvind.yadav.cs@gmail.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
2017-06-15 11:07:34 +01:00
Marc Zyngier
6f2f10cabe Merge branch 'kvmarm-master/master' into HEAD 2017-06-15 09:35:15 +01:00
Yuantian Tang
b6f5e70193 ARM: dts: ls1021a: update the clockgen node
qoriq clock driver has been updated to parse the clock configuration
information defined in driver itself not in dts.
Since the new implementation and the bindings have been merged,
it is time to update the clock related node and remove redundent clock
configuration information from the dts.

Signed-off-by: Tang Yuantian <andy.tang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-06-15 11:28:20 +08:00
Leonard Crestez
9b00064ba7 ARM: imx_v6_v7_defconfig: Set THERMAL_WRITABLE_TRIPS=y for testing
Setting trip points is supported by the imx thermal driver and it is
useful to be able to test this without adjusting config.

Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-06-15 09:35:09 +08:00
Chen-Yu Tsai
d5e9edfd37 ARM: sun6i: a31s: primo81: Enable battery power supply
The MSI Primo81 tablet has a 3500 mAh 3.7V LiPo battery.

Enable the PMIC's battery power supply so the battery can be monitored.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-06-14 21:27:19 +02:00
Chen-Yu Tsai
723ca929a5 ARM: sun6i: a31s: primo81: Change USB OTG to OTG mode
Now that we have support for the AXP221 PMIC's USB VBUS detection and
DRIVEVBUS vbus control, we can use the USB OTG port in proper OTG mode.

This patch enables the aforementioned PMIC functions, adds the OTG ID
detection pin to the USB PHY node, and changes the mode of USB OTG to
"otg".

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-06-14 21:27:19 +02:00
Corentin Labbe
0e9d528f07 ARM: sun8i: a83t: Add dt node for the syscon control module
This patch add the dt node for the syscon register present on the
Allwinner A83T

Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-06-14 21:27:19 +02:00
Steve Longerbeam
ad8046a56d ARM: dts: imx6-sabreauto: add the ADV7180 video decoder
Enables the ADV7180 decoder sensor. The ADV7180 connects to the
parallel-bus mux input on ipu1_csi0_mux.

The ADV7180 power pin is via max7310_b port expander.

Changes from Tim Harvey:
- Use IRQ_TYPE_LEVEL_LOW instead of 0x8 for interrupt type for clarity.
- For 8-bit parallel IPU1-CSI0 bus connection only data[12-19] are used.

Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-06-14 23:08:41 +08:00
Steve Longerbeam
ba4105401a ARM: dts: imx6-sabreauto: add pinctrl for gpt input capture
Add pinctrl groups for both GPT input capture channels.

Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-06-14 23:08:38 +08:00
Steve Longerbeam
f9f1353b75 ARM: dts: imx6-sabreauto: add reset-gpios property for max7310_b
The reset pin to the port expander chip (MAX7310) is controlled by a gpio,
so define a reset-gpios property to control it. There are three MAX7310's
on the SabreAuto CPU card (max7310_[abc]), but all use the same pin for
their reset. Since all can't acquire the same pin, assign it to max7310_b,
that chip is needed by more functions (usb and adv7180).

Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-06-14 23:08:34 +08:00
Steve Longerbeam
9976c92df9 ARM: dts: imx6-sabreauto: create i2cmux for i2c3
The sabreauto uses a steering pin to select between the SDA signal on
i2c3 bus, and a data-in pin for an SPI NOR chip. Use i2cmux to control
this steering pin. Idle state of the i2cmux selects SPI NOR. This is not
a classic way to use i2cmux, since one side of the mux selects something
other than an i2c bus, but it works and is probably the cleanest
solution. Note that if one thread is attempting to access SPI NOR while
another thread is accessing i2c3, the SPI NOR access will fail since the
i2cmux has selected the SDA pin rather than SPI NOR data-in. This couldn't
be avoided in any case, the board is not designed to allow concurrent
i2c3 and SPI NOR functions (and the default device-tree does not enable
SPI NOR anyway).

Devices hanging off i2c3 should now be defined under i2cmux, so
that the steering pin can be properly controlled to access those
devices. The port expanders (MAX7310) are thus moved into i2cmux.

Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-06-14 23:08:31 +08:00
Steve Longerbeam
545fb52e53 ARM: dts: imx6-sabresd: add OV5642 and OV5640 camera sensors
Enables the OV5642 parallel-bus sensor, and the OV5640 MIPI CSI-2 sensor.

The OV5642 connects to the parallel-bus mux input port on ipu1_csi0_mux.

The OV5640 connects to the input port on the MIPI CSI-2 receiver on
mipi_csi.

Until the OV5652 sensor module compatible with the SabreSD becomes
available for testing, the ov5642 node is currently disabled.

Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-06-14 23:08:27 +08:00
Steve Longerbeam
789459c41c ARM: dts: imx6-sabrelite: add OV5642 and OV5640 camera sensors
Adds the OV5642 parallel-bus sensor, and the OV5640 MIPI CSI-2 sensor.
Both hang off the same i2c2 bus, so they require different (and non-
default) i2c slave addresses.

The OV5642 connects to the parallel-bus mux input port on ipu1_csi0_mux.

The OV5640 connects to the input port on the MIPI CSI-2 receiver on
mipi_csi.

The OV5642 node is disabled temporarily while the subdev driver is
cleaned up and submitted later.

Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-06-14 23:08:23 +08:00
Steve Longerbeam
4c8777892e ARM: dts: imx6qdl-sabrelite: remove erratum ERR006687 workaround
There is a pin conflict with GPIO_6. This pin functions as a power
input pin to the OV5642 camera sensor, but ENET uses it as the h/w
workaround for erratum ERR006687, to wake-up the ARM cores on normal
RX and TX packet done events. So we need to remove the h/w workaround
to support the OV5642. The result is that the CPUidle driver will no
longer allow entering the deep idle states on the sabrelite.

This is a partial revert of

commit 6261c4c8f1 ("ARM: dts: imx6qdl-sabrelite: use GPIO_6 for FEC
			interrupt.")
commit a28eeb43ee ("ARM: dts: imx6: tag boards that have the HW workaround
			for ERR006687")

Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-06-14 23:08:05 +08:00
Steve Longerbeam
d72ee3a12b ARM: dts: imx6qdl: add capture-subsystem device
Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-06-14 23:07:43 +08:00
Philipp Zabel
2539f517ac ARM: dts: imx6qdl: Add video multiplexers, mipi_csi, and their connections
This patch adds the device tree graph connecting the input multiplexers
to the IPU CSIs and the MIPI-CSI2 gasket on i.MX6. The MIPI_IPU
multiplexers are added as children of the iomuxc-gpr syscon device node.
On i.MX6Q/D two two-input multiplexers in front of IPU1 CSI0 and IPU2
CSI1 allow to select between CSI0/1 parallel input pads and the MIPI
CSI-2 virtual channels 0/3.
On i.MX6DL/S two five-input multiplexers in front of IPU1 CSI0 and IPU1
CSI1 allow to select between CSI0/1 parallel input pads and any of the
four MIPI CSI-2 virtual channels.

Changes from Steve Longerbeam:
- Removed some dangling/unused endpoints (ipu2_csi0_from_csi2ipu)
- Renamed the mipi virtual channel endpoint labels, from "mipi_csiX_..."
  to "mipi_vcX...".
- Added input endpoint anchors to the video muxes for the connections
  from parallel sensors.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-06-14 23:07:08 +08:00
Steve Longerbeam
b0cb1bd4a3 ARM: dts: imx6qdl: Add compatible, clocks, irqs to MIPI CSI-2 node
Add to the MIPI CSI2 receiver node: compatible strings,
interrupt sources, and clocks.

Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-06-14 23:06:45 +08:00
Philipp Zabel
bc97e88ecd ARM: dts: imx6qdl: add multiplexer controls
The IOMUXC General Purpose Register space contains various bitfields
that control video bus multiplexers. Describe them using a mmio-mux
node. The placement of the IPU CSI video mux controls differs between
i.MX6D/Q and i.MX6S/DL.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-06-14 23:06:02 +08:00
Daniel Lezcano
bb0eb050a5 clocksource/drivers: Rename CLKSRC_OF to TIMER_OF
The config option name is now renamed to 'TIMER_OF' for consistency with
the CLOCKSOURCE_OF_DECLARE => TIMER_OF_DECLARE change.

Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
2017-06-14 12:01:03 +02:00
Daniel Lezcano
ba5d08c0ea clocksource/drivers: Rename clocksource_probe to timer_probe
The function name is now renamed to 'timer_probe' for consistency with
the CLOCKSOURCE_OF_DECLARE => TIMER_OF_DECLARE change.

Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
2017-06-14 11:59:16 +02:00
Daniel Lezcano
1727339590 clocksource/drivers: Rename CLOCKSOURCE_OF_DECLARE to TIMER_OF_DECLARE
The CLOCKSOURCE_OF_DECLARE macro is used widely for the timers to declare the
clocksource at early stage. However, this macro is also used to initialize
the clockevent if any, or the clockevent only.

It was originally suggested to declare another macro to initialize a
clockevent, so in order to separate the two entities even they belong to the
same IP. This was not accepted because of the impact on the DT where splitting
a clocksource/clockevent definition does not make sense as it is a Linux
concept not a hardware description.

On the other side, the clocksource has not interrupt declared while the
clockevent has, so it is easy from the driver to know if the description is
for a clockevent or a clocksource, IOW it could be implemented at the driver
level.

So instead of dealing with a named clocksource macro, let's use a more generic
one: TIMER_OF_DECLARE.

The patch has not functional changes.

Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Matthias Brugger <matthias.bgg@gmail.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
2017-06-14 11:58:45 +02:00
Greg Kroah-Hartman
d565ed38d0 arm: mach-rpc: ecard: fix build error
The last commit from me had a missing ';' which broke the build.

Thanks to Arnd for pointing out the issue.

Reported-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-06-14 11:54:29 +02:00
Geert Uytterhoeven
fd8cf827d8 ARM: shmobile: pm-rmobile: Use GENPD_FLAG_ALWAYS_ON
Improve handling of always-on PM domains by using the
GENPD_FLAG_ALWAYS_ON flag introduced in commit ffaa42e8a4 ("PM /
Domains: Enable users of genpd to specify always on PM domains").

Note that the PM domain containing the serial console is still handled
locally.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-06-14 10:58:48 +02:00
Tero Kristo
1df5eaa6bc ARM: OMAP4: hwmod_data: add SHAM crypto accelerator
OMAP4 SoC contains SHAM crypto hardware accelerator. Add hwmod data for
this IP so that it can be utilized by crypto frameworks.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-06-14 00:53:51 -07:00
Sebastian Reichel
ebea90df78 ARM: OMAP4: hwmod data: add des
This fixes the following error during kernel boot:

platform 480a5000.des: Cannot lookup hwmod 'des'

Unfortunately the DES module is only documented partly
in the OMAP4430 TRM. I found an old patch from Joel,
which I took over and updated for currently mainline.

Signed-off-by: Joel Fernandes <joelf@ti.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Acked-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-06-14 00:52:57 -07:00
Sebastian Reichel
478523dd03 ARM: OMAP4: hwmod data: add aes2
This adds the hwmod entry for the second AES module
available on OMAP4.

Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Acked-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-06-14 00:52:38 -07:00
Sebastian Reichel
9a9ded89ad ARM: OMAP4: hwmod data: add aes1
This fixes the following error during kernel boot:

platform 4b501000.aes: Cannot lookup hwmod 'aes1'

Unfortunately the AES module is only documented partly
in the OMAP4430 TRM. I found an old patch from Joel,
which I took over and updated for currently mainline.

Signed-off-by: Joel Fernandes <joelf@ti.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Acked-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-06-14 00:51:35 -07:00
Tero Kristo
45f1d5e3c7 ARM: dts: omap4: add SHAM node
Add SHAM crypto accelerator.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-06-14 00:46:01 -07:00
Tero Kristo
c6faccf21c ARM: dts: omap4: add aes2 instance
OMAP4 has AES2 instance, so add its integration data under DT.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-06-14 00:45:56 -07:00
Sebastian Reichel
7ca3e39719 ARM: dts: omap4.dtsi: remove aes[12]_fck
"aes1_fck" and "aes2_fck" are controlled by hwmod. Drop clock
entries to avoid conflicts.

Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Acked-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-06-14 00:45:43 -07:00
Sebastian Reichel
25e6cfc81a ARM: dts: omap4: Fix aes entry
OMAP4 has a second aes module, so let's use proper name for
the first instance.

Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Acked-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-06-14 00:44:05 -07:00
Markus Elfring
ce3de60ff9 ARM: pxa: Delete an error message for a failed memory allocation in pxa3xx_u2d_probe()
Omit an extra message for a memory allocation failure in this function.

This issue was detected by using the Coccinelle software.

Link: http://events.linuxfoundation.org/sites/events/files/slides/LCJ16-Refactor_Strings-WSang_0.pdf
Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
2017-06-14 08:32:21 +02:00
Markus Elfring
361f7cc7f3 ARM: pxa: Improve a size determination in pxa3xx_u2d_probe()
Replace the specification of a data structure by a pointer dereference
as the parameter for the operator "sizeof" to make the corresponding size
determination a bit safer according to the Linux coding style convention.

Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
2017-06-14 08:32:21 +02:00
Markus Elfring
c276557de3 ARM: pxa: Delete an error message for a failed memory allocation in pxa_pm_init()
Omit an extra message for a memory allocation failure in this function.

This issue was detected by using the Coccinelle software.

Link: http://events.linuxfoundation.org/sites/events/files/slides/LCJ16-Refactor_Strings-WSang_0.pdf
Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
2017-06-14 08:32:21 +02:00
Petr Cvek
7ade445c26 ARM: pxa: magician: Add support for ADS7846 touchscreen
This patch adds a support for ADS7846 touchscreen driver.

The basic functionality was tested, x_plate_ohms and y_plate_ohms were
physically measured. The value pressure_max was empirically set to match
the measured range, which is affected by x_plate_ohms and ADS samples.

The value of keep_vref_on should be set. A tested model (T-Mobile MDA
Compact PM10A) doesn't seem to use Vref pin as the input from an external
source. On this model the unset keep_vref_on cause high jitter of measured
values.

SPI framing pin (gpio_cs) must be used in GPIO mode due to an incompatible
autoframing of PXA27x controller and ADS7846 device.

Signed-off-by: Petr Cvek <petr.cvek@tul.cz>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
2017-06-14 08:32:21 +02:00
Linus Walleij
0d7a2c35d1 ARM: dts: add Gemini PATA/SATA support
The NAS4229B and SQ201 Gemini systems have a PATA controller
which is linked to a SATA bridge in the SoC. Enable both
platforms to use the PATA/SATA devices.

Cc: John Feng-Hsin Chiang <john453@faraday-tech.com>
Cc: Greentime Hu <green.hu@gmail.com>
Acked-by: Hans Ulli Kroll <ulli.kroll@googlemail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-06-13 23:58:00 +02:00
Linus Walleij
9eeb022477 ARM: dts: Add Gemini DMA controller
This adds the Faraday Technology FTDMAC020 DMA controller to
the Gemini SoC DTSI file. It is only used for memcpy work so
we can activate it for all users of the chipset.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-06-13 23:57:55 +02:00
Florian Fainelli
4a579ecf3d This pull request brings in installation of the RPi3 DT in 32-bit
mode, the new thermal nodes, switches to the faster sdhost controller
 for MMC, and enables USB OTG mode on the Pi 0.
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEE/JuuFDWp9/ZkuCBXtdYpNtH8nugFAlk/E94ACgkQtdYpNtH8
 nujc6g/9HBpmIPkiK0g2pQ50BYQnxCcZDpkq4su7kj4+IVyMk/EyPlMUBFAkZGGx
 zaRFbUEVGCAfZ9vJXebUc0l0x3N0DNA88L1PFkKWXt9TkrbOBnbSNMyIzJBxRs81
 Ucl4h7WUox2Y3XeGluOcl/d6wMvBHNwrA+Nm46VfTX29nTu3fnL3Piq+JPRB0Q2N
 I1Apt4oydTChIUY2EeM/N5FkDssMbjJqI8ZQSxRB1W6ppfOBmbyenb4Un+3NsPsX
 dkozW5TseBPHKXnQDI+pPMXWgQ+GlGuceOrggsvh9X2+WcHib4R7aua5rCAZMVb5
 tcUW8PmTDmSQ3YoDpAEUdK6FJipQMx8AU8v1XtZq6r1eUd9fkjvehGajjxBUNGpM
 4UYbk9fFWp/vcq9ZYWEdqk0qqLu1kwv7XCzPDgYpedT/hXQbMiP0FNkU1id5js7+
 3ZnfPu/58IXafPcqmHRG5txX67I+5QvktUswTAaEP6eFEV+HnE7sMfEYuIhlGUKZ
 CN9mY7X90PgzjZzM0fi6UZn7ddpu4K9qqkaZxFEc2rKSdEg+oeV/HdLGFmhs2kFb
 fDSoFOvsfdpypof7B6/LqhQ/4PBQeT8ZCfT3ShIhiuuTFuBSua5bw7b0D2N11w9H
 JZhaZb+IaRNKT0jGsHLjvX66dk/mhxK2bk2jaZLPlhET5EnHZk4=
 =2WZ2
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIcBAABCAAGBQJZQD9RAAoJEIfQlpxEBwcEQe0QAMEP8kRwZ9T8qa/UbuDFu5Nn
 tyj5xFz63Z9Tt4OcrOfezV0ehnT5qinym8zIt+0S0L9RCEafw/Ous2sMcFpC0cjH
 Mnava0H9QELaE68/lZH4RqTd+zzYeJOUe9YD0YsIJ8MBfOkz62fR2mppur1b8E42
 MUNGgXqCf7B6IFF+JQWVBlw7x9uiBn+mKShEY81FezQijVZOpG4Fa6R6tqeBw3J8
 +t1v4H9zc41aFfYJbdnuaTIL1MU84fL0xKBRa6A1+jEP2qctik1xza84uZHip98Y
 RG1SVAfvVUeWR0+RtJZqIKjfu71yFDeUkiywlspM1PfXRABm7ZQun3HvzeZcoMoF
 QQ+ITPUL9+p4VVFf+Sl4C0GjOiHzpH1ah/d65uVyl2AbsOnMG+klBLmT4Em3oy/Q
 8auIfXSkvmlVx0lp/hna98T2uEdG4sAs3sw4Qr+uF5qkqgr7lsjNxniNQLTE+BoO
 /JqAH1E2lOA7wmgkDFBsYzkJpNi8z4uE0rKRe93CcZT69Zg4+/ZfYWU7QlTrrN3+
 qnsdqq9cfjSmMoXYP2/EawcFl2Dx48BJBvd1vgULJGxpw4JEap7Wp37fUDavpCdK
 GD2hXQfGTzXdZJOLEbBbxxX9zZSF0LUA+PWFSbmIf03nGy5X9Fu/XQR04NxNrSpI
 HrfKxcwV02yF8jTib2i/
 =HNJf
 -----END PGP SIGNATURE-----

Merge tag 'bcm2835-dt-next-2017-06-12' into devicetree/next

This pull request brings in installation of the RPi3 DT in 32-bit
mode, the new thermal nodes, switches to the faster sdhost controller
for MMC, and enables USB OTG mode on the Pi 0.

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2017-06-13 12:38:48 -07:00
Linus Walleij
cff94887d5 ARM: dts: add core I2C devices to the APQ8060 Dragonboard
The APQ8060 Dragonboard has an Atmel AT24c128 EEPROM and a
Wolfson Micro WM8903 codec connected to its GSBI8 I2C bus.
Add entries for these to the device tree. The interrupt line
from the WM8903 chip is not routed anywhere on this design
so it can not be used.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2017-06-13 12:23:57 -04:00
Rob Herring
508d690e94 ARM: dts: tegra: fix PCI bus dtc warnings
dtc recently added PCI bus checks. Fix these warnings.

Signed-off-by: Rob Herring <robh@kernel.org>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Alexandre Courbot <gnurou@gmail.com>
Cc: linux-tegra@vger.kernel.org
Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-06-13 16:49:57 +02:00
Stephen Warren
b5db9dedc5 ARM: tegra: remove Whistler support
Whistler is an ancient Tegra 2 reference board. I may have been the only
person who ever used it with upstream software, and I've just recycled
the board hardware. Hence, it makes sense to remove support from software.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-06-13 15:35:44 +02:00
Arnd Bergmann
be36e000bc ARM: at91: fix at91_suspend_entering_slow_clock link error
When CONFIG_ARCH_AT91 is enabled, but none of the specific SoC support
is in use, some at91 specific drivers fail to link:

drivers/tty/serial/atmel_serial.o: In function `atmel_serial_suspend':
atmel_serial.c:(.text.atmel_serial_suspend+0x1e): undefined reference to `at91_suspend_entering_slow_clock'
drivers/usb/host/ohci-at91.o: In function `ohci_hcd_at91_drv_suspend':
ohci-at91.c:(.text.ohci_hcd_at91_drv_suspend+0x12): undefined reference to `at91_suspend_entering_slow_clock'
drivers/usb/gadget/udc/at91_udc.o: In function `at91udc_suspend':
at91_udc.c:(.text.at91udc_suspend+0x26): undefined reference to `at91_suspend_entering_slow_clock'

This changes the at91_suspend_entering_slow_clock hack once more, adding
an alternative inline implementation that is used exactly in those cases
that don't provide the normal implementation.

Fixes: c1892c2379d2 ("ARM: at91: handle CONFIG_PM for armv7m configurations")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
2017-06-13 11:51:11 +02:00
Kirill A. Shutemov
e585513b76 x86/mm/gup: Switch GUP to the generic get_user_page_fast() implementation
This patch provides all required callbacks required by the generic
get_user_pages_fast() code and switches x86 over - and removes
the platform specific implementation.

Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Andy Lutomirski <luto@amacapital.net>
Cc: Andy Lutomirski <luto@kernel.org>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Brian Gerst <brgerst@gmail.com>
Cc: Dave Hansen <dave.hansen@intel.com>
Cc: Denys Vlasenko <dvlasenk@redhat.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Josh Poimboeuf <jpoimboe@redhat.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-arch@vger.kernel.org
Cc: linux-mm@kvack.org
Link: http://lkml.kernel.org/r/20170606113133.22974-2-kirill.shutemov@linux.intel.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2017-06-13 08:56:50 +02:00
Stefan Wahren
3e9aaaf1d8 ARM: bcm2835_defconfig: Enable serial & ethernet USB gadget support
In order to use the serial and ethernet USB gadget support on
Raspberry Zero, we also need to enable the PHY driver, kernel module
and OTG support.

Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
2017-06-12 14:07:38 -07:00
Stefan Wahren
9c53535a15 ARM: dts: bcm2835-rpi-zero: Enable OTG mode
Since 635c21068cf ("usb: dwc2: gadget: Fix WARN_ON messages
during FIFO init") the dwc2 driver is able to handle OTG and gadget
mode for bcm2835. So enable this feature for the Raspberry Pi Zero.

Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
2017-06-12 13:28:50 -07:00
Stefan Wahren
860a5d0b26 ARM: dts: bcm283x: Add generic USB PHY
In order to use dwc2 in OTG or gadget mode the USB PHY should be
specified. Since there is no bcm283x USB PHY driver use the generic
one.

Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
2017-06-12 13:28:27 -07:00
Stefan Wahren
1aa1d858f5 ARM: dts: bcm283x: Add dtsi for OTG mode
The Raspberry Pi Zero also supports OTG mode. So provide a dtsi file
to configure the USB interface accordingly. The fifo sizes are optimized
for device endpoint 6 and 7 with the maximum of 768.

Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
2017-06-12 13:27:46 -07:00
Eric Anholt
40c26d3af6 ARM: dts: Cygnus: Add the ethernet switch and ethernet PHY
Cygnus has a single amac controller connected to the B53 switch with 2
PHYs. On the BCM911360_EP platform, those two PHYs are connected to the
external ethernet jacks.

Signed-off-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2017-06-12 09:52:37 -07:00
Jon Mason
2896cb55dc ARM: dts: NSP: Add Thermal Support
Add thermal support via the ns-thermal driver and create a single
thermal zone for the entire SoC.

Signed-off-by: Jon Mason <jon.mason@broadcom.com>
Acked-by: Eduardo Valentin <edubezval@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2017-06-12 09:52:36 -07:00
Eric Anholt
f1494a85e2 ARM: dts: Cygnus: Add BCM11360's V3D device
This loads the VC4 driver on the 911360_entphn platform (with the
corresponding series sent to dri-devel), which is supported by master
of the Mesa tree.

Signed-off-by: Eric Anholt <eric@anholt.net>
Acked-by: Scott Branden <scott.branden@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2017-06-12 09:52:35 -07:00
Rafał Miłecki
23f1eca6d5 ARM: dts: BCM5301X: Specify MDIO bus in the DT
Northstar devices have MDIO bus that may contain various PHYs attached.
A common example is USB 3.0 PHY (that doesn't have an MDIO driver yet).

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2017-06-12 09:52:35 -07:00
Rafał Miłecki
36c2cb1830 ARM: dts: BCM5301X: Add CPU thermal sensor and zone
This uses CPU thermal sensor available on every Northstar chipset to
monitor temperature. We don't have any cooling or throttling so only a
critical trip was added.

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Acked-by: Jon Mason <jon.mason@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2017-06-12 09:52:34 -07:00
Tony Lindgren
c3d28e5379 ARM: dts: omap4-droid4: Configure CPCAP battery driver
Configure CPCAP battery driver.

Cc: devicetree@vger.kernel.org
Cc: Marcel Partap <mpartap@gmx.net>
Cc: Michael Scott <michael.scott@linaro.org>
Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-06-12 09:07:13 -07:00
Vladimir Murzin
d360a687d9 ARM: 8682/1: V7M: Set cacheid iff DminLine or IminLine is nonzero
Cache support is optional feature in M-class cores, thus DminLine or
IminLine of Cache Type Register is zero if caches are not implemented,
but we check the whole CTR which has other features encoded there.
Let's be more precise and check for DminLine and IminLine of CTR
before we set cacheid.

Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2017-06-12 15:47:29 +01:00
Yisheng Xie
bbeedfda8e ARM: 8681/1: make VMSPLIT_3G_OPT depends on !ARM_LPAE
When both enable CONFIG_ARM_LPAE=y and CONFIG_VMSPLIT_3G_OPT=y, which
means use PAGE_OFFSET=0xB0000000 with ARM_LPAE, the kernel will boot
fail and stop after uncompressed:

   Starting kernel ...

   Uart base = 0x20001000
   watchdog reg = 0x20013000
   dtb addr = 0x80840308
   Uncompressing Linux... done, booting the kernel.

For ARM_LPAE only support 3:1, 2:2, 1:3 split of TTBR1, which mention in:
   http://elinux.org/images/6/6a/Elce11_marinas.pdf - p16

So we should make VMSPLIT_3G_OPT depends on !ARM_LPAE to avoid trigger
this bug.

Acked-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Yisheng Xie <xieyisheng1@huawei.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2017-06-12 15:47:28 +01:00
Ard Biesheuvel
60ce285851 ARM: 8680/1: boot/compressed: fix inappropriate Thumb2 mnemonic for __nop
Commit 06a4b6d009 ("ARM: 8677/1: boot/compressed: fix decompressor
header layout for v7-M") fixed an issue in the layout of the header
of the compressed kernel image that was caused by the assembler
emitting narrow opcodes for 'mov r0, r0', and for this reason, the
mnemonic was updated to use the W() macro, which will append the .w
suffix (which forces a wide encoding) if required, i.e., when building
the kernel in Thumb2 mode.

However, this failed to take into account that on Thumb2 kernels built
for CPUs that are also ARM capable, the entry point is entered in ARM
mode, and so the instructions emitted here will be ARM instructions
that only exist in a wide encoding to begin with, which is why the
assembler rejects the .w suffix here and aborts the build with the
following message:

  head.S: Assembler messages:
  head.S:132: Error: width suffixes are invalid in ARM mode -- `mov.w r0,r0'

So replace the W(mov) with separate ARM and Thumb2 instructions, where
the latter will only be used for THUMB2_ONLY builds.

Fixes: 06a4b6d009 ("ARM: 8677/1: boot/compressed: fix decompressor ...")
Reported-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2017-06-12 15:47:27 +01:00
Tony Lindgren
67d00470ac Merge branch 'omap-for-v4.13/clkctrl' into omap-for-v4.13/soc-v4 2017-06-12 03:27:30 -07:00
Subhajit Paul
fcd104b50f ARM: dts: dra7xx-clocks: Use DPLL_GPU for GPU clocks
The GPU has two functional clocks - GPU_CORE_GCLK and GPU_HYD_GCLK.
Both of these are mux clocks and are derived from the DPLL_CORE
H14 output clock CORE_GPU_CLK by default. These clocks can also be
be derived from DPLL_PER or DPLL_GPU.

The GPU DPLL provides the output clocks primarily for the GPU.
Configuring the GPU for different OPP clock frequencies is easier
to achieve when using the DPLL_GPU rather than the other two DPLLs
due to:
1. minimal affect on any other output clocks from these DPLLs
2. may require an impossible post-divider values on existing DPLLs
   without affecting other clocks.

So, switch the GPU functional clocks to be sourced from GPU DPLL by
default. This is done using the DT standard properties "assigned-clocks"
and "assigned-clock-parents". Newer u-boots (from 2017.01 onwards) reuse
and can update these properties to choose an appropriate one-time fixed
OPP configuration as all the required ABB/AVS setup is performed within
the bootloader. Note that there is no DVFS supported for any of the
non-MPU domains. The DPLL will automatically transition into a low-power
stop mode when the associated output clocks are not utilized or gated
automatically.

This patch also sets the initial values for the DPLL_GPU outputs.
These values are chosen based on the OPP_NOM values defined as per
recommendation from design team. The DPLL locked frequency is kept
at 1277 MHz, so that the value for the divider clock, dpll_gpu_m2_ck,
can be set to 425.67 MHz for OPP_NOM.

Signed-off-by: Subhajit Paul <subhajit_paul@ti.com>
[s-anna@ti.com: revise patch description]
Signed-off-by: Suman Anna <s-anna@ti.com>
Acked-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-06-12 03:05:20 -07:00
Suman Anna
32a04832a1 ARM: dts: dra7xx-clocks: Set IVA DPLL and its output clock rates
The IVA DPLL in DRA7xx provides the output clocks for only the IVAHD
subsystem in DRA7xx as compared to previous OMAP generations when it
provided the clocks for both DSP and IVAHD subsystems. This DPLL is
currently not configured by older bootloaders. Use the DT standard
properties "assigned-clocks" and "assigned-clock-rates" to set the
IVA DPLL clock rate and the rates for its derivative clocks at boot
time to properly initialize/lock this DPLL and be independent of the
bootloader version. Newer u-boots (from 2017.01 onwards) reuse and
can update these properties to choose an appropriate one-time fixed
OPP configuration. The DPLL will automatically transition into a
low-power stop mode when the associated output clocks are not
utilized or gated automatically.

The reset value of the divider M2 (that supplies the IVA_GFLCK, the
functional clock for the IVAHD subsystem) does not match a specific
OPP. So, the derived output clock from this IVA DPLL has to be
initialized as well to avoid initializing these divider outputs to an
incorrect frequencies.

The OPP_NOM clock frequencies are defined in the AM572x SR2.0 Data
Sheet vB, section 5.5.2 "Voltage And Core Clock Specifications". The
clock rates are chosen based on these OPP_NOM values and defined as per
a DRA7xx PLL spec document. The DPLL locked frequency is 2300 MHz, so
the dpll_iva_ck clock rate used is half of this value. The value for the
divider clock, dpll_iva_m2_ck, has to be set to 388.333334 MHz or more
for the divider clk logic to compute the appropriate divider value for
OPP_NOM.

Signed-off-by: Suman Anna <s-anna@ti.com>
Acked-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-06-12 03:05:02 -07:00
Suman Anna
268f6644aa ARM: dts: dra7xx-clocks: Set DSP DPLL and its output clock rates
The DSP DPLL is a new DPLL compared to previous OMAP generations and
supplies the root clocks for the DSP processors, as well as a mux
input source for EVE sub-system (on applicable SoCs). This DPLL is
currently not configured by older bootloaders. Use the DT standard
properties "assigned-clocks" and "assigned-clock-rates" to set the
DSP DPLL clock rate and the rates for its derivative clocks at boot
time to properly initialize/lock this DPLL and be independent of the
bootloader version. Newer u-boots (from 2017.01 onwards) reuse and
can update these properties to choose an appropriate one-time fixed
OPP configuration. The DPLL will automatically transition into a
low-power stop mode when the associated output clocks are not
utilized or gated automatically.

The DSP DPLL provides two output clocks, DSP_GFCLK and EVE_GCLK. The
desired rate for DSP_GFCLK is 600 MHz (same as DSP DPLL CLKOUT frequency),
and is currently auto set due to the desired M2 divider value being the
same as reset value for the locked frequency of 600 MHz. The EVE_GCLK
however is required to be 400 MHz, so set the dpll_dsp_m3x2_ck's rate
explicitly so that the divider is set properly. The dpll_dsp_m2_ck rate
is also set explicitly to not rely on any implicit matching divider reset
values to the locked DPLL frequency.

The OPP_NOM clock frequencies are defined in the AM572x SR2.0 Data
Sheet vB, section 5.5.2 "Voltage And Core Clock Specifications". The
clock rates are chosen based on these OPP_NOM values and defined as per
a DRA7xx PLL spec document. The DPLL locked frequency is 1200 MHz, so
the dpll_dsp_ck clock rate used is half of this value.

Signed-off-by: Suman Anna <s-anna@ti.com>
Acked-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-06-12 03:04:51 -07:00
Suman Anna
39879c7d96 ARM: dts: dra7xx-clocks: Source IPU1 functional clock from CORE DPLL
The IPU1 functional clock is actually the output of a mux clock,
ipu1_gfclk_mux. The mux clock is sourced by default from the
DPLL_ABE_X2_CLK, and this results in a rather odd clock frequency
(361 MHz) for the IPU1 functional clock on platforms where ABE_DPLL
is configured properly. Reconfigure the mux clock to be sourced from
CORE_IPU_ISS_BOOST_CLK (dpll_core_h22x2_ck), so that both the IPU1
and IPU2 are running from the same clock and clocked at the same
nominal frequency of 425 MHz.

This also ensures that IPU1 functional clock is always configured
properly and becomes independent of the state of the ABE DPLL on
all boards.

Signed-off-by: Suman Anna <s-anna@ti.com>
Acked-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-06-12 03:04:36 -07:00
Suman Anna
b58104f0a6 ARM: dts: omap54xx-clocks: Set IVA DPLL and its output clock rates
The IVA DPLL is not an essential DPLL for the functionality of a
bootloader and is usually not configured (e.g. older u-boots configure
it only if CONFIG_SYS_CLOCKS_ENABLE_ALL is enabled and u-boots newer
than 2014.01 do not even have an option), and this results in incorrect
operating frequencies when trying to use a DSP or IVAHD, whose root
clocks are derived from this DPLL. Use the DT standard properties
"assigned-clocks" and "assigned-clock-rates" to set the IVA DPLL clock
rate and the rates for its derivative clocks at boot time to properly
initialize/lock this DPLL. The DPLL will automatically transition
into a low-power stop mode when the associated output clocks are
not utilized or gated automatically.

The reset values of the dividers H11 & H12 (functional clocks for DSP
and IVAHD respectively) are identical to each other, but are different
at each OPP. The reset values also do not match a specific OPP. So, the
derived output clocks from the IVA DPLL have to be initialized as well
to avoid initializing these divider outputs to incorrect frequencies.

The clock rates are chosen based on the OPP_NOM values as defined in
the OMAP5432 SR2.0 Data Manual Book vK, section 5.2.3.5 "DPLL_IVA
Preferred Settings". The recommended maximum DPLL locked frequency is
2330 MHz for OPP_NOM (value for DPLL_IVA_X2_CLK), so the dpll_iva_ck
clock rate used is half of this value. The value 465.92 MHz is used
instead of 465.9 MHz for dpll_iva_h11x2_ck so that proper divider
value can be calculated.

Signed-off-by: Suman Anna <s-anna@ti.com>
Acked-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-06-12 03:04:23 -07:00
Suman Anna
c8ceb5ac1a ARM: dts: omap44xx-clocks: Set IVA DPLL and its output clock rates
The IVA DPLL is not an essential DPLL for the functionality of a
bootloader and is usually not configured (e.g. older u-boots configure
it only if CONFIG_SYS_CLOCKS_ENABLE_ALL is enabled and u-boots newer
than 2014.01 do not even have an option), and this results in incorrect
operating frequencies when trying to use a DSP or IVAHD, whose root
clocks are derived from this DPLL. Use the DT standard properties
"assigned-clocks" and "assigned-clock-rates" to set the IVA DPLL clock
rate and the rates for its derivative clocks at boot time to properly
initialize/lock this DPLL. The DPLL will automatically transition
into a low-power stop mode when the associated output clocks are
not utilized or gated automatically.

The reset values of the dividers M4 & M5 (functional clocks for DSP and
IVAHD respectively) are identical to each other, but are different at
each OPP. The reset values also do not match a specific OPP. So, the
derived output clocks from the IVA DPLL have to be initialized as well
to avoid initializing these divider outputs to incorrect frequencies.

The clock rates are chosen based on the OPP100 values as defined in the
OMAP4430 ES2.x Public TRM vAP, section "3.6.3.8.7 DPLL_IVA Preferred
Settings". The DPLL locked frequency is 1862.4 MHz (value for
DPLL_IVA_X2_CLK), so the dpll_iva_ck clock rate used is half of
this value.

Signed-off-by: Suman Anna <s-anna@ti.com>
Acked-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-06-12 03:03:30 -07:00
Rob Herring
f7d569c1e6 ARM: dts: r8a779x: Fix PCI bus dtc warnings
The bogus 'device_type = "pci"' confuses dtc, causing lots of totally
unrelated warnings.  After fixing that, real warnings like

    arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_device_reg): Node /pci@ee090000/usb@0,1 PCI unit address format error, expected "1,0"

are left.  Correct the unit-addresses and reg properties of the subnodes
to fix these.

Signed-off-by: Rob Herring <robh@kernel.org>
[geert: Improve description]
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-06-12 11:18:30 +02:00
Biju Das
ad2c0558d0 ARM: dts: iwg20d-q7: Add support for iWave G20D-Q7 board based on RZ/G1M
Add support for iWave RainboW-G20D-Qseven board based on RZ/G1M.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Chris Paterson <chris.paterson2@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-06-12 11:18:29 +02:00
Biju Das
aabf13bac0 ARM: dts: iwg20m: Add iWave RZG1M Qseven SOM
Add support for iWave RZG1M Qseven System On Module.
http://www.iwavesystems.com/rz-g1m-qseven-module.html

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Chris Paterson <chris.paterson2@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-06-12 11:18:27 +02:00
Ulrich Hecht
8cae359049 ARM: dts: gose: add composite video input
Adds VIN, decoder and connector.

Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-06-12 11:18:26 +02:00
Jacopo Mondi
b879d674e0 ARM: dts: r7s72100: Add support for GR-Peach
Add device tree source for Renesas GR-Peach board.
GR-Peach is an RZ/A1H based board with 10MB of on-chip SRAM and 8MB
QSPI flash storage.
Add support for the board, and create a 2MB partition to use as rootfs.

Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-06-12 11:18:22 +02:00
Linus Walleij
ec14ba1ec5 clocksource/drivers/fttmr010: Merge Moxa into FTTMR010
This merges the Moxa Art timer driver into the Faraday FTTMR010
driver and replaces all Kconfig symbols to use the Faraday
driver instead. We are now so similar that the drivers can
be merged by just adding a few lines to the Faraday timer.

Differences:

- The Faraday driver explicitly sets the counter to count
  upwards for the clocksource, removing the need for the
  clocksource core to invert the value.

- The Faraday driver also handles sched_clock()

On the Aspeed, the counter can only count downwards, so support
the timers in downward-counting mode as well, and flag the
Aspeed to use this mode. This mode was tested on the Gemini so
I have high hopes that it'll work fine on the Aspeed as well.

After this we have one driver for all three SoCs and a generic
Faraday FTTMR010 timer driver, which is nice.

Cc: Joel Stanley <joel@jms.id.au>
Cc: Jonas Jensen <jonas.jensen@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Tested-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2017-06-12 10:45:10 +02:00
Andrew Jeffery
164a1a90a4 arm: aspeed: Add clock-names property to timer node
The merging of a number of clocksource drivers into fttmr010 means we
require clock-names to be specified in the Aspeed timer node, else the
clocksource fails to probe and boot hangs.

Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2017-06-12 10:13:56 +02:00
Sebastian Reichel
d809f2cca3 ARM: dts: omap4-droid4: Fix WLAN compatible
Motorola Droid 4 uses a WL1285C, so use proper compatible value.
To avoid regressions while support for the new compatible value
is added to the Linux kernel, the old compatible value is preserved
as fallback.

Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-06-12 00:29:47 -07:00
Sebastian Reichel
6f0b0c03fb ARM: dts: omap4-droid4: Add isl29030 ALS/proximity sensor
The Droid 4 has a isl29030 to measure ambient light (e.g. for
automatically adapting display brightness) and proximity.

Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-06-12 00:08:22 -07:00
Tony Lindgren
018b732458 Merge branch 'omap-for-v4.13/legacy-v2' into omap-for-v4.13/soc-v3 2017-06-12 00:07:44 -07:00
Linus Torvalds
9d0eb46246 Bug fixes (ARM, s390, x86)
-----BEGIN PGP SIGNATURE-----
 Version: GnuPG v2.0.22 (GNU/Linux)
 
 iQEcBAABAgAGBQJZPOhfAAoJEL/70l94x66DNgYH/i1pbBmsxeYxWEoScLDTVYZa
 gLKHpjpciCBcKdMGSuBXeP702pi85N/TG7M2XIT/nXmFHYsie9RUSWXK63IZxpPx
 7wRNocstQU+DyMAP3pagJIFPnhUT9ufCZYFDin8sQoh1Dk1xbV38WaUPb/YfPYIt
 xGyti2SzT/CiBOR5zQiNb8m8k+M19QGzjcglHRq5Uk/oSElaw635M6u3PZD0Zvtd
 9L3NhtDYp1tUpG2Rc/5fXX651BVl+J6+xMukuAJBSqcI2hNfe0oM7tTi6larPHPo
 eguW0ChU2qat7Gjob18oKlLAMGwPHt+p7utH2pju5UTWFdPBY2lxUgv5Yfd3Qzo=
 =C/gM
 -----END PGP SIGNATURE-----

Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm

Pull KVM fixes from Paolo Bonzini:
 "Bug fixes (ARM, s390, x86)"

* tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm:
  KVM: async_pf: avoid async pf injection when in guest mode
  KVM: cpuid: Fix read/write out-of-bounds vulnerability in cpuid emulation
  arm: KVM: Allow unaligned accesses at HYP
  arm64: KVM: Allow unaligned accesses at EL2
  arm64: KVM: Preserve RES1 bits in SCTLR_EL2
  KVM: arm/arm64: Handle possible NULL stage2 pud when ageing pages
  KVM: nVMX: Fix exception injection
  kvm: async_pf: fix rcu_irq_enter() with irqs enabled
  KVM: arm/arm64: vgic-v3: Fix nr_pre_bits bitfield extraction
  KVM: s390: fix ais handling vs cpu model
  KVM: arm/arm64: Fix isues with GICv2 on GICv3 migration
2017-06-11 11:07:25 -07:00
Krzysztof Kozlowski
794b77738c ARM: tct_hammer_defconfig: Save defconfig
Generate new defconfig to get rid of obsolete Kconfig entries:
 - BUGVERBOSE was changed into DEBUG_BUGVERBOSE and will be enabled by
   default (it is useful);
 - DETECT_SOFTLOCKUP was changed into LOCKUP_DETECTOR;
 - rest of entries is being removed by default values;

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
2017-06-10 19:30:23 +02:00
Krzysztof Kozlowski
e402594588 ARM: s5pv210_defconfig: Save defconfig
Generate new defconfig to get rid of obsolete Kconfig entries:
 - S3C_LOWLEVEL_UART_PORT and S3C_DEV_FB are invalid for S5P;
 - S5PV210_SETUP_FB_24BPP is gone;
 - rest of entries is being removed by default values;

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
2017-06-10 19:30:21 +02:00
Krzysztof Kozlowski
c2a3f4cca5 ARM: s3c6400_defconfig: Save defconfig
Generate new defconfig to get rid of obsolete Kconfig entries:
 - S3C_BOOT_ERROR_RESET, SND_S3C24XX_SOC and SND_SOC_SMDK_WM9713 are
   gone;
 - rest of entries is being removed by default values;

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
2017-06-10 19:30:18 +02:00
Krzysztof Kozlowski
a13a047520 ARM: mini2440_defconfig: Save defconfig
Generate new defconfig to get rid of obsolete Kconfig entries:
 - NET_ETHERNET, SND_S3C24XX_SOC are gone;
 - CRYPTO_FIPS is changed to no (cannot be part of module);
 - BINFMT_AOUT cannot be selected anymore;
 - rest of entries is being removed by default values;

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
2017-06-10 19:30:15 +02:00
Krzysztof Kozlowski
68d1719fba ARM: s3c2410_defconfig: Save defconfig
Generate new defconfig to get rid of obsolete Kconfig entries:
 - S3C_BOOT_ERROR_RESET, SMDK2440_CPU2442 are gone;
 - ARM_THUMB is changed to yes (selected by default);
 - BINFMT_AOUT cannot be selected anymore;
 - rest of entries is being removed by default values;

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
2017-06-10 19:30:13 +02:00
Krzysztof Kozlowski
e5094f9c56 ARM: exynos_defconfig: Save defconfig
Generate new defconfig to get rid of obsolete Kconfig entries:
 - RFKILL_REGULATOR is gone;
 - COMMON_CLK_MAX77802 was merged into COMMON_CLK_MAX77686;

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
2017-06-10 19:30:10 +02:00
Krzysztof Kozlowski
fdf5f61b69 ARM: s5pv210_defconfig: Bring back lost (but wanted) options
The config was not updated for some time so it needs updates to get the
same options as wanted initially:
 - SYSFS_DEPRECATED is now needed for SYSFS_DEPRECATED_V2;
 - DEBUG_SPINLOCK_SLEEP was replaced by DEBUG_ATOMIC_SLEEP;
 - Use proper DEBUG_S3C_UART1 for UART1;

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
2017-06-10 19:30:07 +02:00
Krzysztof Kozlowski
61d26c612d ARM: s3c6400_defconfig: Bring back lost (but wanted) options
The config was not updated for some time so it needs updates to get the
same options as wanted initially:
 - SYSFS_DEPRECATED is now needed for SYSFS_DEPRECATED_V2;
 - PWM is now needed for BACKLIGHT_PWM;
 - DEBUG_SPINLOCK_SLEEP was replaced by DEBUG_ATOMIC_SLEEP;

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
2017-06-10 19:30:04 +02:00
Krzysztof Kozlowski
930e438627 ARM: s3c2410_defconfig: Bring back lost (but wanted) options
The config was not updated for some time so it needs updates to get the
same options as wanted initially:
 - IP_NF_TARGET_LOG was replaced by NETFILTER_XT_TARGET_LOG;
 - NF_NAT was replaced by IP_NF_NAT;
 - SERIAL_DEV_BUS is now needed for BT_HCIUART_LL;
 - TPS65010 is now needed for MACH_OSIRIS_DVS;
 - DMADEVICES and S3C24XX_DMAC are now needed for MMC_S3C;

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
2017-06-10 19:30:02 +02:00
Krzysztof Kozlowski
dd48d06b37 ARM: tct_hammer_defconfig: Bring back lost (but wanted) options
The config was not updated for some time so it needs updates to get the
same options as wanted initially:
 - SYSFS_DEPRECATED is now needed for SYSFS_DEPRECATED_V2;
 - USB_GADGET_S3C2410 was replaced by USB_S3C2410;

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
2017-06-10 19:29:59 +02:00
Krzysztof Kozlowski
c5f6fc4149 ARM: mini2440_defconfig: Bring back lost (but wanted) options
The config was not updated for some time so it needs updates to get the
same options as wanted initially:
 - SERIAL_DEV_BUS is now needed for BT_HCIUART_LL;
 - USB_GADGET_S3C2410 was replaced by USB_S3C2410;
 - S3C24XX_DMAC is now needed for MMC_S3C;

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
2017-06-10 19:29:56 +02:00
Krzysztof Kozlowski
2a7ae1c049 ARM: defconfig: samsung: Re-order entries to match savedefconfig
Re-order entries just like savedefconfig would do so it will be easier
to review the changes before actual savedefconfig.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
2017-06-10 19:29:53 +02:00
Krzysztof Kozlowski
bd5f62605f ARM: defconfig: Cleanup from old Kconfig options
Remove old, dead Kconfig options (in order appearing in this commit):
 - EXPERIMENTAL is gone since v3.9;
 - INET_LRO: commit 7bbf3cae65 ("ipv4: Remove inet_lro library");
 - MTD_CONCAT: commit f53fdebcc3 ("mtd: drop MTD_CONCAT from Kconfig entirely");
 - MTD_PARTITIONS: commit 6a8a98b22b ("mtd: kill CONFIG_MTD_PARTITIONS");
 - MTD_CHAR: commit 660685d9d1 ("mtd: merge mtdchar module with mtdcore");
 - NETDEV_1000 and NETDEV_10000: commit f860b0522f ("drivers/net:
   Kconfig and Makefile cleanup"); NET_ETHERNET should be replaced with
   just ETHERNET but that is separate change;
 - INOTIFY: commit 2dfc1cae4c ("inotify: remove inotify in kernel interface");
 - MISC_DEVICES: commit 7c5763b845 ("drivers: misc: Remove
   MISC_DEVICES config option");
 - HID_SUPPORT: commit 1f41a6a994 ("HID: Fix the generic Kconfig options");
 - BT_L2CAP and BT_SCO: commit f1e91e1640 ("Bluetooth: Always compile
   SCO and L2CAP in Bluetooth Core");
 - DEBUG_ERRORS: commit b025a3f836 ("ARM: 6876/1: Kconfig.debug:
   Remove unused CONFIG_DEBUG_ERRORS");
 - USB_DEVICE_CLASS: commit 007bab9132 ("USB: remove CONFIG_USB_DEVICE_CLASS");
 - RCU_CPU_STALL_DETECTOR: commit a00e0d714f ("rcu: Remove conditional
   compilation for RCU CPU stall warnings");
 - SYSCTL_SYSCALL_CHECK: commit 7c60c48f58 ("sysctl: Improve the
   sysctl sanity checks");
 - IP_NF_QUEUE: commit 3dd6664fac ("netfilter: remove unused "config IP_NF_QUEUE"");
 - IP_NF_TARGET_ULOG: commit d4da843e6f ("netfilter: kill remnants of ulog targets");
 - IP6_NF_QUEUE: commit d16cf20e2f ("netfilter: remove ip_queue support");
 - IP6_NF_TARGET_LOG: commit 6939c33a75 ("netfilter: merge ipt_LOG and
   ip6_LOG into xt_LOG");
 - USB_LED: commit a335aaf312 ("usb: misc: remove outdated USB LED driver");
 - MMC_UNSAFE_RESUME: commit 2501c9179d ("mmc: core: Use
   MMC_UNSAFE_RESUME as default behavior");
 - AUTOFS_FS: commit 561c5cf923 ("staging: Remove autofs3");
 - DISPLAY_SUPPORT: commit 5a6b5e02d6 ("fbdev: remove display subsystem");
 - CFG80211_REG_DEBUG: commit c799ba6eab ("cfg80211: remove
   CFG80211_REG_DEBUG");
 - VIDEO_OUTPUT_CONTROL: commit f167a64e9d ("video / output: Drop
   display output class support");
 - USB_LIBUSUAL: commit f61870ee6f ("usb: remove libusual");
 - CRYPTO_ZLIB: commit 110492183c ("crypto: compress - remove unused
   pcomp interface");
 - BLK_DEV_UB: commit 68a5059ecf ("block: remove the deprecated ub driver");

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
[for vexpress]
Acked-by: Liviu Dudau <liviu.dudau@arm.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
2017-06-10 19:28:57 +02:00
Greg Kroah-Hartman
1b8b02f0d0 arm: ecard: fix dev_groups patch typo
Commit 71d1e5d71c ("arm: ecard: use dev_groups and not dev_attrs for bus_type")
had a typo in the resource attribute definition.  Fix that up.

Reported-by: kbuild test robot <fengguang.wu@intel.com>
Fixes: 71d1e5d71c ("arm: ecard: use dev_groups and not dev_attrs for bus_type")
Cc: Russell King <linux@armlinux.org.uk>
Cc: <linux-arm-kernel@lists.infradead.org>
Signed-off-by: Greg Kroah-Hartman gregkh@linuxfoundation.org
2017-06-10 14:31:21 +02:00
Chen-Yu Tsai
7a78ef92cd ARM: sun8i: h3: Enable EMAC with external PHY on Orange Pi Plus 2E
The Orange Pi Plus 2E, unlike the Orange Pi PC and PC Plus which its
schematics are based on, uses an external Realtek RTL8211E PHY in
RGMII mode, with a GPIO enabling the regulator for I/O signalling
power supplies. The PHY's main power supply is enabled by the main
5V power supply.

Add the regulator and PHY nodes, and override the PHY phandle under
the EMAC node, so that the EMAC works properly on this board.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-06-10 11:24:39 +02:00
Linus Torvalds
179145e631 IOMMU Fixes for Linux v4.12-rc4
Including:
 
 	* Another compile-fix for my header cleanup
 
 	* A couple of fixes for the recently merged IOMMU probe
 	  deferal code
 
 	* Includes fixes for ACPI/IORT code necessary with
 	  IOMMU probe deferal
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v2
 
 iQIcBAABAgAGBQJZOyKuAAoJECvwRC2XARrjb1EP/iM+5lHWikgAZ7dbH+3oS3hE
 6tkevfr2+6SikuJp4rITtIXWDK3nSO/2kXbt6LqCVTFKuiszEHO1BDAep0ytIPzE
 63m8INBpSm+bs4QhdQUR5f8Ab8uFh/SPozZlxq3mxMf5QARvbbWeAiMH/iTl/HD7
 XlywryI9SD7fGHkdVWApCtUH6AoYv33c9jg9a/+7RngOjv3gvI0hHr4Omt0udf+8
 udS0WGNjsJy9HqtIzaaRCCe4rWqsgLzi9iCFe856P+smD9g9BoH2VgePbOzeOI4r
 IMnEcGBExFuEpx67lDseHYqg6R79lzlE/C1SyzcCOEbvvjMUL+/nqm+AjEMa5++w
 wL0gyiAZrUZjFhsr4QjQESsUDqlB7K7YHfLNLxwlC8vg9/4V7StoeOWhE+YVROLz
 1+MJ2Kv5wlZRN/B6wKCCRSAGnuMT02xXWxNRKfS7+sHPT8eJVWBEo6K+0WNGTkhq
 oFJCggBBllmlegt/IOKTe6jLzKN95UHz0NSoMoj1LIqCZOMFTPJwkV5976oPy0Ba
 uAoH5uJpai2yRIE15mHB23Bkc1SBE3pm7VC/4NeT4i7pyb8hnb4QwhmSD1vd7J+E
 ZApOSoptDWSF9al6LXzEZTjCMF85fY/JsG3+jdqY6zCacUK795gcyUZ/3al5+F4E
 r50a/SvSp90AxrZZcpT7
 =6dZB
 -----END PGP SIGNATURE-----

Merge tag 'iommu-fixes-v4.12-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu

Pull IOMMU fixes from Joerg Roedel:

 - another compile-fix for my header cleanup

 - a couple of fixes for the recently merged IOMMU probe deferal code

 - fixes for ACPI/IORT code necessary with IOMMU probe deferal

* tag 'iommu-fixes-v4.12-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu:
  arm: dma-mapping: Reset the device's dma_ops
  ACPI/IORT: Move the check to get iommu_ops from translated fwspec
  ARM: dma-mapping: Don't tear down third-party mappings
  ACPI/IORT: Ignore all errors except EPROBE_DEFER
  iommu/of: Ignore all errors except EPROBE_DEFER
  iommu/of: Fix check for returning EPROBE_DEFER
  iommu/dma: Fix function declaration
2017-06-09 22:30:55 -07:00
Martin Blumenstingl
2c323c43a3 ARM: dts: meson8: add and use the real clock controller
This removes the dummy clk81 gate and replaces it with the actual clock
controller's CLKID_CLK81. This will also allow us to pass the real clock
IDs to all devices where the clock is controlled by clkc in the future.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Acked-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2017-06-09 11:21:21 -07:00
Martin Blumenstingl
2dda2de5a1 arm: meson: select the clock controller for Meson8
Select COMMON_CLK_MESON8B also for MACH_MESON8 since the Meson8b clock
controller driver can also be used on Meson8 SoCs now that we have a
separate compatible for it.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Acked-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2017-06-09 11:15:36 -07:00
Linus Torvalds
788a73f4e5 ARM: SoC fixes
Been sitting on these for a couple of weeks waiting on some larger batches
 to come in but it's been pretty quiet.
 
 Just your garden variety fixes here:
 
  - A few maintainers updates (ep93xx, Exynos, TI, Marvell)
  - Some PM fixes for Atmel/at91 and Marvell
  - A few DT fixes for Marvell, Versatile, TI Keystone, bcm283x
  - A reset driver patch to set module license for symbol access
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJZN343AAoJEIwa5zzehBx3xJ0QAJSexz+rYI7V3aqvjtNmdEaE
 2l7Rl4dNQ13u7RBx+67/m1vAgxTgefXahckuv6x4Jr5S5sQO++OkTm0XBO1+3trY
 pwQVJYatOwDt5X7+HOKmTvCgFh48KyrNegXy1lvr/p77CyA+B61zQ2w9wqO0VXua
 MQ05HzOt2JroKytPz70MywxtQpULWC8FGZTFbzZqUfdS30HxM4ZXp6gKxMDvRAqh
 LpP2hfjCnM0H3QoeNXYsfSydI0T0J0PcavouUzGQk2XSA6k5g+MXpL1IUB+iN9EH
 UdmEiVhDcNB3upWQ0lPFi84sexDXSqcu6M9VIozdC/LYDD1lGnHBEZuagoq72/xA
 CEU3H81inCQ6cpYRgan7uzlA4+dqKf4HD3H1fkwrowblMQppWPeDe9e/5XAq73Xl
 4+5GxXtDhK1KvPaH3USkTnFOjEQ2QELmDxdLqmiTXP8GnXdn5wJTobUj7z6HttXY
 Q4jA7F/A8ObHbEbnZI9e8pmrnQeMd/cK47NCZTBkJgN2eIzPw/TJk/bQcIXAq/km
 HcVn5R8GbrN9DwJMpMQN9fpH3sXCmcUxujbfldTYGdsBo8rvXChs8DHxJF94FXOV
 rMO6Bb25bd7kN8oCvY3r7VeGavpSkO8WVWi3YnNW4KGF9/oGE24LGHdbChjoLyJH
 rvv3uVsXtx2A9O9uGYl1
 =WlSc
 -----END PGP SIGNATURE-----

Merge tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC fixes from Olof Johansson:
 "Been sitting on these for a couple of weeks waiting on some larger
  batches to come in but it's been pretty quiet.

  Just your garden variety fixes here:

   - A few maintainers updates (ep93xx, Exynos, TI, Marvell)
   - Some PM fixes for Atmel/at91 and Marvell
   - A few DT fixes for Marvell, Versatile, TI Keystone, bcm283x
   - A reset driver patch to set module license for symbol access"

* tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
  MAINTAINERS: EP93XX: Update maintainership
  MAINTAINERS: remove kernel@stlinux.com obsolete mailing list
  ARM: dts: versatile: use #include "..." to include local DT
  MAINTAINERS: add device-tree files to TI DaVinci entry
  ARM: at91: select CONFIG_ARM_CPU_SUSPEND
  ARM: dts: keystone-k2l: fix broken Ethernet due to disabled OSR
  arm64: defconfig: enable some core options for 64bit Rockchip socs
  arm64: marvell: dts: fix interrupts in 7k/8k crypto nodes
  reset: hi6220: Set module license so that it can be loaded
  MAINTAINERS: add irqchip related drivers to Marvell EBU maintainers
  MAINTAINERS: sort F entries for Marvell EBU maintainers
  ARM: davinci: PM: Do not free useful resources in normal path in 'davinci_pm_init'
  ARM: davinci: PM: Free resources in error handling path in 'davinci_pm_init'
  ARM: dts: bcm283x: Reserve first page for firmware
  memory: atmel-ebi: mark PM ops as __maybe_unused
  MAINTAINERS: Remove Javier Martinez Canillas as reviewer for Exynos
2017-06-09 09:40:08 -07:00
Javier Martinez Canillas
73f9de0c7f ARM: dts: uniphier: Add generic compatible string for I2C EEPROM
The at24 driver allows to register I2C EEPROM chips using different vendor
and devices, but the I2C subsystem does not take the vendor into account
when matching using the I2C table since it only has device entries.

But when matching using an OF table, both the vendor and device has to be
taken into account so the driver defines only a set of compatible strings
using the "atmel" vendor as a generic fallback for compatible I2C devices.

So add this generic fallback to the device node compatible string to make
the device to match the driver using the OF device ID table.

Signed-off-by: Javier Martinez Canillas <javier@dowhile0.org>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-06-10 01:10:41 +09:00
Patrice Chotard
4370746458 ARM: dts: stm32: Add stm32h743i-disco board
Add basic support for stm32h743i-discovery board

This board offers :
  _ 2MBytes Flash
  _ 1 x micro USB OTG port
  _ 1 x STLink connector (micro USB)
  _ 1 x micro SD card slot
  _ 1 x RJ45 connector
  _ 1 x RCA connector
  _ 2 x Audio jack connectors (in and out)
  _ 2 x speaker connectors (left and right)
  _ 1 x joystick
  _ 1 x DCMI connector (Digital camera interface)
  _ 1 x 4 inch DSI LCD (Display Serial Interface)
  _ Arduino Uno Connectors
  _ 2 x PIO connectors (PMOD and PMOD+)
  _ 1 x wakeup button
  _ 1 x reset button

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
2017-06-09 16:38:42 +02:00
Patrice Chotard
a56678cd57 ARM: dts: stm32: Add usart2 support on stm32h743
This usart is used for console output on stm32h743i-disco board

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
2017-06-09 16:38:38 +02:00
Patrice Chotard
13b23780cc ARM: dts: stm32: Add usart2_pins on stm32h743
Add usart2 pins definition in order to add usart2 support
dedicated for console output on stm32h743i-disco board.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
2017-06-09 16:38:31 +02:00
Chen-Yu Tsai
694ca10ca0 ARM: sun8i: a83t: Add device node for R_PIO
The A83T has 1 pingroup with 13 pins belonging to the R_PIO
or special pin controller.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2017-06-09 20:22:50 +08:00
Greg Kroah-Hartman
71d1e5d71c arm: ecard: use dev_groups and not dev_attrs for bus_type
The dev_attrs field has long been "depreciated" and is finally being
removed, so move the driver to use the "correct" dev_groups field
instead for struct bus_type.

Cc: Russell King <linux@armlinux.org.uk>
Cc: <linux-arm-kernel@lists.infradead.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-06-09 11:00:45 +02:00
Arnd Bergmann
9cc91f2121 xen: avoid type warning in xchg_xen_ulong
The improved type-checking version of container_of() triggers a warning for
xchg_xen_ulong, pointing out that 'xen_ulong_t' is unsigned, but atomic64_t
contains a signed value:

drivers/xen/events/events_2l.c: In function 'evtchn_2l_handle_events':
drivers/xen/events/events_2l.c:187:1020: error: call to '__compiletime_assert_187' declared with attribute error: pointer type mismatch in container_of()

This adds a cast to work around the warning.

Cc: Ian Abbott <abbotti@mev.co.uk>
Fixes: 85323a991d ("xen: arm: mandate EABI and use generic atomic operations.")
Fixes: daa2ac80834d ("kernel.h: handle pointers to arrays better in container_of()")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Stefano Stabellini <sstabellini@kernel.org>
Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
Acked-by: Ian Abbott <abbotti@mev.co.uk>
2017-06-08 15:07:38 -07:00
Baruch Siach
bc03ce0839 ARM: dts: at91: sama5d2_xplained: remove wrong memory node
The size field of the memory node is wrong. Rely on the default value in
sama5d2.dtsi that happens to be correct for the SAMA5D2 Xplained board.

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
2017-06-08 23:49:17 +02:00
Christoffer Dall
99a1db7a2c KVM: arm/arm64: Allow setting the timer IRQ numbers from userspace
First we define an ABI using the vcpu devices that lets userspace set
the interrupt numbers for the various timers on both the 32-bit and
64-bit KVM/ARM implementations.

Second, we add the definitions for the groups and attributes introduced
by the above ABI.  (We add the PMU define on the 32-bit side as well for
symmetry and it may get used some day.)

Third, we set up the arch-specific vcpu device operation handlers to
call into the timer code for anything related to the
KVM_ARM_VCPU_TIMER_CTRL group.

Fourth, we implement support for getting and setting the timer interrupt
numbers using the above defined ABI in the arch timer code.

Fifth, we introduce error checking upon enabling the arch timer (which
is called when first running a VCPU) to check that all VCPUs are
configured to use the same PPI for the timer (as mandated by the
architecture) and that the virtual and physical timers are not
configured to use the same IRQ number.

Signed-off-by: Christoffer Dall <cdall@linaro.org>
Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>
2017-06-08 16:59:57 +02:00
Christoffer Dall
85e69ad7f2 KVM: arm/arm64: Move timer IRQ default init to arch_timer.c
We currently initialize the arch timer IRQ numbers from the reset code,
presumably because we once intended to model multiple CPU or SoC types
from within the kernel and have hard-coded reset values in the reset
code.

As we are moving towards userspace being in charge of more fine-grained
CPU emulation and stitching together the pieces needed to emulate a
particular type of CPU, we should no longer have a tight coupling
between resetting a VCPU and setting IRQ numbers.

Therefore, move the logic to define and use the default IRQ numbers to
the timer code and set the IRQ number immediately when creating the
VCPU.

Signed-off-by: Christoffer Dall <cdall@linaro.org>
Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>
2017-06-08 16:59:56 +02:00
Christoffer Dall
2227e43930 KVM: arm: Handle VCPU device attributes in guest.c
As we are about to support VCPU attributes to set the timer IRQ numbers
in guest.c, move the static inlines for the VCPU attributes handlers
from the header file to guest.c.

Signed-off-by: Christoffer Dall <cdall@linaro.org>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
2017-06-08 16:59:55 +02:00
Geert Uytterhoeven
13132b3f44 ARM: dts: armadillo800eva: Split LCD mux and gpio
Configuration of the lcd0 pinmux group and GPIO hog for the external
GPIO mux are done using a single device node, causing the "output-high"
property to be applied to both.  This will fail for the pinmux group,
but doesn't cause any harm, as the failure is ignored silently.

However, after "pinctrl: sh-pfc: propagate errors on group config", the
failure will become fatal, leading to a broken display:

    sh-pfc e6050000.pin-controller: pin_config_group_set op failed for group 102
    sh-pfc e6050000.pin-controller: Error applying setting, reverse things back
    sh-pfc e6050000.pin-controller: failed to select default state

Move the GPIO hog to its own node to fix this.

Fixes: ffd2f9a5af ("ARM: shmobile: armadillo800eva dts: Add pinctrl and gpio-hog for lcdc0")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-06-08 15:44:55 +02:00
Paolo Bonzini
38a4f43d56 KVM/ARM Fixes for v4.12-rc5 - Take 2
Changes include:
  - Fix an issue with migrating GICv2 VMs on GICv3 systems.
  - Squashed a bug for gicv3 when figuring out preemption levels.
  - Fix a potential null pointer derefence in KVM happening under memory
    pressure.
  - Maintain RES1 bits in the SCTLR_EL2 to make sure KVM works on new
    architecture revisions.
  - Allow unaligned accesses at EL2/HYP
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQEcBAABAgAGBQJZODC6AAoJEEtpOizt6ddy7qsH/RakZzHHlPcIFk+VPhK4AvIV
 ke6y1IznIVVv024geILb2NyF2pZoSUROxk1NF0wBIWM4ryjPm7oYgK7TTLyxkiX0
 00gNxWpRRerCSxfh11a28tQywc7ATlw0yFpogGvbbHG9qEMX1NaGP/CNFK5us0LT
 dw3y7jIZounlHlHu0W85AE27Osn5anFPHQnEtvJlUsM7WkIQf765EIfttXGUKRDZ
 szmwuFAhdsSeIfo23LNXj87WAn6uP/37qRUmNXnxSya4u5urXa4qlOM5Hvg6agw2
 K6LdpDXF/FnHhiT+b/xMTRPPivy4rXJZTpP51shl5GqKE2gI0tbhsHwJJ5Di/Aw=
 =3xSf
 -----END PGP SIGNATURE-----

Merge tag 'kvm-arm-for-v4.12-rc5-take2' of git://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm into HEAD

KVM/ARM Fixes for v4.12-rc5 - Take 2

Changes include:
 - Fix an issue with migrating GICv2 VMs on GICv3 systems.
 - Squashed a bug for gicv3 when figuring out preemption levels.
 - Fix a potential null pointer derefence in KVM happening under memory
   pressure.
 - Maintain RES1 bits in the SCTLR_EL2 to make sure KVM works on new
   architecture revisions.
 - Allow unaligned accesses at EL2/HYP
2017-06-08 15:04:38 +02:00
Hugues Fruchet
d81cd7d72f ARM: configs: stm32: STMPE1600 GPIO expander
Enable STMPE1600 GPIO expander.

Signed-off-by: Hugues Fruchet <hugues.fruchet@st.com>
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
2017-06-08 14:59:05 +02:00
Yannick Fertre
1800e6dd2c ARM: configs: stm32: Add watchdog support in STM32 defconfig
This patch adds STM32 watchdog support in stm32_defconfig file

Signed-off-by: Yannick Fertre <yannick.fertre@st.com>
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
2017-06-08 14:52:13 +02:00
Tony Lindgren
0e78b1218d ARM: OMAP2+: Remove unused legacy code for n8x0
We are now booting all mach-omap2 in device tree only mode.
Any code that is only called in legacy boot mode where
of_have_populated_dt() is not set is safe to remove now.

Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
[tony@atomide.com: left out probe changes to avoid merge conflict]
Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-06-08 04:15:10 -07:00
Tony Lindgren
279ebec8f4 ARM: OMAP2+: Remove unused legacy code for watchdog
We are now booting all mach-omap2 in device tree only mode.
Any code that is only called in legacy boot mode where
of_have_populated_dt() is not set is safe to remove now.

Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-06-08 04:15:10 -07:00
Tony Lindgren
1aa8f0cb19 ARM: OMAP2+: Remove unused legacy code for interconnects
We are now booting all mach-omap2 in device tree only mode.
Any code that is only called in legacy boot mode where
of_have_populated_dt() is not set is safe to remove now.

Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-06-08 04:15:10 -07:00
Tony Lindgren
2a26d31b1b ARM: OMAP2+: Remove unused legacy code for PRM
We are now booting all mach-omap2 in device tree only mode.
Any code that is only called in legacy boot mode where
of_have_populated_dt() is not set is safe to remove now.

Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-06-08 04:15:10 -07:00
Tony Lindgren
58a641c827 ARM: OMAP2+: Remove unused legacy code for io.c
We are now booting all mach-omap2 in device tree only mode.
Any code that is only called in legacy boot mode where
of_have_populated_dt() is not set is safe to remove now.

Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-06-08 04:15:10 -07:00
Tony Lindgren
48f6693790 ARM: OMAP2+: Remove unused legacy code for McBSP
We are now booting all mach-omap2 in device tree only mode.
Any code that is only called in legacy boot mode where
of_have_populated_dt() is not set is safe to remove now.

Acked-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-06-08 04:15:10 -07:00
Markus Elfring
c76e4d2e50 ARM: OMAP2+: SmartReflex: Delete an error message for a failed memory allocation in two functions
Omit an extra message for a memory allocation failure in these functions.

This issue was detected by using the Coccinelle software.

Link: http://events.linuxfoundation.org/sites/events/files/slides/LCJ16-Refactor_Strings-WSang_0.pdf
Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-06-08 03:02:32 -07:00
Markus Elfring
6b72de4d33 ARM: OMAP2+: Use kcalloc() in sr_set_nvalues()
* A multiplication for the size determination of a memory allocation
  indicated that an array data structure should be processed.
  Thus use the corresponding function "kcalloc".

  This issue was detected by using the Coccinelle software.

* Replace the specification of a data structure by a pointer dereference
  to make the corresponding size determination a bit safer according to
  the Linux coding style convention.

Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-06-08 03:02:31 -07:00
Markus Elfring
1dfb5b59d6 ARM: OMAP2+: Improve a size determination in sr_dev_init()
Replace the specification of a data structure by a pointer dereference
as the parameter for the operator "sizeof" to make the corresponding size
determination a bit safer according to the Linux coding style convention.

Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-06-08 03:02:31 -07:00
Markus Elfring
1a61a2a5a6 ARM: OMAP2+: Delete an error message for a failed memory allocation in two functions
Omit an extra message for a memory allocation failure in these functions.

This issue was detected by using the Coccinelle software.

Link: http://events.linuxfoundation.org/sites/events/files/slides/LCJ16-Refactor_Strings-WSang_0.pdf
Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-06-08 03:02:31 -07:00
Tony Lindgren
6f3ab009a1 ARM: OMAP2+: Remove unused legacy code for device init
We are now booting all mach-omap2 in device tree only mode.
Any code that is only called in legacy boot mode where
of_have_populated_dt() is not set is safe to remove now.

Note that omap_init_sti() won't do anything so we can
remove omap2_init_devices() as pointed out by Sebastian
Reichel <sebastian.reichel@collabora.co.uk>.

Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-06-08 02:57:38 -07:00
Tony Lindgren
7bd6934477 ARM: OMAP2+: Remove unused legacy code for PMU
We are now booting all mach-omap2 in device tree only mode.
Any code that is only called in legacy boot mode where
of_have_populated_dt() is not set is safe to remove now.

Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-06-08 02:57:27 -07:00
Tony Lindgren
99b3587deb ARM: OMAP2+: Remove unused legacy code for opp
We are now booting all mach-omap2 in device tree only mode.
Any code that is only called in legacy boot mode where
of_have_populated_dt() is not set is safe to remove now.

Note that the volt_data is still being used.

Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-06-08 02:57:16 -07:00
Krzysztof Kozlowski
c92a4fb249 ARM: dts: exynos: Use human-friendly symbols for GIC interrupt properties
Replace hard-coded values of type of GIC interrupt and its flags with
respective macros from header to increase code readability.

Suggested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2017-06-07 20:56:06 +02:00
Krzysztof Kozlowski
6ff0b90d74 ARM: dts: exynos: Use human-friendly symbols for interrupt flags in board sources
Replace hard-coded values of interrupt flags with respective macros from
header to increase code readability.

Suggested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2017-06-07 20:51:24 +02:00
Cosar Dindar
d699823493 ARM: dts: stm32: enable CRC32 on stm32429i-eval board
Enable the CRC32 crypto on stm32429i-eval board.

Signed-off-by: Cosar Dindar <cosardindar@gmail.com>
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
2017-06-07 17:48:38 +02:00
Cosar Dindar
58518a0547 ARM: dts: stm32: enable CRC32 on stm32429-disco board
Enable the CRC32 crypto on stm32429-disco board.

Signed-off-by: Cosar Dindar <cosardindar@gmail.com>
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
2017-06-07 17:46:12 +02:00
Cosar Dindar
a68883f1e2 ARM: dts: stm32: Add CRC support to stm32f429
Add CRC32 Crypto support to stm32f429.

Signed-off-by: Cosar Dindar <cosardindar@gmail.com>
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
2017-06-07 17:45:30 +02:00
Hugues Fruchet
13dd385740 ARM: dts: stm32: Enable OV2640 camera support of STM32F429-EVAL board
Enable OV2640 camera support of STM32F429-EVAL board.

Signed-off-by: Hugues Fruchet <hugues.fruchet@st.com>
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
2017-06-07 17:41:28 +02:00
Hugues Fruchet
c04b2e72af ARM: dts: stm32: Enable STMPE1600 gpio expander of STM32F429-EVAL board
Enable STMPE1600 gpio expander of STM32F429-EVAL board.

Signed-off-by: Hugues Fruchet <hugues.fruchet@st.com>
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
2017-06-07 17:40:31 +02:00
Hugues Fruchet
e8e16b7b29 ARM: dts: stm32: Enable DCMI camera interface on STM32F429-EVAL board
Enable DCMI camera interface on STM32F429-EVAL board.

Signed-off-by: Hugues Fruchet <hugues.fruchet@st.com>
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
2017-06-07 17:31:47 +02:00
Hugues Fruchet
ba7f0df089 ARM: dts: stm32: Enable DCMI support on STM32F429 MCU
Enable DCMI camera interface on STM32F429 MCU.

Signed-off-by: Hugues Fruchet <hugues.fruchet@st.com>
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
2017-06-07 17:30:48 +02:00
Lionel Debieve
aa8f42f7a1 ARM: dts: stm32: Add missing reset-cells node in stm32f746
rcc node must include reset-cells node.

Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
2017-06-07 16:50:42 +02:00
Alexandre TORGUE
5489d5dbb4 ARM: dts: stm32: Set gpio controller as interrupt controller on F4 and F7
This patch set each gpio controller as a interrupt controller. User who
wants to use gpio as interrupt will have choice to use either "gpiolib"
interface or "common" interrupt interface.

Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
2017-06-07 16:41:36 +02:00
Yannick Fertre
7bffbd2d42 ARM: dts: stm32: Add watchdog support for STM32F429 eval board
This patch adds watchdog support for STM32x9I-Eval board.

Signed-off-by: Yannick Fertre <yannick.fertre@st.com>
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
2017-06-07 15:40:05 +02:00
Yannick Fertre
e89960c5ae ARM: dts: stm32: Add watchdog support for STM32F429 SoC
Add watchdog into DT for stm32f429 family.

Signed-off-by: Yannick FERTRE <yannick.fertre@st.com>
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
2017-06-07 15:35:46 +02:00
Icenowy Zheng
21b2992093 ARM: sun8i: v3s: add device nodes for DE2 display pipeline
Allwinner V3s SoC features a "Display Engine 2.0" with only one mixer
and only one TCON connected to this mixer, which have RGB LCD output.

Add device nodes for this display pipeline.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-06-07 15:27:37 +02:00
Antoine Tenart
9bea19aac3 ARM: dts: sunxi: add SoC specific compatibles for the crypto nodes
Add SoC specific compatibles for all sunXi crypto nodes, in addition to
the one already used (allwinner,sun4i-a10-crypto).

Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-06-07 15:27:37 +02:00
Antoine Tenart
e1679f0921 ARM: sun5i: add a cryptographic engine node
Add a node for the cryptographic engine that can be found on sun5i SoCs.
This cryptographic engine is compatible with the Allwinner cryptographic
accelerator driver.

Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-06-07 15:27:37 +02:00
Yannick Fertre
85d95f7855 ARM: dts: stm32: Enable ltdc & simple panel on stm32f429-Eval board
Enable ltdc & enable am-480272h3tmqw-t01h panel.

Signed-off-by: Yannick Fertre <yannick.fertre@st.com>
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
2017-06-07 15:21:05 +02:00
Yannick Fertre
bcb49099cf ARM: dts: stm32: Add ltdc support on stm32f429 MCU
Add LTDC (Lcd-tft Display Controller) support.

Signed-off-by: Yannick Fertre <yannick.fertre@st.com>
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
2017-06-07 14:58:44 +02:00
Vikas Manocha
f44848b6f7 ARM: dts: stm32: add stm32f769I & stm32f746 discovery board support
Stm32f769I & stm32f746 are MCUs of stm32f7 family. Here are the major
specs of the two boards:

stm32f769I discovery board:
	- Cortex-M7 core @216MHz
	- 2MB mcu internal flash
	- 512KB internal sram
	- 16MB sdram memory
	- 64MB qspi flash memory
	- 4 inch wvga LCD-TFT Display

stm32f746 discovery board:
	- Cortex-M7 core @216MHz
	- 1MB mcu internal flash
	- 320KB internal sram
	- 8MB sdram memory
	- 16MB qspi flash memory
	- 4.3 inch 480x272 LCD-TFT display

Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
2017-06-07 14:28:54 +02:00
Garlic Tseng
aac5e972d4 arm: dts: mediatek: Add audio driver node for MT2701
Add audio driver node for mt2701

Signed-off-by: Garlic Tseng <garlic.tseng@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2017-06-07 10:47:25 +02:00
Markus Elfring
764e4ef0a8 ARM: OMAP1: Fix a typo in a comment line
Adjust a line in this description for the software module.

Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-06-06 23:54:13 -07:00
Markus Elfring
a9e317c388 ARM: OMAP1: Delete an error message for a failed memory allocation in omap1_dm_timer_init()
Omit an extra message for a memory allocation failure in this function.

This issue was detected by using the Coccinelle software.

Link: http://events.linuxfoundation.org/sites/events/files/slides/LCJ16-Refactor_Strings-WSang_0.pdf
Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-06-06 23:54:07 -07:00
Markus Elfring
2abe5b343d ARM: OMAP1: DMA: Delete an unnecessary return statement in omap1_show_dma_caps()
The script "checkpatch.pl" pointed information out like the following.

WARNING: void function return statements are not generally useful

Thus remove such a statement in the affected function.

Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-06-06 23:54:00 -07:00
Markus Elfring
61ee221ee4 ARM: OMAP1: DMA: Delete an error message for a failed memory allocation in omap1_system_dma_init()
Omit an extra message for a memory allocation failure in this function.

This issue was detected by using the Coccinelle software.

Link: http://events.linuxfoundation.org/sites/events/files/slides/LCJ16-Refactor_Strings-WSang_0.pdf
Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-06-06 23:53:55 -07:00
Markus Elfring
d27a30bbc8 ARM: OMAP1: DMA: Improve a size determination in omap1_system_dma_init()
Replace the specification of a data structure by a pointer dereference
as the parameter for the operator "sizeof" to make the corresponding size
determination a bit safer according to the Linux coding style convention.

Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-06-06 23:53:49 -07:00
Leonard Crestez
bf5a01d7c5 ARM: imx6ull: Make suspend/resume work like on 6ul
Suspend and resume on imx6ull is currenty not working because of some
missed checks where behavior should match imx6ul.

Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-06-07 11:38:40 +08:00
Leonard Crestez
b3ea575770 ARM: imx: Add MXC_CPU_IMX6ULL and cpu_is_imx6ull
Support for imx6ull is already present but it's based on
of_machine_is_compatible("fsl,imx6ull") checks. Add it to the MXC_CPU_*
enumeration as well.

This also fixes /sys/devices/soc0/soc_id reading "Unknown".

Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-06-07 11:38:15 +08:00
Fabio Estevam
cc20028f68 ARM: dts: imx6: Fix PCI GPIO reset polarity
The imx6 PCI driver ignores the GPIO polarity from 'reset-gpio' and
considers that the PCI reset is active low, unless the
property 'reset-gpio-active-high' is present.

Fix the device tree description by explicitly passing the
'GPIO_ACTIVE_LOW' flag to the 'reset-gpio' property.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-06-07 11:36:44 +08:00
Linus Torvalds
b29794ec95 Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net
Pull networking fixes from David Miller:

 1) Made TCP congestion control documentation match current reality,
    from Anmol Sarma.

 2) Various build warning and failure fixes from Arnd Bergmann.

 3) Fix SKB list leak in ipv6_gso_segment().

 4) Use after free in ravb driver, from Eugeniu Rosca.

 5) Don't use udp_poll() in ping protocol driver, from Eric Dumazet.

 6) Don't crash in PCI error recovery of cxgb4 driver, from Guilherme
    Piccoli.

 7) _SRC_NAT_DONE_BIT needs to be cleared using atomics, from Liping
    Zhang.

 8) Use after free in vxlan deletion, from Mark Bloch.

 9) Fix ordering of NAPI poll enabled in ethoc driver, from Max
    Filippov.

10) Fix stmmac hangs with TSO, from Niklas Cassel.

11) Fix crash in CALIPSO ipv6, from Richard Haines.

12) Clear nh_flags properly on mpls link up. From Roopa Prabhu.

13) Fix regression in sk_err socket error queue handling, noticed by
    ping applications. From Soheil Hassas Yeganeh.

14) Update mlx4/mlx5 MAINTAINERS information.

* git://git.kernel.org/pub/scm/linux/kernel/git/davem/net: (78 commits)
  net: stmmac: fix a broken u32 less than zero check
  net: stmmac: fix completely hung TX when using TSO
  net: ethoc: enable NAPI before poll may be scheduled
  net: bridge: fix a null pointer dereference in br_afspec
  ravb: Fix use-after-free on `ifconfig eth0 down`
  net/ipv6: Fix CALIPSO causing GPF with datagram support
  net: stmmac: ensure jumbo_frm error return is correctly checked for -ve value
  Revert "sit: reload iphdr in ipip6_rcv"
  i40e/i40evf: proper update of the page_offset field
  i40e: Fix state flags for bit set and clean operations of PF
  iwlwifi: fix host command memory leaks
  iwlwifi: fix min API version for 7265D, 3168, 8000 and 8265
  iwlwifi: mvm: clear new beacon command template struct
  iwlwifi: mvm: don't fail when removing a key from an inexisting sta
  iwlwifi: pcie: only use d0i3 in suspend/resume if system_pm is set to d0i3
  iwlwifi: mvm: fix firmware debug restart recording
  iwlwifi: tt: move ucode_loaded check under mutex
  iwlwifi: mvm: support ibss in dqa mode
  iwlwifi: mvm: Fix command queue number on d0i3 flow
  iwlwifi: mvm: rs: start using LQ command color
  ...
2017-06-06 14:30:17 -07:00
Marc Zyngier
33b5c38852 arm: KVM: Allow unaligned accesses at HYP
We currently have the HSCTLR.A bit set, trapping unaligned accesses
at HYP, but we're not really prepared to deal with it.

Since the rest of the kernel is pretty happy about that, let's follow
its example and set HSCTLR.A to zero. Modern CPUs don't really care.

Cc: stable@vger.kernel.org
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <cdall@linaro.org>
2017-06-06 22:20:02 +02:00
Corentin Labbe
252006cf0d arm: sun8i: orangepi-zero: Enable dwmac-sun8i
The dwmac-sun8i hardware is present on the Orange PI Zero.
It uses the internal PHY.

This patch create the needed emac node.

Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-06-06 20:09:29 +02:00
Corentin Labbe
8c7ba536e7 ARM: sun8i: bananapi-m2-plus: Enable dwmac-sun8i
The dwmac-sun8i hardware is present on the Banana Pi M2+
It uses an external PHY rtl8211e via RGMII.

This patch create the needed regulator, emac and phy nodes.

Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-06-06 20:06:38 +02:00
Corentin Labbe
1dcd009501 ARM: sun8i: orangepi-plus: Enable dwmac-sun8i
The dwmac-sun8i hardware is present on the Orange PI plus.
It uses an external PHY rtl8211e via RGMII.

This patch create the needed regulator, emac and phy nodes.

Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-06-06 20:06:30 +02:00
Corentin Labbe
378af662f8 arm: sun8i: nanopi-neo: Enable dwmac-sun8i
The dwmac-sun8i hardware is present on the NanoPi Neo.
It uses the internal PHY.
This patch create the needed emac node.

Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-06-06 20:06:25 +02:00
Corentin Labbe
75ee680cbd arm: sun8i: orangepi-pc-plus: Set EMAC activity LEDs to active high
On the Orange Pi PC Plus, the polarity of the LEDs on the RJ45 Ethernet
port were changed from active low to active high.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-06-06 20:06:19 +02:00
Corentin Labbe
a9992f2dd1 arm: sun8i: orangepi-2: Enable dwmac-sun8i
The dwmac-sun8i hardware is present on the Orange PI 2.
It uses the internal PHY.

This patch create the needed emac node.

Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-06-06 20:06:12 +02:00
Corentin Labbe
25b9c3f58d arm: sun8i: orangepi-one: Enable dwmac-sun8i
The dwmac-sun8i hardware is present on the Orange PI One.
It uses the internal PHY.

This patch create the needed emac node.

Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-06-06 20:06:03 +02:00
Corentin Labbe
d342cb6f01 arm: sun8i: orangepi-pc: Enable dwmac-sun8i
The dwmac-sun8i hardware is present on the Orange PI PC.
It uses the internal PHY.

This patch create the needed emac node.

Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-06-06 20:05:56 +02:00
Corentin Labbe
0eba511a3c arm: sun8i: sunxi-h3-h5: add dwmac-sun8i ethernet driver
The dwmac-sun8i is an ethernet MAC hardware that support 10/100/1000
speed.

This patch enable the dwmac-sun8i on Allwinner H3/H5 SoC Device-tree.
SoC H3/H5 have an internal PHY, so optionals syscon and ephy are set.

Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-06-06 20:05:03 +02:00
Corentin Labbe
d91d3daf5d arm: sun8i: sunxi-h3-h5: Add dt node for the syscon control module
This patch add the dt node for the syscon register present on the
Allwinner H3/H5

Only two register are present in this syscon and the only one useful is
the one dedicated to EMAC clock..

Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-06-06 20:05:01 +02:00
Chen-Yu Tsai
98d87eb566 ARM: sunxi: h3-h5: Convert R_CCU raw numbers to macros
Now that the R_CCU device tree binding headers have been merged, we
can convert the raw number references in the device trees to use the
defined macros.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-06-06 20:04:58 +02:00
Kevin Hilman
65878b126c ARM: dts: da850-evm: fix tca6416 for use with GPIO hogs
In order GPIOS from this controller to be used with the "gpio-hogs"
property, the tca6416 node has to properly labeled as a gpio-controller,
and use #gpio-cells.

With that, the SEL_A, SEL_B, SEL_C lines that are used to select VPIF
input can be configured using GPIO hogs.

As an example, example, the configuration below selects the analog video
input on the da850-evm UI board:

&tca6416 {
	 status = "okay";

	 sel_a {
		gpio-hog;
		gpios = <7 GPIO_ACTIVE_HIGH>;
		output-high;
		line-name = "ADC_ENn";
	 };
	 sel_b {
		gpio-hog;
		gpios = <6 GPIO_ACTIVE_HIGH>;
		output-high;
		line-name = "CAMERA_ENn";
	 };
	 sel_c {
		gpio-hog;
		gpios = <5 GPIO_ACTIVE_HIGH>;
		output-low;
		line-name = "VIDEO_IN_ENn";
	 };
};

Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2017-06-06 15:51:02 +05:30
Suniel Mahesh
de09eb52a1 arm: dts: am33xx: Remove redundant interrupt-parent property
Interrupt-parent property is defined in the root node as
"interrupt-parent = <&intc>". This interrupt-parent value becomes
the default for the system, so removed redundant "interrupt-parent"
property from mmc, mac, lcdc and tscadc nodes.

Signed-off-by: Suniel Mahesh <sunil.m@techveda.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-06-06 00:33:48 -07:00
Robert Nelson
7ff64afbc7 ARM: dts: bonegreen-wireless: add WL1835 Bluetooth device node
This adds the serial slave device for the WL1835 Bluetooth interface.

Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
CC: Ricardo Salveti <ricardo.salveti@linaro.org>
CC: Tony Lindgren <tony@atomide.com>
CC: Jason Kridner <jkridner@beagleboard.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-06-06 00:32:59 -07:00
Keerthy
d132a00088 ARM: dts: AM43XX: Remove min and max voltage values for dcdc3
dcdc3 supplies to DDR on AM43x series. When we set both
min and max values to the same value. The regulator framework
sets that particular voltage. This is bad as we are changing
the ddr voltage when executing from ddr. Hence remove the min and
max values. The ddr supply voltage shall be set from bootloader
when not executing from ddr and not while executing from kernel.

The previous discussion can be found here:

http://www.spinics.net/lists/devicetree/msg56399.html

Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-06-06 00:31:41 -07:00
Robert Nelson
accc55d9ba ARM: dts: Add am335x-boneblue
BeagleBone Blue is robotics-oriented version of the BeagleBone Black (BBB).

This board can be indentified by the BLAx value after A335BNLT (BBB)
in the at24 eeprom:
BLAx [aa 55 33 ee 41 33 33 35  42 4e 4c 54 42 4c 41 30 |.U3.A335BNLTBLA2|]

http://beagleboard.org/blue
https://github.com/beagleboard/beaglebone-blue

firmware: https://github.com/beagleboard/beaglebone-black-wireless/tree/master/firmware
wl18xx mac address: /proc/device-tree/ocp/ethernet@4a100000/slave@4a100200/mac-address

Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
CC: Jason Kridner <jkridner@beagleboard.org>
CC: Drew Fustini <drew@beagleboard.org>
Acked-by: Jason Kridner <jkridner@beagleboard.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-06-06 00:25:36 -07:00
Marek Belisko
2277795eb8 ARM: dts: twl4030: Add missing madc reference for bci subnode
The twl4030_charger driver expects an iio channel to detect the
presence of an AC charger by looking at VAC (madc channel 11).
This definition is missing in the device tree.

Signed-off-by: Marek Belisko <marek@goldelico.com>
Signed-off-by: Sebastian Reichel <sre@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-06-06 00:23:22 -07:00
Tero Kristo
70f05be321 ARM: OMAP2+: hwmod: populate clkctrl clocks for hwmods if available
If clkctrl clocks are available on a device, populate these automatically
to replace hwmod main_clk info. First, the patch parses all "ti,clkctrl"
compatible nodes and maps these against existing clockdomain data. Once
done, individual hwmod init routines can search for a clkctrl clock
handle based on the clockdomain info and the created mapping.

This patch also drops the obsolete "_mod_ck" search as the implementation
required for this was not accepted usptream.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-06-06 00:14:06 -07:00
Tero Kristo
308b4e381b ARM: OMAP4: cminst: add support for clkdm_xlate_address
This function gets the physical base address of a clockdomain.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-06-06 00:14:01 -07:00
Tero Kristo
0bf76e00e5 ARM: omap2+: clockdomain: add clkdm_xlate_address
This new function can be used to get the physical address of a
clockdomain. Required for mapping the clkctrl clocks under hwmod
without modification to DT data.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-06-06 00:13:56 -07:00
Tero Kristo
9012933671 ARM: OMAP2+: PRCM: store also physical addresses for instances
In some cases the physical address info is needed, so store this
under the existing cm*_base, prm_base and prcm_mpu_base variables.
These are converted now to structs that contain both virtual and
physical address base for the instance.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-06-06 00:13:51 -07:00
Tero Kristo
24d8d498a8 ARM: OMAP4: hwmod_data: add opt clks for dss_hdmi and dss_venc
These extra optional clocks are required as main clock for these modules
are going to be routed to the main module clock. Otherwise, the hdmi / tv
clocks are not going to be enabled during usage, leading to failure.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-06-06 00:13:46 -07:00
Tero Kristo
138f7ca78f ARM: OMAP2+: timer: add support for fetching fck handle from DT
The mux clock handle shall be provided via "fck" DT handle. This avoids
the need to lookup the main clock via hwmod core, which will not work
with the clkctrl clock support anymore; the main clock is not going to
be a mux.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-06-06 00:13:41 -07:00
Tony Lindgren
8d39ff3d16 ARM: OMAP2+: Remove unused legacy code for timer
We are now booting all mach-omap2 in device tree only mode.
Any code that is only called in legacy boot mode where
of_have_populated_dt() is not set is safe to remove now.

Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-06-06 00:02:36 -07:00
Christian Lamparter
7b87fe9429 ARM: debug: qcom: add UART addresses to Kconfig help for IPQ4019
Add information about the IPQ4019 debug UART physical and virtual
addresses in the DEBUG_QCOM_UARTDM Kconfig help section.

Signed-off-by: Christian Lamparter <chunkeey@googlemail.com>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2017-06-05 22:05:16 -05:00
Abhishek Sahu
1d917530c9 ARM: qcom_defconfig: Enable IPQ4019 clock and pinctrl
These configs are required for booting kernel in QCOM IPQ4019 boards.

Signed-off-by: Abhishek Sahu <absahu@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2017-06-05 22:00:30 -05:00
Linus Walleij
5594207294 ARM: dts: add GSBI8 defines to the MSM8660 family
This defines the memory location and interrupt used by the GSBI8
I2C adapter on the MSM8660 SoCs. We add it as "disabled" by
default so that boards using this I2C can enable it.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2017-06-05 21:26:42 -05:00
Linus Walleij
567cf21350 ARM: dts: Qualcomm APQ8060 DragonBoard ALS sensor
This adds the Capella CM3605 ambient light and proximity sensor
to the APQ8060 DragonBoard device tree. Notice that we also set
up pin config for the AOUT line and GPIO lines, and that we set
the default trigger on the infrared LED to associate with the
"cm3605" trigger so the IR LED is controlled by this the CM3605
driver.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2017-06-05 21:26:42 -05:00
Linus Walleij
6d78cea61c ARM: dts: add XOADC and IIO HWMON to MSM8660/APQ8060
This adds the PM8058 XOADC node to the PM8058 PMIC node,
defines the 16 channels and further also define an IIO HWMON
node for the channels that are used for housekeeping of
voltages and die temperature for the PMIC chip die.

Tested on the APQ8060 DragonBoard:
cd /sys/class/hwmon/hwmon0
cat in2_input
4773 (DC mains ~5V)
cat in4_input
625  (0.625V reference voltage)
cat in5_input
1250 (1.25V reference voltage)
cat temp1_input
35852 (die temperature)

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2017-06-05 21:26:41 -05:00
Christian Lamparter
650df439cf ARM: dts: qcom: ipq4019: fix i2c_0 node
This patch fixes two typos in the i2c_0 node for the ipq4019.
The reg property length is just 0x600. The core clock is
GCC_BLSP1_QUP1_I2C_APPS_CLK. GCC_BLSP1_QUP2_I2C_APPS_CLK is
used by the second i2c.

Fixes: e76b4284b5 ("qcom: ipq4019: add i2c node to ipq4019 SoC and DK01 device tree")
Signed-off-by: Christian Lamparter <chunkeey@googlemail.com>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2017-06-05 21:26:37 -05:00
Sven Eckelmann
5533b0cda3 ARM: dts: qcom: add gsbi7 serial to ipq8064 SoC device tree
The gsbi_serial7 under gsbi7 is used by the IPQ8068 based board EWS870AP as
main serial console.

Signed-off-by: Sven Eckelmann <sven.eckelmann@openmesh.com>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2017-06-05 21:22:09 -05:00
Masahiro Yamada
fa53757bca ARM: dts: uniphier: use SPDX-License-Identifier
Follow the recent trend for the license description, and fix the wrongly
stated X11 to MIT.

The X11 license text [1] is explicitly for the X Consortium and has a
couple of extra clauses.  The MIT license text [2] is actually what the
current DT files claim.

[1] https://spdx.org/licenses/X11.html
[2] https://spdx.org/licenses/MIT.html

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-06-06 09:22:59 +09:00
Masahiro Yamada
1808867859 ARM: dts: uniphier: fix simple-bus unit address format error
Compiling the UniPhier DT files with W=1, DTC warns like follows:

Warning (simple_bus_reg): Node /soc/system-bus@58c00000/support_card@1,1f00000/ethernet@00000000 simple-bus unit address format error, expected "0"
Warning (simple_bus_reg): Node /soc/system-bus@58c00000/support_card@1,1f00000/uart@000b0000 simple-bus unit address format error, expected "b0000"
Warning (simple_bus_reg): Node /soc/smpctrl@59800000 simple-bus unit address format error, expected "59801000"

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-06-06 09:20:24 +09:00
Viresh Kumar
f21683ae6e ARM: dts: uniphier: Use - instead of @ for DT OPP entries
Compiling the DT file with W=1, DTC warns like follows:

Warning (unit_address_vs_reg): Node /opp_table0/opp@1000000000 has a
unit name, but no reg property

Fix this by replacing '@' with '-' as the OPP nodes will never have a
"reg" property.

Reported-by: Krzysztof Kozlowski <krzk@kernel.org>
Reported-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Suggested-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-06-06 09:20:20 +09:00
Linus Torvalds
112eb07287 Merge branch 'fixes' of git://git.armlinux.org.uk/~rmk/linux-arm
Pull ARM fixes from Russell King:
 "Three fixes this time around:

   - Two fixes for noMMU, fixing the decompressor header layout, and
     preventing a build error with some configurations.

   - Fixing the hyp-stub updates that went in during the merge window
     for platforms that use MCPM"

* 'fixes' of git://git.armlinux.org.uk/~rmk/linux-arm:
  ARM: 8677/1: boot/compressed: fix decompressor header layout for v7-M
  ARM: 8676/1: NOMMU: provide pgprot_device() macro
  ARM: 8675/1: MCPM: ensure not to enter __hyp_soft_restart from loopback and cpu_power_down
2017-06-05 11:19:40 -07:00
Markus Elfring
84a0a967a4 arm/xen: Adjust one function call together with a variable assignment
The script "checkpatch.pl" pointed information out like the following.

ERROR: do not use assignment in if condition

Thus fix the affected source code place.

Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
2017-06-05 10:38:24 -07:00
Markus Elfring
d6bb4ec32c arm/xen: Delete an error message for a failed memory allocation in __set_phys_to_machine_multi()
Omit an extra message for a memory allocation failure in this function.

This issue was detected by using the Coccinelle software.

Link: http://events.linuxfoundation.org/sites/events/files/slides/LCJ16-Refactor_Strings-WSang_0.pdf
Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
2017-06-05 10:38:07 -07:00
Markus Elfring
031229b862 arm/xen: Improve a size determination in __set_phys_to_machine_multi()
Replace the specification of a data structure by a pointer dereference
as the parameter for the operator "sizeof" to make the corresponding size
determination a bit safer according to the Linux coding style convention.

Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
2017-06-05 10:36:36 -07:00
Ard Biesheuvel
bb817bef3b efi/arm: Enable DMI/SMBIOS
Wire up the existing arm64 support for SMBIOS tables (aka DMI) for ARM as
well, by moving the arm64 init code to drivers/firmware/efi/arm-runtime.c
(which is shared between ARM and arm64), and adding a asm/dmi.h header to
ARM that defines the mapping routines for the firmware tables.

This allows userspace to access these tables to discover system information
exposed by the firmware. It also sets the hardware name used in crash
dumps, e.g.:

  Unable to handle kernel NULL pointer dereference at virtual address 00000000
  pgd = ed3c0000
  [00000000] *pgd=bf1f3835
  Internal error: Oops: 817 [#1] SMP THUMB2
  Modules linked in:
  CPU: 0 PID: 759 Comm: bash Not tainted 4.10.0-09601-g0e8f38792120-dirty #112
  Hardware name: QEMU KVM Virtual Machine, BIOS 0.0.0 02/06/2015
  ^^^

NOTE: This does *NOT* enable or encourage the use of DMI quirks, i.e., the
      the practice of identifying the platform via DMI to decide whether
      certain workarounds for buggy hardware and/or firmware need to be
      enabled. This would require the DMI subsystem to be enabled much
      earlier than we do on ARM, which is non-trivial.

Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Acked-by: Russell King <rmk+kernel@armlinux.org.uk>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Matt Fleming <matt@codeblueprint.co.uk>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-efi@vger.kernel.org
Link: http://lkml.kernel.org/r/20170602135207.21708-14-ard.biesheuvel@linaro.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2017-06-05 17:50:44 +02:00
Fabio Estevam
3229f83bd8 ARM: dts: imx7d-sdb: Add Bluetooth support
imx7d-sdb has a BCM4339 BT chip connected to UART6.

Add support for it.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-06-05 23:26:02 +08:00
Fabio Estevam
6e823e9720 ARM: dts: imx7d-sdb: Add Wifi support
imx7d-sdb has a BCM4339 Wifi chip connected to USDHC2.

Add support for it.

While at it, move the WL_REG_ON pin to the correct pinctrl node.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-06-05 23:25:59 +08:00
Fabio Estevam
b877039aa1 ARM: dts: imx7d-sdb: Adjust the regulator nodes
It is not recommended to place the regulator nodes inside 'simple-bus',
so adjust them accordingly.

The motivation for rearranging this is to make it easier to add new
regulator nodes in the future.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-06-05 23:25:53 +08:00
Fabio Estevam
12de44f55d ARM: dts: imx: Fix Ethernet PHY reset polarity
The FEC driver ignores the GPIO polarity from 'phy-reset-gpios' and
considers that the Ethernet PHY is active low, unless the
property 'phy-reset-active-high' is present.

Fix the device tree description by explicitly passing the
'GPIO_ACTIVE_LOW' flag to the 'phy-reset-gpios' property.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-06-05 23:24:13 +08:00
Ard Biesheuvel
06a4b6d009 ARM: 8677/1: boot/compressed: fix decompressor header layout for v7-M
As reported by Patrice, the header layout of the decompressor is
incorrect when building for v7-M. In this case, the __nop macro
resolves to 'mov r0, r0', which is emitted as a narrow encoding,
resulting in the header data fields to end up at lower offsets than
required.

Given the variety of targets we need to support with the same code,
the startup sequence is a bit of a jumble, and uses instructions
and macros whose encoding widths cannot be specified (badr), or only
exist in a narrow encoding (bx)

So force the use of a wide encoding in __nop, and replace the start
sequence with a simple jump to the label marking the start of code,
preceded by a Thumb2 mode switch if required (using explicit wide
encodings where appropriate). The label itself can be moved to the
start of code [where it belongs] due to the larger range of branch
instructions as compared to adr instructions.

Reported-by: Patrice CHOTARD <patrice.chotard@st.com>
Acked-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2017-06-05 10:29:40 +01:00
Vladimir Murzin
7ef4783e19 ARM: 8676/1: NOMMU: provide pgprot_device() macro
NOMMU build leads to the following error:

  CC      drivers/pci/mmap.o
drivers/pci/mmap.c: In function 'pci_mmap_resource_range':
drivers/pci/mmap.c:60:3: error: implicit declaration of function 'pgprot_device' [-Werror=implicit-function-declaration]
   vma->vm_page_prot = pgprot_device(vma->vm_page_prot);
   ^

cc1: some warnings being treated as errors
scripts/Makefile.build:302: recipe for target 'drivers/pci/mmap.o' failed
make[2]: *** [drivers/pci/mmap.o] Error 1
scripts/Makefile.build:561: recipe for target 'drivers/pci' failed
make[1]: *** [drivers/pci] Error 2
Makefile:1016: recipe for target 'drivers' failed
make: *** [drivers] Error 2

Fix it with support of pgprot_device() macro for NOMMU.

Fixes: 00d2904ffe ("ARM/PCI: Use generic pci_mmap_resource_range()")
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2017-06-05 10:29:40 +01:00
Andrew Jones
325f9c649c KVM: arm/arm64: use vcpu requests for irq injection
Don't use request-less VCPU kicks when injecting IRQs, as a VCPU
kick meant to trigger the interrupt injection could be sent while
the VCPU is outside guest mode, which means no IPI is sent, and
after it has called kvm_vgic_flush_hwstate(), meaning it won't see
the updated GIC state until its next exit some time later for some
other reason.  The receiving VCPU only needs to check this request
in VCPU RUN to handle it.  By checking it, if it's pending, a
memory barrier will be issued that ensures all state is visible.
See "Ensuring Requests Are Seen" of
Documentation/virtual/kvm/vcpu-requests.rst

Signed-off-by: Andrew Jones <drjones@redhat.com>
Reviewed-by: Christoffer Dall <cdall@linaro.org>
Signed-off-by: Christoffer Dall <cdall@linaro.org>
2017-06-04 16:53:56 +02:00
Andrew Jones
7b244e2be6 KVM: arm/arm64: change exit request to sleep request
A request called EXIT is too generic. All requests are meant to cause
exits, but different requests have different flags. Let's not make
it difficult to decide if the EXIT request is correct for some case
by just always providing unique requests for each case. This patch
changes EXIT to SLEEP, because that's what the request is asking the
VCPU to do.

Signed-off-by: Andrew Jones <drjones@redhat.com>
Acked-by: Christoffer Dall <cdall@linaro.org>
Signed-off-by: Christoffer Dall <cdall@linaro.org>
2017-06-04 16:53:55 +02:00
Andrew Jones
6a6d73be12 KVM: arm/arm64: properly use vcpu requests
arm/arm64 already has one VCPU request used when setting pause,
but it doesn't properly check requests in VCPU RUN. Check it
and also make sure we set vcpu->mode at the appropriate time
(before the check) and with the appropriate barriers. See
Documentation/virtual/kvm/vcpu-requests.rst. Also make sure we
don't leave any vcpu requests we don't intend to handle later
set in the request bitmap. If we don't clear them, then
kvm_request_pending() may return true when it shouldn't.

Using VCPU requests properly fixes a small race where pause
could get set just as a VCPU was entering guest mode.

Signed-off-by: Andrew Jones <drjones@redhat.com>
Reviewed-by: Christoffer Dall <cdall@linaro.org>
Signed-off-by: Christoffer Dall <cdall@linaro.org>
2017-06-04 16:53:47 +02:00
Andrew Jones
2387149ead KVM: improve arch vcpu request defining
Marc Zyngier suggested that we define the arch specific VCPU request
base, rather than requiring each arch to remember to start from 8.
That suggestion, along with Radim Krcmar's recent VCPU request flag
addition, snowballed into defining something of an arch VCPU request
defining API.

No functional change.

(Looks like x86 is running out of arch VCPU request bits.  Maybe
 someday we'll need to extend to 64.)

Signed-off-by: Andrew Jones <drjones@redhat.com>
Acked-by: Christoffer Dall <cdall@linaro.org>
Signed-off-by: Christoffer Dall <cdall@linaro.org>
2017-06-04 16:53:00 +02:00
Christoph Hellwig
6bc51cbaa9 signal: Remove non-uapi <asm/siginfo.h>
By moving the kernel side __SI_* defintions right next to the userspace
ones we can kill the non-uapi versions of <asm/siginfo.h> include
include/asm-generic/siginfo.h and untangle the unholy mess of includes.

[ tglx: Removed uapi/asm/siginfo.h from m32r, microblaze, mn10300 and score ]

Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-arch@vger.kernel.org
Cc: Fenghua Yu <fenghua.yu@intel.com>
Cc: Tony Luck <tony.luck@intel.com>
Cc: linux-ia64@vger.kernel.org
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: sparclinux@vger.kernel.org
Cc: "David S. Miller" <davem@davemloft.net>
Link: http://lkml.kernel.org/r/20170603190102.28866-6-hch@lst.de
2017-06-04 15:11:47 +02:00
Fabio Estevam
37de44f238 ARM: dts: imx7: Fix typo in watchdog pin name
Change "WDOD1" to "WDOG1" in watchdog pin names.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-06-04 11:51:06 +08:00
Leonard Crestez
7e9eb62688 ARM: imx_v6_v7_defconfig: Explicitly restore CONFIG_DEBUG_FS
This option was removed by "make savedefconfig" in
commit c5054a98bc ("ARM: imx_v6_v7_defconfig: Select SMSC_PHY")

This happened because CONFIG_DEBUG_FS was implicitly selected by
CONFIG_TREE_RCU_TRACE which defaulted to true because CONFIG_RCU_TRACE
was enabled by default by commit 961518259b ("rcu: Enable RCU
tracepoints by default to aid in debugging")

Recently however CONFIG_RCU_TRACE was completely removed by
commit 6e74c237c410 ("rcu: Remove debugfs tracing")

The result is that imx_v6_v7_defconfig no longer includes DEBUG_FS on
linux-next since next-20170517. This is bad, DEBUG_FS is extremely
useful for kernel introspection and testing.

Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-06-04 11:41:44 +08:00
Juri Lelli
4ca4f26a9c arm,arm64,drivers: add a prefix to drivers arch_topology interfaces
Now that some functions that deal with arch topology information live
under drivers, there is a clash of naming that might create confusion.

Tidy things up by creating a topology namespace for interfaces used by
arch code; achieve this by prepending a 'topology_' prefix to driver
interfaces.

Signed-off-by: Juri Lelli <juri.lelli@arm.com>
Acked-by: Russell King <rmk+kernel@armlinux.org.uk>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-06-03 19:10:09 +09:00
Juri Lelli
615ffd6314 arm,arm64,drivers: move externs in a new header file
Create a new header file (include/linux/arch_topology.h) and put there
declarations of interfaces used by arm, arm64 and drivers code.

Signed-off-by: Juri Lelli <juri.lelli@arm.com>
Acked-by: Russell King <rmk+kernel@armlinux.org.uk>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-06-03 19:10:09 +09:00
Juri Lelli
c105aa3118 arm,arm64,drivers: reduce scope of cap_parsing_failed
Reduce the scope of cap_parsing_failed (making it static in
drivers/base/arch_topology.c) by slightly changing {arm,arm64} DT
parsing code.

For arm checking for !cap_parsing_failed before calling normalize_
cpu_capacity() is superfluous, as returning an error from parse_
cpu_capacity() (above) means cap_from _dt is set to false.

For arm64 we can simply check if raw_capacity points to something,
which is not if capacity parsing has failed.

Suggested-by: Morten Rasmussen <morten.rasmussen@arm.com>
Signed-off-by: Juri Lelli <juri.lelli@arm.com>
Acked-by: Russell King <rmk+kernel@armlinux.org.uk>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-06-03 19:10:09 +09:00
Juri Lelli
2ef7a2953c arm, arm64: factorize common cpu capacity default code
arm and arm64 share lot of code relative to parsing CPU capacity
information from DT, using that information for appropriate scaling and
exposing a sysfs interface for chaging such values at runtime.

Factorize such code in a common place (driver/base/arch_topology.c) in
preparation for further additions.

Suggested-by: Will Deacon <will.deacon@arm.com>
Suggested-by: Mark Rutland <mark.rutland@arm.com>
Suggested-by: Catalin Marinas <catalin.marinas@arm.com>
Cc: Russell King <linux@armlinux.org.uk>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Juri Lelli <juri.lelli@arm.com>
Acked-by: Russell King <rmk+kernel@armlinux.org.uk>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-06-03 19:10:09 +09:00
Juri Lelli
f70b281b59 arm: remove wrong CONFIG_PROC_SYSCTL ifdef
The sysfs cpu_capacity entry for each CPU has nothing to do with
PROC_FS, nor it's in /proc/sys path.

Remove such ifdef.

Cc: Russell King <linux@arm.linux.org.uk>
Reported-and-suggested-by: Sudeep Holla <sudeep.holla@arm.com>
Fixes: 7e5930aaef ('ARM: 8622/3: add sysfs cpu_capacity attribute')
Signed-off-by: Juri Lelli <juri.lelli@arm.com>
Acked-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-06-03 19:10:08 +09:00
Juri Lelli
95adb4e592 arm: fix return value of parse_cpu_capacity
parse_cpu_capacity() has to return 0 on failure, but it currently returns
1 instead if raw_capacity kcalloc failed.

Fix it (by directly returning 0).

Reported-by: Morten Rasmussen <morten.rasmussen@arm.com>
Fixes: 06073ee267 ('ARM: 8621/3: parse cpu capacity-dmips-mhz from DT')
Signed-off-by: Juri Lelli <juri.lelli@arm.com>
Acked-by: Russell King <rmk+kernel@armlinux.org.uk>
Acked-by: Vincent Guittot <vincent.guittot@linaor.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-06-03 19:10:08 +09:00
Chen-Yu Tsai
77125a701a ARM: sunxi: h3-h5: Add PLL_PERIPH0 clock to the R_CCU
The AR100 clock within the R_CCU (PRCM) has the PLL_PERIPH0 as one of
its parents.

This adds the reference in the device tree describing this relationship.
This patch uses a raw number for the clock index to ease merging by
avoiding cross tree dependencies.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-06-03 10:04:48 +08:00
Chen-Yu Tsai
c80aec5e05 ARM: sun8i: a83t: Add device node for PRCM
The A83T's PRCM has the same set of clocks and resets as the A64.
However, a few dividers are different. And due to the lack of a low
speed 32.768 kHz oscillator, a few of the clock parents are different.

The PRCM also has controls for various power domains. These are not
supported yet, neither in software nor in the device tree binding.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-06-03 10:03:39 +08:00
Marek Szyprowski
5343b15792 ARM: dts: exynos: Add HDMI CEC device to Exynos5 SoC family
Exynos5250 and Exynos542x SoCs have the same CEC hardware module as
Exynos4 SoC series, so enable support for it using the same compatible
string.

Tested on Odroid XU3 (Exynos5422) and Google Snow (Exynos5250) boards.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2017-06-02 17:18:30 +02:00