Commit Graph

11 Commits

Author SHA1 Message Date
Luo Jie
9f93a0a428 clk: qcom: common: commonize qcom_cc_really_probe
The previous wrapper qcom_cc_really_probe takes the platform
device as parameter, which is limited to platform driver.

As for qca8k clock controller driver, which is registered as
the MDIO device, which also follows the qcom clock framework.

To commonize qcom_cc_really_probe, updating it to take the
struct device as parameter, so that the qcom_cc_really_probe
can be utilized by the previous platform device and the new
added MDIO device.

Also update the current clock controller drivers to take
&pdev->dev as parameter when calling qcom_cc_really_probe.

Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Tested-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Luo Jie <quic_luoj@quicinc.com>
Link: https://lore.kernel.org/r/20240605124541.2711467-4-quic_luoj@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-06-12 23:04:26 -05:00
Christophe JAILLET
fcd9354ceb clk: qcom: Constify struct pll_vco
pll_vco structure are never modified. They are used as .vco_table in
"struct clk_alpha_pll".

And in this structure, we have:
	const struct pll_vco *vco_table;

Constifying these structures moves some data to a read-only section, so
increase overall security.

On a x86_64, with allmodconfig:
Before:
   text	   data	    bss	    dec	    hex	filename
   9905	  47576	      0	  57481	   e089	drivers/clk/qcom/mmcc-msm8994.o

After:
   text	   data	    bss	    dec	    hex	filename
  10033	  47440	      0	  57473	   e081	drivers/clk/qcom/mmcc-msm8994.o

Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Link: https://lore.kernel.org/r/c3c9a75ed77a5ef2e9b72081e88225d84bba91cd.1715359776.git.christophe.jaillet@wanadoo.fr
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-05-27 11:45:04 -05:00
Dmitry Baryshkov
e801038a02 clk: qcom: dispcc-sm8450: fix DisplayPort clocks
On SM8450 DisplayPort link clocks use frequency tables inherited from
the vendor kernel, it is not applicable in the upstream kernel. Drop
frequency tables and use clk_byte2_ops for those clocks.

This fixes frequency selection in the OPP core (which otherwise attempts
to use invalid 810 KHz as DP link rate), also fixing the following
message:
msm-dp-display ae90000.displayport-controller: _opp_config_clk_single: failed to set clock rate: -22

Fixes: 16fb89f92e ("clk: qcom: Add support for Display Clock Controller on SM8450")
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20240424-dispcc-dp-clocks-v2-1-b44038f3fa96@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-04-27 13:14:56 -05:00
Konrad Dybcio
d09ec6f987 clk: qcom: Use qcom_branch_set_clk_en()
Instead of magically poking at the bit0 of branch clocks' CBCR, use
the newly introduced helper.

Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240212-topic-clk_branch_en-v7-2-5b79eb7278b2@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-02-14 11:59:07 -06:00
Dmitry Baryshkov
c334ecf355 clk: qcom: dispcc-*: switch to module_platform_driver
There is no need to register display clock controllers during subsys init
calls. Use module_platform_driver() instead.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240206-clk-module-platform-driver-v1-2-db799bd2feeb@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-02-07 12:14:47 -06:00
Stephen Boyd
41680df097 Merge branch 'clk-qcom' into clk-next
* clk-qcom: (87 commits)
  clk: qcom: Fix SM_GPUCC_8450 dependencies
  clk: qcom: smd-rpm: Set XO rate and CLK_IS_CRITICAL on PCNoC
  clk: qcom: smd-rpm: Add a way to define bus clocks with rate and flags
  clk: qcom: gcc-ipq5018: change some variable static
  clk: qcom: gcc-ipq4019: add missing networking resets
  dt-bindings: clock: qcom: ipq4019: add missing networking resets
  clk: qcom: gcc-msm8917: Enable GPLL0_SLEEP_CLK_SRC
  dt-bindings: clock: gcc-msm8917: Add definition for GPLL0_SLEEP_CLK_SRC
  clk: qcom: gcc-qdu1000: Update the RCGs ops
  clk: qcom: gcc-qdu1000: Update the SDCC clock RCG ops
  clk: qcom: gcc-qdu1000: Add support for GDSCs
  clk: qcom: gcc-qdu1000: Add gcc_ddrss_ecpri_gsi_clk support
  clk: qcom: gcc-qdu1000: Register gcc_gpll1_out_even clock
  clk: qcom: gcc-qdu1000: Fix clkref clocks handling
  clk: qcom: gcc-qdu1000: Fix gcc_pcie_0_pipe_clk_src clock handling
  dt-bindings: clock: Update GCC clocks for QDU1000 and QRU1000 SoCs
  clk: qcom: gcc-sm8450: Use floor ops for SDCC RCGs
  clk: qcom: ipq5332: drop the gcc_apss_axi_clk_src clock
  clk: qcom: ipq5332: drop the mem noc clocks
  clk: qcom: gcc-msm8998: Don't check halt bit on some branch clks
  ...
2023-08-30 14:39:58 -07:00
Rob Herring
a96cbb146a clk: Explicitly include correct DT includes
The DT of_device.h and of_platform.h date back to the separate
of_platform_bus_type before it as merged into the regular platform bus.
As part of that merge prepping Arm DT support 13 years ago, they
"temporarily" include each other. They also include platform_device.h
and of.h. As a result, there's a pretty much random mix of those include
files used throughout the tree. In order to detangle these headers and
replace the implicit includes with struct declarations, users need to
explicitly include the correct includes.

Acked-by: Dinh Nguyen <dinguyen@kernel.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> # samsung
Acked-by: Heiko Stuebner <heiko@sntech.de> #rockchip
Acked-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Luca Ceresoli <luca.ceresoli@bootlin.com> # versaclock5
Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20230718143156.1066339-1-robh@kernel.org
Acked-by: Abel Vesa <abel.vesa@linaro.org> #imx
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2023-07-19 13:13:16 -07:00
Johan Hovold
b0f3d01bda clk: qcom: dispcc-sm8450: fix runtime PM imbalance on probe errors
Make sure to decrement the runtime PM usage count before returning in
case regmap initialisation fails.

Fixes: 16fb89f92e ("clk: qcom: Add support for Display Clock Controller on SM8450")
Cc: stable@vger.kernel.org      # 6.1
Cc: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Link: https://lore.kernel.org/r/20230718132902.21430-3-johan+linaro@kernel.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-18 07:58:49 -07:00
Dmitry Baryshkov
b69069c3ff clk: qcom: dispcc-sm8450: switch to devm_pm_runtime_enable
Switch to using the devm_pm_runtime_enable() instead of hand-coding
corresponding action to call pm_runtime_disable().

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230103145515.1164020-20-dmitry.baryshkov@linaro.org
2023-01-10 22:05:08 -06:00
Dmitry Baryshkov
5c0df30cb3 clk: qcom: dispcc-sm8450: switch to parent_hws
Change several entries of parent_data to use parent_hws instead, which
results in slightly more ovbious code.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230103145515.1164020-2-dmitry.baryshkov@linaro.org
2023-01-10 15:58:59 -06:00
Dmitry Baryshkov
16fb89f92e clk: qcom: Add support for Display Clock Controller on SM8450
Add support for the dispcc on Qualcomm SM8450 platform.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220908222850.3552050-4-dmitry.baryshkov@linaro.org
2022-09-26 22:17:14 -05:00