Commit Graph

21904 Commits

Author SHA1 Message Date
Ahmad Fatoum
bae2b7f677 ARM: dts: stm32: lxa-mc1: enable DDR50 mode on eMMC
The "eMMC high-speed DDR mode (3.3V I/O)" at 50MHz is supported on
the eMMC-interface of the lxa-mc1. Set it in the device tree to
benefit from the speed improvement.

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Holger Assmann <h.assmann@pengutronix.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-09-23 18:37:02 +02:00
Marek Vasut
57592d2a98 ARM: dts: stm32: Fix DH PDK2 display PWM channel
The display PWM channel is number 3 (PWM2 CH4), make it so.

Fixes: 34e0c7847d ("ARM: dts: stm32: Add DH Electronics DHCOM STM32MP1 SoM and PDK2 board")
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-09-23 18:37:02 +02:00
Marek Vasut
3c5c0eee95 ARM: dts: stm32: Enable RTS/CTS for DH AV96 UART7
The DH AV96 has RTS/CTS lines available on UART7, describe them in DT.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-09-23 18:37:02 +02:00
Marek Vasut
9ad98319e9 ARM: dts: stm32: Swap PHY reset GPIO and TSC2004 IRQ on DHCOM SOM
On the production revision of the SoM, 587-200, the PHY reset GPIO and
touchscreen IRQs are swapped to prevent collision between EXTi IRQs,
reflect that in DT.

Fixes: 34e0c7847d ("ARM: dts: stm32: Add DH Electronics DHCOM STM32MP1 SoM and PDK2 board")
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-09-23 18:37:02 +02:00
Tobias Schramm
862f5c7ebc ARM: dts: stm32: use stm32h7 usart compatible string for stm32h743
Previously the FIFO on the stm32h743 usart was not utilized, because
the stm32f7 compatible configures it without FIFO support.

Signed-off-by: Tobias Schramm <t.schramm@manjaro.org>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-09-23 18:37:02 +02:00
Tobias Schramm
33aa488086 ARM: dts: stm32: add resets property to spi device nodes on stm32h743
The stm32 spi driver tries to determine the fifo size of spi devices
dynamically. However, if the spi was already configured by the bootloader
the fifo size check can become an endless loop, because the driver
expects the spi to be in its initial "after device reset" state. The
driver does already support resetting the spi device at probe, thus this
patch adds only the required device tree properties

Signed-off-by: Tobias Schramm <t.schramm@manjaro.org>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-09-23 18:37:02 +02:00
Tobias Schramm
9fc3729183 ARM: dts: stm32: add display controller node to stm32h743
Declare LTDC (display controller) on stm32h743.

Signed-off-by: Tobias Schramm <t.schramm@manjaro.org>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-09-23 18:37:02 +02:00
Marek Vasut
d0ce6f1be3 ARM: dts: stm32: Enable RTS/CTS for DH PDK2 UART8
The DH PDK2 has RTS/CTS lines available on UART8, describe them in DT.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-09-23 18:37:02 +02:00
Marek Vasut
30e9af4ba3 ARM: dts: stm32: Drop QSPI CS2 pinmux on DHCOM
The QSPI CS2 is not used on DHCOM, remove the pinmux settings.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-09-23 18:37:02 +02:00
Marek Vasut
9e8f500af7 ARM: dts: stm32: Add STM32MP1 UART8 RTS/CTS pinmux
Add extra RTS/CTS line pinmux for STM32MP1 UART8.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Acked-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-09-23 18:37:02 +02:00
Marcin Sloniewski
be78ab4f63 ARM: dts: stm32: add initial support for stm32mp157-odyssey board
Add support for Seeed Studio's stm32mp157c odyssey board.
Board consists of SoM with stm32mp157c with 4GB eMMC and 512 MB DDR3 RAM
and carrier board with USB and ETH interfaces, SD card connector,
wifi and BT chip AP6236.

In this patch only basic kernel boot is supported and interfacing
SD card and on-board eMMC.

Signed-off-by: Marcin Sloniewski <marcin.sloniewski@gmail.com>
Reviewed-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-09-23 18:37:02 +02:00
Holger Assmann
42a31ac669 ARM: dts: stm32: lxa-mc1: Fix kernel warning about PHY delays
The KSZ9031 PHY skew timings for rxc/txc, originally set to achieve
the desired phase shift between clock- and data-signal, now trigger a
kernel warning when used in rgmii-id mode:

 *-skew-ps values should be used only with phy-mode = "rgmii"

This is because commit bcf3440c6d ("net: phy: micrel: add phy-mode
support for the KSZ9031 PHY") now configures own timings when
phy-mode = "rgmii-id". Device trees wanting to set their own delays
should use phy-mode "rgmii" instead as the warning prescribes.

The "standard" timings now used with "rgmii-id" work fine on this
board, so drop the explicit timings in the device tree and thereby
silence the warning.

Fixes: 666b5ca85c ("ARM: dts: stm32: add STM32MP1-based Linux Automation MC-1 board")
Signed-off-by: Holger Assmann <h.assmann@pengutronix.de>
Acked-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-09-23 18:37:02 +02:00
Marek Vasut
4e0ec51f8b ARM: dts: stm32: Add USB OTG support to DH PDK2
The DH PDK2 board is capable of USB OTG on the X14 USB Mini-AB connector,
fill in the missing bits to make USB OTG possible instead of peripheral.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-09-23 18:37:02 +02:00
Marek Vasut
1ad6e36ec2 ARM: dts: stm32: Fix sdmmc2 pins on AV96
The AV96 uses sdmmc2_d47_pins_c and sdmmc2_d47_sleep_pins_c, which
differ from sdmmc2_d47_pins_b and sdmmc2_d47_sleep_pins_b in one
pin, SDMMC2_D5, which is PA15 in the former and PA9 in the later.
The PA15 is correct on AV96, so fix this. This error is likely a
result of rebasing across the stm32mp1 DT pinctrl rework.

Fixes: 611325f681 ("ARM: dts: stm32: Add eMMC attached to SDMMC2 on AV96")
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-09-23 18:37:02 +02:00
Marek Vasut
fde180f06d ARM: dts: stm32: Add DHSOM based DRC02 board
Add DT for DH DRC02 unit, which is a universal controller device.
The system has two ethernet ports, two CANs, RS485 and RS232, USB,
capacitive buttons and an OLED display.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-09-23 18:37:02 +02:00
Marek Vasut
b0a07f6096 ARM: dts: stm32: Move ethernet PHY into DH SoM DT
The PHY and the VIO regulator is populated on the SoM, move it
into the SoM DT.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-09-23 18:37:02 +02:00
Linus Torvalds
d3017135c4 Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net
Pull networking fixes from Jakub Kicinski:

 - fix failure to add bond interfaces to a bridge, the offload-handling
   code was too defensive there and recent refactoring unearthed that.
   Users complained (Ido)

 - fix unnecessarily reflecting ECN bits within TOS values / QoS marking
   in TCP ACK and reset packets (Wei)

 - fix a deadlock with bpf iterator. Hopefully we're in the clear on
   this front now... (Yonghong)

 - BPF fix for clobbering r2 in bpf_gen_ld_abs (Daniel)

 - fix AQL on mt76 devices with FW rate control and add a couple of AQL
   issues in mac80211 code (Felix)

 - fix authentication issue with mwifiex (Maximilian)

 - WiFi connectivity fix: revert IGTK support in ti/wlcore (Mauro)

 - fix exception handling for multipath routes via same device (David
   Ahern)

 - revert back to a BH spin lock flavor for nsid_lock: there are paths
   which do require the BH context protection (Taehee)

 - fix interrupt / queue / NAPI handling in the lantiq driver (Hauke)

 - fix ife module load deadlock (Cong)

 - make an adjustment to netlink reply message type for code added in
   this release (the sole change touching uAPI here) (Michal)

 - a number of fixes for small NXP and Microchip switches (Vladimir)

[ Pull request acked by David: "you can expect more of this in the
  future as I try to delegate more things to Jakub" ]

* git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net: (167 commits)
  net: mscc: ocelot: fix some key offsets for IP4_TCP_UDP VCAP IS2 entries
  net: dsa: seville: fix some key offsets for IP4_TCP_UDP VCAP IS2 entries
  net: dsa: felix: fix some key offsets for IP4_TCP_UDP VCAP IS2 entries
  inet_diag: validate INET_DIAG_REQ_PROTOCOL attribute
  net: bridge: br_vlan_get_pvid_rcu() should dereference the VLAN group under RCU
  net: Update MAINTAINERS for MediaTek switch driver
  net/mlx5e: mlx5e_fec_in_caps() returns a boolean
  net/mlx5e: kTLS, Avoid kzalloc(GFP_KERNEL) under spinlock
  net/mlx5e: kTLS, Fix leak on resync error flow
  net/mlx5e: kTLS, Add missing dma_unmap in RX resync
  net/mlx5e: kTLS, Fix napi sync and possible use-after-free
  net/mlx5e: TLS, Do not expose FPGA TLS counter if not supported
  net/mlx5e: Fix using wrong stats_grps in mlx5e_update_ndo_stats()
  net/mlx5e: Fix multicast counter not up-to-date in "ip -s"
  net/mlx5e: Fix endianness when calculating pedit mask first bit
  net/mlx5e: Enable adding peer miss rules only if merged eswitch is supported
  net/mlx5e: CT: Fix freeing ct_label mapping
  net/mlx5e: Fix memory leak of tunnel info when rule under multipath not ready
  net/mlx5e: Use synchronize_rcu to sync with NAPI
  net/mlx5e: Use RCU to protect rq->xdp_prog
  ...
2020-09-22 14:43:50 -07:00
Cristian Ciocaltea
47be1cdee7 ARM: dts: owl-s500: Add RoseapplePi
Add a Device Tree for the RoseapplePi SBC.

Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
Reviewed-by: Peter Korsgaard <peter@korsgaard.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2020-09-22 12:45:59 +05:30
Cristian Ciocaltea
55f6c9931f ARM: dts: owl-s500: Fix incorrect PPI interrupt specifiers
The PPI interrupts for cortex-a9 were incorrectly specified, fix them.

Fixes: fdfe7f4f9d ("ARM: dts: Add Actions Semi S500 and LeMaker Guitar")
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
Reviewed-by: Peter Korsgaard <peter@korsgaard.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2020-09-22 12:45:52 +05:30
Matheus Castello
874a36f057 ARM: dts: Add Caninos Loucos Labrador v2
Add Device Trees for Caninos Loucos Labrador CoM Core v2 and base board
M v1. Based on the work of Andreas Färber on Lemaker Guitar device tree.

Signed-off-by: Matheus Castello <matheus@castello.eng.br>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2020-09-22 12:45:35 +05:30
Krzysztof Kozlowski
05b0852ec9 ARM: dts: imx6qdl-gw5xxx: correct interrupt flags
GPIO_ACTIVE_x flags are not correct in the context of interrupt flags.
These are simple defines so they could be used in DTS but they will not
have the same meaning:
1. GPIO_ACTIVE_HIGH = 0 = IRQ_TYPE_NONE
2. GPIO_ACTIVE_LOW  = 1 = IRQ_TYPE_EDGE_RISING

Correct the interrupt flags, assuming the author of the code wanted same
logical behavior behind the name "ACTIVE_xxx", this is:
  ACTIVE_LOW  => IRQ_TYPE_LEVEL_LOW

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-By: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-09-22 14:36:28 +08:00
Fabio Estevam
55df2079eb ARM: dts: imx6q-logicpd: Use GPIO chipselect
Using the native SPI chipselect on i.MX6 is known to be problematic.

Doing it on a imx6q-sabresd causes the SPI NOR probe to fail:

[    5.388704] spi-nor spi0.0: unrecognized JEDEC id bytes: 00 00 00 00 00 00

Use the GPIO chipselect to avoid such problem.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-09-22 10:13:41 +08:00
Fabio Estevam
dd1d4def68 ARM: dts: imx: Add an entry for imx6q-logicpd.dtb
Add an entry for imx6q-logicpd.dtb so that it can be built by default.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-09-22 10:13:30 +08:00
Fabio Estevam
9249d28698 ARM: dts: imx6q-logicpd: Add a specific board compatible string
It is standard practice to have a specific board compatible string, so
pass "logicpd,imx6q-logicpd".

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-09-22 10:13:16 +08:00
Krzysztof Kozlowski
dcdd4f2e82 ARM: dts: imx6q: align GPIO hog names with dtschema
dtschema for pca95xx expects GPIO hogs to end with 'hog' prefix.  While
touching the hogs, fix indentation (spaces -> tabs).

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-09-22 09:59:55 +08:00
Frank Wunderlich
36f0a5fc52 arm: dts: mt7623: add missing pause for switchport
port6 of mt7530 switch (= cpu port 0) on bananapi-r2 misses pause option
which causes rx drops on running iperf.

Fixes: f4ff257cd1 ("arm: dts: mt7623: add support for Bananapi R2 (BPI-R2) board")
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20200907070517.51715-1-linux@fw-web.de
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-09-21 12:03:52 +02:00
Martin Cerveny
96820e359e
ARM: dts: sun8i: v3s: Enable crypto engine
V3s contains crypto engine that is compatible with A33.
Add device tree node.

Signed-off-by: Martin Cerveny <m.cerveny@computer.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20200907162458.23730-3-m.cerveny@computer.org
2020-09-17 18:37:32 +02:00
Samuel Holland
44967e8182
ARM: dts: sun8i: a33: Update codec widget names
The sun8i-codec driver introduced a new set of DAPM widgets that more
accurately describe the hardware topology. Update the various device
trees to use the new widget names.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20200726012557.38282-6-samuel@sholland.org
2020-09-17 18:37:31 +02:00
Jernej Skrabec
a770df83d8
ARM: dts: sun8i: r40: Add video engine node
Allwinner R40 SoC has a video engine.

Add a node for it.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20200825173523.1289379-6-jernej.skrabec@siol.net
2020-09-17 18:37:31 +02:00
David Heidelberg
c2ef3aa464 ARM: tegra: nexus7: Add SMB347 battery charger
SMB347 is a battery charger controller which is found on the Nexus 7
device.

Signed-off-by: David Heidelberg <david@ixit.cz>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-09-17 18:09:40 +02:00
Dmitry Osipenko
c82ef94b3a ARM: tegra: nexus7: Add touchscreen
Nexus 7 2012 has Elantech EKTF3624 touchscreen, this patch adds TS node to
the device-tree.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-09-17 18:09:40 +02:00
Dmitry Osipenko
17110cbbef ARM: tegra: nexus7: Use PLLC for WiFi MMC clock parent
The default parent for all MMCs is PLLP, which is running at 408 MHz on
Tegra30 and 50 MHz clock can't be derived from PLLP. The maximum SDIO
clock rate is 50 MHz, but this rate isn't achievable using PLLP.

Let's switch the WiFi MMC clock parent to PLLC in order to get true 50
MHz. This patch doesn't fix any problems, it's just a minor improvement.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-09-17 18:09:40 +02:00
Dmitry Osipenko
98e710a017 ARM: tegra: acer-a500: Use PLLC for WiFi MMC clock parent
The default parent for all MMCs is PLLP, which is running at 216 MHz on
Tegra20 and 50 MHz clock can't be derived from PLLP. The maximum SDIO
clock rate is 50 MHz, but this rate isn't achievable using PLLP.

Let's switch the WiFi MMC clock parent to PLLC in order to get true 50
MHz. This patch doesn't fix any problems, it's just a minor improvement.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-09-17 18:09:39 +02:00
Dmitry Osipenko
a252efadf3 ARM: tegra: acer-a500: Set WiFi MMC clock rate to 50 MHz
Previously 50MHz clock rate didn't work because of the wrong PINCTRL
configuration used for SDIO pins. Now the PINCTRL config is corrected
and the MMC clock rate could be bumped safely to 50MHz, increasing WiFi
TX throughput by 20 Mbit/s and allowing to hit the maximum 40 Mbit/s.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-09-17 18:09:38 +02:00
Dmitry Osipenko
eb885f5ef7 ARM: tegra: acer-a500: Correct PINCTRL configuration
The low-power-mode drive was set to DIV_4 for some of PINCTRL groups,
while these groups should use DIV_1. This patch fixes the wrong PINCTRL
configurations and adds a full drive-setup for the changed configs, just
for completeness since the added values match the default configuration.

Now WiFi SDIO communication works properly using legacy signaling mode if
SDIO BUS clocked at 50MHz, which is a maximum SDIO clock rate on Tegra20.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-09-17 18:09:38 +02:00
Dmitry Osipenko
878fd50925 ARM: tegra: acer-a500: Remove atmel,cfg_name property
This property was supposed to be upstreamed, but it was NAKed recently
in a favor to a better approach of firmware loading. It also turned
out that the firmware loading isn't really necessary because it's stored
in a non-volatile memory inside of the touchscreen controller and
previously the FW loading was needed in order to get touchscreen working,
but it actually was a TS driver problem which is resolved now. Hence
remove the unsupported property.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-09-17 18:09:38 +02:00
Dmitry Osipenko
21806bb0a1 ARM: tegra: acer-a500: Add aliases for MMC
MMC core now supports binding to a specific ID, which is very handy for
embedded devices, like Acer A500, because MMC ID may change depending on
kernel version or configuration which affects MMC driver probe order.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-09-17 18:09:38 +02:00
Dmitry Osipenko
110a580342 ARM: tegra: nexus7: Add aliases for MMC
MMC core now supports binding to a specific ID, which is very handy for
embedded devices, like Nexus 7, because MMC ID may change depending on
kernel version or configuration which affects MMC driver probe order.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-09-17 18:09:37 +02:00
Krzysztof Kozlowski
6995a4c463 ARM: dts: s5pv210: replace deprecated "gpios" i2c-gpio property in Goni
"gpios" property is deprecated.  Update the Goni DTS to fix
dtbs_checks warnings like:

  i2c-pmic: 'sda-gpios' is a required property
  i2c-pmic: 'scl-gpios' is a required property

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200907161141.31034-24-krzk@kernel.org
2020-09-16 19:17:25 +02:00
Krzysztof Kozlowski
ddeb5e7d3d ARM: dts: s5pv210: replace deprecated "gpios" i2c-gpio property in Aquila
"gpios" property is deprecated.  Update the Aquila DTS to fix
dtbs_checks warnings like:

  i2c-pmic: 'sda-gpios' is a required property
  i2c-pmic: 'scl-gpios' is a required property

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200907161141.31034-23-krzk@kernel.org
2020-09-16 19:16:55 +02:00
Krzysztof Kozlowski
8fbc73dc57 ARM: dts: s5pv210: move fixed regulators under root node in Goni
The fixed regulators are kept under dedicated "regulators" node but this
causes multiple dtschema warnings:

  regulators: $nodename:0: 'regulators' does not match '^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'
  regulators: #size-cells:0:0: 0 is not one of [1, 2]
  regulators: fixed-regulator@0:reg:0: [0] is too short
  regulators: fixed-regulator@1:reg:0: [1] is too short
  regulators: fixed-regulator@2:reg:0: [2] is too short
  regulators: fixed-regulator@3:reg:0: [3] is too short

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200907161141.31034-22-krzk@kernel.org
2020-09-16 19:16:24 +02:00
Krzysztof Kozlowski
bb4e986068 ARM: dts: s5pv210: move fixed regulators under root node in Aquila
The fixed regulators are kept under dedicated "regulators" node but this
causes multiple dtschema warnings:

  regulators: $nodename:0: 'regulators' does not match '^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'
  regulators: #size-cells:0:0: 0 is not one of [1, 2]
  regulators: fixed-regulator@0:reg:0: [0] is too short
  regulators: fixed-regulator@1:reg:0: [1] is too short
  regulators: fixed-regulator@2:reg:0: [2] is too short

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200907161141.31034-21-krzk@kernel.org
2020-09-16 19:16:17 +02:00
Krzysztof Kozlowski
3a3a5a59ee ARM: dts: exynos: Align OPP table name with dt-schema
Device tree nodes should have hyphens instead of underscores.  This is
also expected by the bindings.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200903191438.12781-5-krzk@kernel.org
2020-09-16 19:12:06 +02:00
Alexandre Belloni
860b6d803f ARM: dts: at91: sama5d2: add missing flexcom spi node properties
SPI nodes require #address-cells and #size-cells add those properties in
the flexcom spi nodes.

Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Reviewed-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20200831171129.3886857-8-alexandre.belloni@bootlin.com
2020-09-16 10:45:32 +02:00
Alexandre Belloni
996710a895 ARM: dts: at91: add unit-address to memory node
The memory node requires a unit-address, add it.

Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Reviewed-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20200831171129.3886857-7-alexandre.belloni@bootlin.com
2020-09-16 10:45:32 +02:00
Alexandre Belloni
b0d0c3bba9 ARM: dts: at91: move mmc pinctrl-names property to board dts
Having the pinctrl-names property in the dtsi leads to dtbs_check warnings
when the board dts doesn't define pinctrl-0. Instead, move the property to
the board dts actually using the mmc node.

Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Reviewed-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20200831171129.3886857-5-alexandre.belloni@bootlin.com
2020-09-16 10:45:21 +02:00
Viresh Kumar
7162fc2e4e ARM: tegra: Pass multiple versions in opp-supported-hw property
We can now pass multiple versions in "opp-supported-hw" property, lets
do that and simplify the tables a bit.

Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Tested-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2020-09-16 14:02:33 +05:30
Russell King
adc5f70293 ARM: add malloc size to decompressor kexec size structure
Add the required malloc size to the decompressor kexec size structure.

Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-09-15 14:36:26 +01:00
Russell King
83dfeedb66 ARM: add TEXT_OFFSET to decompressor kexec image structure
Add the TEXT_OFFSET to the decompressor's kexec image structure to
kexec knows what offset to use.

Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-09-15 14:36:25 +01:00
Linus Walleij
c03e41470e ARM: 9010/1: uncompress: Print the location of appended DTB
When using the kernel with an appended DTB it is useful to
know where this will end up in the physical memory at the
time the kernel boots.

We add a debug print macro that will help out with this.
Here is a sample debug print after passing -DDEBUG to head.S
during compilation:

DTB:0x40CEBA70 (0x000051B5)
C:0x402080C0-0x40CF0CE0->0x41801D00-0x422EA920
DTB:0x422E56B0 (0x00005262)

This means that the appended DTB is first found after the
compressed kernel at 0x40CEBA70 of size 0x51B5 and then
after the compressed kernel is moved to 0x41801D00
it is found again at 0x422E56B0 and is there size 0x5262.

The growth in size of the FDT is due to the call to
atags_to_fdt() that augments the DTB with ATAG information.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-09-15 14:35:32 +01:00
Linus Walleij
2596a72d33 ARM: 9009/1: uncompress: Enable debug in head.S
The assembly file head.S includes some debug code that does
not get enabled when we select CONFIG_DEBUG_UNCOMPRESS.
The debug in head.S relies on the user tagging on -DDEBUG
on the compilation command line.

To simplify debugging, tag on -DDEBUG so that we also get
these debug messages when selecting CONFIG_DEBUG_UNCOMPRESS.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-09-15 14:35:31 +01:00
Linus Walleij
30d9a34dd3 ARM: 9008/1: uncompress: Drop excess whitespace print
This drops some whitespace from the debug message about
where we move the compressed kernel: r after the message
is completely surplus since the putc routine will anyway
add r after n, and the initial linefeed just assumes
that this will always be the first message on the console,
which is not certain to be true.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-09-15 14:35:30 +01:00
Linus Walleij
0b0c1dbd50 ARM: 9006/1: uncompress: Wait for ready and busy in debug prints
For some platforms such as Qualcomm we need to wait for the
UART to be ready before writing characters to the UART
in the same manner as the macro in debug.S used with the
main "Uncompressing Linux ..." text. Pass an extra temporary
variable to writeb and make it call waituarttxrdy and
busyuart just like the other decomression messages.

Optionally it will also call waituartcts if and only if
CONFIG_DEBUG_UART_FLOW_CONTROL is selected.

After this the decompression debug messages work fine on
Qualcomm platforms if you compile head.S with -DDEBUG.

Cc: Nicolas Pitre <nico@fluxnic.net>
Cc: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Cc: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-09-15 14:35:29 +01:00
Linus Walleij
4df24fef09 ARM: 9005/1: debug: Select flow control for all debug UARTs
Instead of a flow control selection mechanism specifically for
8250, make this available for all debug UARTs. If the debug
UART supports waiting for CTS to be asserted, then this code
can be activated for terminals that need it.

We keep the defaults for EBSA110, Footbridge, Gemini and RPC
so that this still works as expected for these older platforms:
they assume that flow control shall be enabled for debug
prints.

I switch the location of the check for
ifdef CONFIG_DEBUG_UART_FLOW_CONTROL from the actual debug
UART drivers: the code would get compiled-out for 8250 and
Tegra unless their custom config (or passing -DFLOW_CONTROL
in the Tegra case) was not set. Instead this is conditional
at the three places where we print debug messages. The idea
is that debug UARTs can be implemented without this ifdef
boilerplate so they look cleaner, alas the ifdef has to be
somewhere.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-09-15 14:35:28 +01:00
Linus Walleij
2c50a570e9 ARM: 9004/1: debug: Split waituart to CTS and TXRDY
This patch was triggered by a remark from Russell that
introducing a call to the waituart (needed to fix debug prints
on the Qualcomm platforms) was dangerous because in some cases
this will involve waiting for a modem CTS (clear to send)
signal, and debug messages would maybe not work on platforms
with no modem connected to the UART port: they will just
hang waiting for the modem to assert CTS and this might never
happen.

Looking through all UART debug drivers implementing the waituart
macro I discovered that all users except two actually use this
macro to check if the UART is ready for TX, let's call this
TXRDY.

Only two debug UART drivers actually check for CTS:
- arch/arm/include/debug/8250.S
- arch/arm/include/debug/tegra.S

The former is very significant since the 8250 is possibly
the most common UART on the planet.

We have the following problem: the semantics of waituart are
ambiguous making it dangerous to introduce the macro to debug
code fixing debug prints for Qualcomm. To start to pry this
problem apart, this patch does the following:

- Convert all debug UART drivers to define two macros:

  - waituartcts with the clear semantic to wait for CTS
    to be asserted

  - waituarttxrdy with the clear semantic to wait for the TX
    capability of the UART to be ready

- When doing this take care to assign the right function to
  each drivers macro, so they now do exactly the above.

- Update the three sites in the kernel invoking the waituart
  macro to call waituartcts/waituarttxrdy in sequence, so that
  the functional impact on the kernel should be zero.

After this we can start to change the code sites using this
code to do the right thing.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-09-15 14:35:27 +01:00
Linus Walleij
6428ea2788 ARM: 9003/1: uncompress: Delete unused debug macros
The debug macros debug_reloc_start and debug_reloc_end were
rendered unused in commit 6d7d0ae515
"ARM: 6750/1: improvements to compressed/head.S".

Later on a different debug macro named dbgkc was introduced
in commit f3c899927e
"ARM: 8786/1: Debug kernel copy by printing".

Delete the dead debug code.

Cc: Nicolas Pitre <nico@fluxnic.net>
Cc: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Cc: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-09-15 14:35:25 +01:00
Lad Prabhakar
9d8827b27b ARM: dts: r8a7742-iwg21d-q7-dbcm-ca: Add can0 support to camera DB
This patch enables CAN0 interface exposed through connector J4 on the
camera DB.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Chris Paterson <Chris.Paterson2@renesas.com>
Link: https://lore.kernel.org/r/20200911083615.17377-1-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-09-15 09:46:13 +02:00
Lad Prabhakar
a937909702 ARM: dts: r8a7742: Add VSP support
Add VSP support to R8A7742 (RZ/G1H) SoC dtsi.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Chris Paterson <Chris.Paterson2@renesas.com>
Link: https://lore.kernel.org/r/20200911080929.15058-1-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-09-15 09:46:13 +02:00
Andre Przywara
3328c65666 ARM: dts: hisilicon: Fix SP805 clocks
The SP805 DT binding requires two clocks to be specified, but
Hisilicon platform DTs currently only specify one clock.

In practice, Linux would pick a clock named "apb_pclk" for the bus
clock, and the Linux and U-Boot SP805 driver would use the first clock
to derive the actual watchdog counter frequency.

Since currently both are the very same clock, we can just double the
clock reference, and add the correct clock-names, to match the binding.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2020-09-14 16:31:06 +08:00
Andre Przywara
c26979a7ac ARM: dts: hisilicon: Fix SP804 users
The SP804 binding only specifies one or three clocks, but does not allow
just two clocks.
The HiSi 3620 .dtsi specified two clocks for the two timers, plus gave
one "apb_pclk" clock-name to appease the primecell bus driver.

Extend the clocks by duplicating the first clock to the end of the clock
list, and add two dummy clock-names to make the primecell driver happy.

I don't know what the real APB clock for the IP is, but with the current
DT the first timer clock was used for that, so this change keeps the
current status.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2020-09-14 16:15:22 +08:00
Greg Kroah-Hartman
fccee0bace Merge 5.9-rc5 into usb-next
We need the USB fixes in here as well.

Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-09-14 10:10:55 +02:00
Olof Johansson
ba601120cf This pull request contains Broadcom ARM-based SoCs changes for 5.10,
please pull the following:
 
 - Christian adds support for the Cisco Meraki MR32 which is based on the
   BCM53016 SoC, this requires specifying the PWM, second UART and third
   PCIe controller in Device Tree before finally adding support for the
   board.
 
 - Adrian updates the status properties from "ok" to "okay".
 
 - Andre fixes the SP805 watchdog nodes to have the correct clock names
   and binding for both the Cygnus and Northstar Plus (NSP). He does the
   same thing with the SP804 timer node which was missing an
   "arm,primecell" compatible string.
 
 - Maxime enables the BCM2711 (Raspberry Pi 4) display pipeline since all
   DRM changes are ready.
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Merge tag 'arm-soc/for-5.10/devicetree' of https://github.com/Broadcom/stblinux into arm/dt

This pull request contains Broadcom ARM-based SoCs changes for 5.10,
please pull the following:

- Christian adds support for the Cisco Meraki MR32 which is based on the
  BCM53016 SoC, this requires specifying the PWM, second UART and third
  PCIe controller in Device Tree before finally adding support for the
  board.

- Adrian updates the status properties from "ok" to "okay".

- Andre fixes the SP805 watchdog nodes to have the correct clock names
  and binding for both the Cygnus and Northstar Plus (NSP). He does the
  same thing with the SP804 timer node which was missing an
  "arm,primecell" compatible string.

- Maxime enables the BCM2711 (Raspberry Pi 4) display pipeline since all
  DRM changes are ready.

* tag 'arm-soc/for-5.10/devicetree' of https://github.com/Broadcom/stblinux:
  ARM: dts: broadcom: Fix SP804 node
  ARM: dts: NSP: Fix SP805 clock-names
  ARM: dts: Cygnus: Fix SP805 clocks
  ARM: dts: NSP: replace status value "ok" by "okay"
  ARM: BCM5301X: Add DT for Meraki MR32
  ARM: dts: bcm2711: Enable the display pipeline
  ARM: dts: BCM5301X: Specify pcie2 in the DT
  ARM: dts: BCM5301X: Specify uart2 in the DT
  ARM: dts: BCM5301X: Specify PWM in the DT
  dt-bindings: ARM: add bindings for the Meraki MR32

Link: https://lore.kernel.org/r/20200912032153.1216354-1-f.fainelli@gmail.com
Signed-off-by: Olof Johansson <olof@lixom.net>
2020-09-13 11:34:25 -07:00
Olof Johansson
439a95a044 Various minor cleanups for ARM DTS
Cleanup ARM DTS to remove dtschema validation errors.
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Merge tag 'dt-schema-5.10' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt

Various minor cleanups for ARM DTS

Cleanup ARM DTS to remove dtschema validation errors.

* tag 'dt-schema-5.10' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  ARM: dts: alpine: Align GIC nodename with dtschema
  ARM: dts: zx: Align L2 cache-controller nodename with dtschema
  ARM: dts: tango: Align L2 cache-controller nodename with dtschema
  ARM: dts: spear: Align L2 cache-controller nodename with dtschema
  ARM: dts: qcom: Align L2 cache-controller nodename with dtschema
  ARM: dts: prima: Align L2 cache-controller nodename with dtschema

Link: https://lore.kernel.org/r/20200911155509.1495-2-krzk@kernel.org
Signed-off-by: Olof Johansson <olof@lixom.net>
2020-09-13 11:33:43 -07:00
Olof Johansson
679bc80117 ASPEED device tree updates for 5.10
- New machines
 
   * Wistron Mowgli, an AST2500 BMC for a Power9 OpenPower server
 
   * Facebook Wedge400, an AST2500 BMC system which we can assume is 4
     times better than the existing Wedge100 top of rack network switch
 
  - Add a new device, the IBM Operation Panel
 
  - Fixes for Facebook's collection of BMCs
 
  - eMMC and vuart fixes
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Merge tag 'aspeed-5.10-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed into arm/dt

ASPEED device tree updates for 5.10

 - New machines

  * Wistron Mowgli, an AST2500 BMC for a Power9 OpenPower server

  * Facebook Wedge400, an AST2500 BMC system which we can assume is 4
    times better than the existing Wedge100 top of rack network switch

 - Add a new device, the IBM Operation Panel

 - Fixes for Facebook's collection of BMCs

 - eMMC and vuart fixes

* tag 'aspeed-5.10-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed:
  ARM: dts: aspeed: Add Mowgli BMC platform
  ARM: dts: rainier: Disable internal pull-downs on eMMC pins
  ARM: aspeed: g5: Do not set sirq polarity
  ARM: dts: aspeed: rainier: Add IBM Operation Panel I2C device
  ARM: dts: aspeed: tacoma: Add IBM Operation Panel I2C device
  ARM: dts: aspeed: rainier: Enable XDMA engine
  ARM: dts: aspeed: wedge40: Update UART4 pin settings
  ARM: dts: aspeed: wedge40: Update FMC flash0 label
  ARM: dts: aspeed: Add Facebook Wedge400 BMC
  ARM: dts: aspeed: minipack: Update 64MB FMC flash layout
  ARM: dts: aspeed: yamp: Set 32MB FMC flash layout
  ARM: dts: aspeed: cmm: Set 32MB FMC flash layout
  ARM: dts: aspeed: Remove flash layout from Facebook AST2500 Common dtsi

Link: https://lore.kernel.org/r/CACPK8XcDNBYAHzW6NYB4LFm3YbN63AprgW75ZqS+6uXn2b3kug@mail.gmail.com
Signed-off-by: Olof Johansson <olof@lixom.net>
2020-09-13 11:31:26 -07:00
Olof Johansson
34cfebc0d8 ARMv8 Juno/Vexpress/Fast Models updates for v5.10
A few device tree source fixes to make them fully SP804 timer and
 SP805 watchdog binding compliant.
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Merge tag 'juno-updates-5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into arm/dt

ARMv8 Juno/Vexpress/Fast Models updates for v5.10

A few device tree source fixes to make them fully SP804 timer and
SP805 watchdog binding compliant.

* tag 'juno-updates-5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
  arm64: dts: arm: Fix SP805 clock-names
  ARM: dts: arm: Fix SP805 clocks
  ARM: dts: arm: Fix SP804 users

Link: https://lore.kernel.org/r/20200908135028.GA10106@bogus
Signed-off-by: Olof Johansson <olof@lixom.net>
2020-09-13 11:27:05 -07:00
Olof Johansson
8bc946b1a1 Samsung DTS ARM changes for v5.10
1. Add sound support to Galaxy S3/Midas family (Exynos4412).
 2. Add sound support to Galaxy S/Aries family (S5Pv210).
 3. Configure L2C-310 cache controller via DTS on Exynos4.
 4. Big cleanup of Exynos DTS to fix as many dtschema warnings as
    possible.  This includes adding missing properties (thus e.g.
    enabling S3C RTC clock), correcting existing nodes, renaming of
    nodes and using non-deprecated properties or compatibles.  Except
    mentioned bring up of S3C RTC, this should not have visible
    effect.
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Merge tag 'samsung-dt-5.10' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt

Samsung DTS ARM changes for v5.10

1. Add sound support to Galaxy S3/Midas family (Exynos4412).
2. Add sound support to Galaxy S/Aries family (S5Pv210).
3. Configure L2C-310 cache controller via DTS on Exynos4.
4. Big cleanup of Exynos DTS to fix as many dtschema warnings as
   possible.  This includes adding missing properties (thus e.g.
   enabling S3C RTC clock), correcting existing nodes, renaming of
   nodes and using non-deprecated properties or compatibles.  Except
   mentioned bring up of S3C RTC, this should not have visible
   effect.

* tag 'samsung-dt-5.10' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: (49 commits)
  ARM: dts: exynos: Silence SATA PHY warning in Exynos5250
  ARM: dts: exynos: Remove I2C9 samsung, i2c-slave-addr from Exynos5250 boards
  ARM: dts: samsung: odroid-xu3: Move assigned-clock* properties to i2s0 node
  ARM: dts: exynos: Use S2MPS11 clock in S3C RTC in SMDK5420
  ARM: dts: exynos: Silence DP HPD pinctrl dtschema warning in Exynos5250 Spring
  ARM: dts: exynos: Use S5M8767 clock in S3C RTC in Exynos5250 Spring
  ARM: dts: exynos: Add max77686 clocks for S3C RTC in SMDK5250
  ARM: dts: exynos: Override thermal by label in Exynos5250
  ARM: dts: exynos: Correct whitespace and indentation issues in Exynos5
  ARM: dts: exynos: Silence i2c-gpio dtschema warning in Exynos5250 Arndale
  ARM: dts: exynos: Correct S3C RTC bindings in SMDK5410
  ARM: dts: exynos: Remove unneeded address/size cells in Exynos5260 GIC
  ARM: dts: exynos: Correct compatible for Exynos5260 GIC
  ARM: dts: exynos: Correct compatible for Exynos5 GIC
  ARM: dts: s5pv210: Enable audio on Aries boards
  ARM: dts: exynos: Correct whitespace and indentation issues
  ARM: dts: exynos: Correct S3C RTC bindings in Tiny4412
  ARM: dts: exynos: Correct S3C RTC bindings in SMDK4412
  ARM: dts: exynos: Add CPU cooling in Tiny4412
  ARM: dts: exynos: Add CPU cooling in SMDK4412
  ...

Link: https://lore.kernel.org/r/20200907150425.11077-1-krzk@kernel.org
Signed-off-by: Olof Johansson <olof@lixom.net>
2020-09-13 11:22:38 -07:00
Olof Johansson
8e299e6193 Renesas ARM DT updates for v5.10
- Increase support for the RZ/G2H SoC on the HopeRun HiHope RZ/G2H
     board, and its display panel expansion board,
   - Increase support for the RZ/G1H SoC on the iWave RainboW SoM (G21M)
     and Qseven board (G21D),
   - SATA support for the HopeRun HiHope RZ/G2N board,
   - PCIe endpoint support for the RZ/G2M, RZ/G2E, and RZ/G2H SoCs,
   - Audio support for the R-Car M3-W+ SoC.
   - Minor fixes and improvements.
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Merge tag 'renesas-arm-dt-for-v5.10-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt

Renesas ARM DT updates for v5.10

  - Increase support for the RZ/G2H SoC on the HopeRun HiHope RZ/G2H
    board, and its display panel expansion board,
  - Increase support for the RZ/G1H SoC on the iWave RainboW SoM (G21M)
    and Qseven board (G21D),
  - SATA support for the HopeRun HiHope RZ/G2N board,
  - PCIe endpoint support for the RZ/G2M, RZ/G2E, and RZ/G2H SoCs,
  - Audio support for the R-Car M3-W+ SoC.
  - Minor fixes and improvements.

* tag 'renesas-arm-dt-for-v5.10-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (39 commits)
  arm64: dts: renesas: Add HiHope RZ/G2H board with idk-1110wr display
  arm64: dts: renesas: r8a774e1: Add cpuidle support for CA5x cores
  arm64: dts: renesas: r8a774e1: Add FDP1 device nodes
  ARM: dts: r8a7742-iwg21d-q7: Enable PCIe Controller
  ARM: dts: r8a7742: Add IPMMU DT nodes
  arm64: dts: renesas: r8a77961: Enable Sound / Audio-DMAC
  arm64: dts: renesas: r8a774e1: Add PWM device nodes
  ARM: dts: r8a7742-iwg21m: Add SPI NOR support
  arm64: dts: renesas: r8a774e1-hihope-rzg2h: Enable HS400 mode
  ARM: dts: r8a7742-iwg21m: Add RTC support
  ARM: dts: r8a7742-iwg21m: Sort the nodes alphabetically
  ARM: dts: r8a7742: Add CAN support
  arm64: dts: renesas: r8a774c0: Add PCIe EP node
  arm64: dts: renesas: r8a774b1: Add PCIe EP nodes
  arm64: dts: renesas: r8a774a1: Add PCIe EP nodes
  ARM: dts: r8a7742: Add QSPI support
  arm64: dts: renesas: r8a774e1-hihope-rzg2h: Setup DU clocks
  arm64: dts: renesas: r8a774e1: Add LVDS device node
  arm64: dts: renesas: r8a774e1: Populate HDMI encoder node
  arm64: dts: renesas: r8a774e1: Populate DU device node
  ...

Link: https://lore.kernel.org/r/20200904114819.30254-3-geert+renesas@glider.be
Signed-off-by: Olof Johansson <olof@lixom.net>
2020-09-13 11:21:23 -07:00
Olof Johansson
a4da411e41 This pull request contains Broadcom ARM-based SoCs Device Tree fixes for
5.9, please pull the following:
 
 - Florian fixes the Broadcom QSPI controller binding such that the most
   specific compatible string is the left most one, and all existing
   in-tree users are updated as well.
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Merge tag 'arm-soc/for-5.9/devicetree-fixes' of https://github.com/Broadcom/stblinux into arm/fixes

This pull request contains Broadcom ARM-based SoCs Device Tree fixes for
5.9, please pull the following:

- Florian fixes the Broadcom QSPI controller binding such that the most
  specific compatible string is the left most one, and all existing
  in-tree users are updated as well.

* tag 'arm-soc/for-5.9/devicetree-fixes' of https://github.com/Broadcom/stblinux:
  arm64: dts: ns2: Fixed QSPI compatible string
  ARM: dts: BCM5301X: Fixed QSPI compatible string
  ARM: dts: NSP: Fixed QSPI compatible string
  ARM: dts: bcm: HR2: Fixed QSPI compatible string
  dt-bindings: spi: Fix spi-bcm-qspi compatible ordering

Link: https://lore.kernel.org/r/20200909211857.4144718-1-f.fainelli@gmail.com
Signed-off-by: Olof Johansson <olof@lixom.net>
2020-09-13 08:57:38 -07:00
Olof Johansson
2aedcb042f i.MX fixes for 5.9, round 2:
- Fix the misspelling of 'interrupts' property in i.MX8MQ TMU DT node.
 - Correct 'ahb' clock for i.MX8MP SDMA1 in device tree.
 - Fix pad QSPI1B_SCLK mux mode for UART3 on i.MX6SX.
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Merge tag 'imx-fixes-5.9-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/fixes

i.MX fixes for 5.9, round 2:

- Fix the misspelling of 'interrupts' property in i.MX8MQ TMU DT node.
- Correct 'ahb' clock for i.MX8MP SDMA1 in device tree.
- Fix pad QSPI1B_SCLK mux mode for UART3 on i.MX6SX.

* tag 'imx-fixes-5.9-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  ARM: dts: imx6sx: fix the pad QSPI1B_SCLK mux mode for uart3
  arm64: dts: imx8mp: correct sdma1 clk setting
  arm64: dts: imx8mq: Fix TMU interrupt property

Link: https://lore.kernel.org/r/20200909143844.GA25109@dragon
Signed-off-by: Olof Johansson <olof@lixom.net>
2020-09-13 08:56:04 -07:00
Olof Johansson
0e384029e1 Fixes for omaps for v5.9-rc cycle
Few fixes for omap based devices:
 
 - Fix of_clk_get() error handling for omap-iommu
 
 - Fix missing audio pinctrl entries for logicpd boards
 
 - Fix video for logicpd-som-lv after switch to generic panels
 
 - Fix omap5 DSI clocks base
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Merge tag 'omap-for-v5.9/fixes-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/fixes

Fixes for omaps for v5.9-rc cycle

Few fixes for omap based devices:

- Fix of_clk_get() error handling for omap-iommu

- Fix missing audio pinctrl entries for logicpd boards

- Fix video for logicpd-som-lv after switch to generic panels

- Fix omap5 DSI clocks base

* tag 'omap-for-v5.9/fixes-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: dts: omap5: Fix DSI base address and clocks
  ARM: dts: logicpd-som-lv-baseboard: Fix missing video
  ARM: dts: logicpd-som-lv-baseboard: Fix broken audio
  ARM: dts: logicpd-torpedo-baseboard: Fix broken audio
  ARM: OMAP2+: Fix an IS_ERR() vs NULL check in _get_pwrdm()

Link: https://lore.kernel.org/r/pull-1599132064-54898@atomide.com
Signed-off-by: Olof Johansson <olof@lixom.net>
2020-09-13 08:54:02 -07:00
Matthias Schiffer
888bb3d2cc ARM: dts: imx6qdl-tqma6: fix LM75 compatible string
Specify the National LM75 sensor including its vendor name, as mandated
by the binding docs.

Fixes: cac849e9bb ("ARM: dts: imx6qdl: add TQMa6{S,Q,QP} SoM")
Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-09-13 09:31:25 +08:00
Matthias Schiffer
1b61fa9317 ARM: dts: imx6qdl-tqma6: remove obsolete fsl,spi-num-chipselects
This property is unneeded and not supported by the spi-imx driver.

Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-09-13 09:31:13 +08:00
Matthias Schiffer
afe617cb5f ARM: dts: imx6qdl-tqma6: fix indentation
The PMIC configuration is indented one level too deep.

Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-09-13 09:30:38 +08:00
Krzysztof Kozlowski
48d5732cdf ARM: dts: alpine: Align GIC nodename with dtschema
Fix dtschema validator warnings like:
    gic@fb001000: $nodename:0:
        'gic@fb001000' does not match '^interrupt-controller(@[0-9a-f,]+)*$'

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-09-11 17:44:11 +02:00
Krzysztof Kozlowski
14ed3139e1 ARM: dts: zx: Align L2 cache-controller nodename with dtschema
Fix dtschema validator warnings like:
    l2-cache-controller@c00000: $nodename:0:
        'l2-cache-controller@c00000' does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$'

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Jun Nie <jun.nie@linaro.org>
2020-09-11 17:44:04 +02:00
Krzysztof Kozlowski
55d3db1103 ARM: dts: tango: Align L2 cache-controller nodename with dtschema
Fix dtschema validator warnings like:
    l2-cache-controller@20100000: $nodename:0:
        'l2-cache-controller@20100000' does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$'

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Mans Rullgard <mans@mansr.com>
2020-09-11 17:43:53 +02:00
Krzysztof Kozlowski
1fbd0475a5 ARM: dts: spear: Align L2 cache-controller nodename with dtschema
Fix dtschema validator warnings like:
    l2-cache: $nodename:0: 'l2-cache' does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$'

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
2020-09-11 17:43:46 +02:00
Krzysztof Kozlowski
dcc339affb ARM: dts: qcom: Align L2 cache-controller nodename with dtschema
Fix dtschema validator warnings like:
    l2-cache@2040000: $nodename:0:
        'l2-cache@2040000' does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$'

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-09-11 17:43:37 +02:00
Krzysztof Kozlowski
53486d937c ARM: dts: prima: Align L2 cache-controller nodename with dtschema
Fix dtschema validator warnings like:
    l2-cache-controller@80040000: $nodename:0:
        'l2-cache-controller@80040000' does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$'

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Barry Song <baohua@kernel.org>
2020-09-11 17:43:29 +02:00
Krzysztof Kozlowski
4afb06afd7 ARM: dts: exynos: move assigned-clock* properties to i2s0 node in Odroid XU4
The purpose of those assigned-clock-* properties is to configure clock for
the I2S device so move them to respective node.  This silences the
dtschema warnings like:

  'clocks' is a dependency of 'assigned-clocks'

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200906142146.21266-3-krzk@kernel.org
2020-09-11 16:53:11 +02:00
Krzysztof Kozlowski
eaf2d2f689 ARM: dts: exynos: add input clock to CMU in Exynos4412 Odroid
Commit 6860510146 ("ARM: dts: exynos: Add support for audio over HDMI
for Odroid X/X2/U3") added assigned clocks under Clock Management Unit.

However the dtschema expects "clocks" property if "assigned-clocks" are
used.  Add reference to input clock to silence the dtschema warnings:

  arch/arm/boot/dts/exynos4412-odroidu3.dt.yaml: clock-controller@10030000: 'clocks' is a dependency of 'assigned-clocks'

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200906142146.21266-2-krzk@kernel.org
2020-09-11 16:52:27 +02:00
Krzysztof Kozlowski
f9e8785da5 ARM: dts: exynos: add input clock to CMU in Exynos3250
Commit 52005dece5 ("ARM: dts: Add assigned clock parents to CMU node
for exynos3250") added assigned clocks under Clock Management Unit to
fix hangs when accessing ISP registers.

However the dtschema expects "clocks" property if "assigned-clocks" are
used.  Add reference to input clock to silence the dtschema warnings:

  arch/arm/boot/dts/exynos3250-artik5-eval.dt.yaml: clock-controller@10030000: 'clocks' is a dependency of 'assigned-clocks'

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200906142146.21266-1-krzk@kernel.org
2020-09-11 16:52:24 +02:00
Krzysztof Kozlowski
30b904632e ARM: dts: s3c24xx: move fixed clocks under root node in SMDK2416
The fixed clocks are kept under dedicated 'clocks' node but this causes
multiple dtschema warnings:

  clocks: $nodename:0: 'clocks' does not match '^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'
  clocks: #size-cells:0:0: 0 is not one of [1, 2]
  clocks: xti@0:reg:0: [0] is too short
  clocks: 'ranges' is a required property
  xti@0: 'reg' does not match any of the regexes: 'pinctrl-[0-9]+'

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200907183313.29234-12-krzk@kernel.org
2020-09-11 16:38:16 +02:00
Krzysztof Kozlowski
2436a7e38f ARM: dts: s3c24xx: add address to CPU node
The CPU nodes should be described as children of "cpus" bus node with
appropriate "reg" properties:

  cpus: '#address-cells' is a required property
  cpus: '#size-cells' is a required property
  cpu: 'device_type' is a required property
  cpu: 'reg' is a required property

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200907183313.29234-11-krzk@kernel.org
2020-09-11 16:38:06 +02:00
Krzysztof Kozlowski
17281a3c7f ARM: dts: s3c24xx: align PWM/timer node name with dtschema
Although PWM is used on S3C24xx as clocksource/timer, the dtschema
expects the node to be named in certain format:

  timer@51000000: $nodename:0: 'timer@51000000' does not match '^pwm(@.*|-[0-9a-f])*$'

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200907183313.29234-10-krzk@kernel.org
2020-09-11 16:37:59 +02:00
Krzysztof Kozlowski
9166c9f8aa ARM: dts: s3c24xx: override nodes by label
Using full paths to extend or override a device tree node is error
prone.  If there was a typo error, a new node will be created instead of
extending the existing node.  This will lead to run-time errors that
could be hard to detect.

A mistyped label on the other hand, will cause a dtc compile error
(during build time).

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200907183313.29234-9-krzk@kernel.org
2020-09-11 16:37:42 +02:00
Krzysztof Kozlowski
83c968058d ARM: dts: s3c24xx: fix number of PWM cells
The PWM has only three cells, not four, as pointed out by dtschema:

  timer@51000000: #pwm-cells:0:0: 3 was expected

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200907183313.29234-8-krzk@kernel.org
2020-09-11 16:37:34 +02:00
Krzysztof Kozlowski
a904023f7a ARM: dts: s3c6410: remove additional CPU compatible
Only the specific compatible (arm,arm1176jzf-s) is allowed by dtschema:

  cpu@0: compatible: ['arm,arm1176jzf-s', 'arm,arm1176'] is too long
  cpu@0: compatible: Additional items are not allowed ('arm,arm1176' was unexpected)

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200907183313.29234-7-krzk@kernel.org
2020-09-11 16:37:27 +02:00
Krzysztof Kozlowski
e9da51094a ARM: dts: s3c6410: align node SROM bus node name with dtschema in SMDK6410
The SROM controller is modeled with a bus so align the device node name
with dtschema to fix warning:

  srom-cs1@18000000: $nodename:0: 'srom-cs1@18000000'
    does not match '^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200907183313.29234-6-krzk@kernel.org
2020-09-11 16:37:24 +02:00
Krzysztof Kozlowski
5911622eff ARM: dts: s3c6410: align node SROM bus node name with dtschema in Mini6410
The SROM controller is modeled with a bus so align the device node name
with dtschema to fix warning:

  srom-cs1@18000000: $nodename:0: 'srom-cs1@18000000'
    does not match '^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200907183313.29234-5-krzk@kernel.org
2020-09-11 16:37:19 +02:00
Krzysztof Kozlowski
c298c89ace ARM: dts: s3c6410: move fixed clocks under root node in SMDK6410
The fixed clocks are kept under dedicated 'clocks' node but this causes
multiple dtschema warnings:

  clocks: $nodename:0: 'clocks' does not match '^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'
  clocks: #size-cells:0:0: 0 is not one of [1, 2]
  clocks: oscillator@0:reg:0: [0] is too short
  clocks: oscillator@1:reg:0: [1] is too short
  clocks: 'ranges' is a required property
  oscillator@0: 'reg' does not match any of the regexes: 'pinctrl-[0-9]+'

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200907183313.29234-4-krzk@kernel.org
2020-09-11 16:37:06 +02:00
Krzysztof Kozlowski
8b81a8dece ARM: dts: s3c6410: move fixed clocks under root node in Mini6410
The fixed clocks are kept under dedicated 'clocks' node but this causes
multiple dtschema warnings:

  clocks: $nodename:0: 'clocks' does not match '^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'
  clocks: #size-cells:0:0: 0 is not one of [1, 2]
  clocks: oscillator@0:reg:0: [0] is too short
  clocks: oscillator@1:reg:0: [1] is too short
  clocks: 'ranges' is a required property
  oscillator@0: 'reg' does not match any of the regexes: 'pinctrl-[0-9]+'

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200907183313.29234-3-krzk@kernel.org
2020-09-11 16:36:55 +02:00
Krzysztof Kozlowski
28ab4caccd ARM: dts: s5pv210: correct ethernet unit address in SMDKV210
The SROM bank 5 is at address 0xa8000000, just like the one put in "reg"
property of ethernet node.  Fix the unit address of ethernet node.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200907183313.29234-2-krzk@kernel.org
2020-09-11 16:36:55 +02:00
Geert Uytterhoeven
d9fd7ff595 ARM: dts: renesas: Fix pin controller node names
According to Devicetree Specification v0.2 and later, Section "Generic
Names Recommendation", the node name for a pin controller device node
should be "pinctrl".

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/20200821112351.5518-1-geert+renesas@glider.be
2020-09-11 09:41:20 +02:00
Ben Pai
e89570584d ARM: dts: aspeed: Add Mowgli BMC platform
The Mowgli BMC is an ASPEED ast2500 based BMC that is part of an
OpenPower Power9 server.

Signed-off-by: Ben Pai <Ben_Pai@wistron.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20200909090818.24021-1-ben_pai@wistron.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-09-11 15:08:16 +09:30
Florian Fainelli
1a4a752ee8 Maxime Ripard enables vc4 on BCM2711 (RPi4), which among other things
adds HDMI functionality (no 4K yet).
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Merge tag 'tags/bcm2835-dt-next-2020-09-08' into devicetree/next

Maxime Ripard enables vc4 on BCM2711 (RPi4), which among other things
adds HDMI functionality (no 4K yet).

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2020-09-10 13:35:55 -07:00
Andre Przywara
be7e6bd01c ARM: dts: broadcom: Fix SP804 node
The DT binding for SP804 requires to have an "arm,primecell" compatible
string.
Add this string so that the Linux primecell bus driver picks the device
up and activates the clock.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Tested-by: Florian Fainelli <f.fainelli@gmail.com>
[florian: added compatible to ccbtimer1]
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2020-09-10 13:35:20 -07:00
Andre Przywara
f5146e5da4 ARM: dts: NSP: Fix SP805 clock-names
The SP805 binding sets the name for the actual watchdog clock to
"wdog_clk" (with an underscore).

Change the name in the DTs for the Broadcom NSP platform to match that.
The Linux and U-Boot driver use the *first* clock for this purpose
anyway, so it does not break anything.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Ray Jui <ray.jui@broadcom.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2020-09-10 13:35:19 -07:00
Andre Przywara
9d6693369f ARM: dts: Cygnus: Fix SP805 clocks
The SP805 DT binding requires two clocks to be specified, but the
Broadcom Cygnus DT currently only specifies one clock.

In practice, Linux would pick a clock named "apb_pclk" for the bus
clock, and the Linux and U-Boot SP805 driver would use the first clock
to derive the actual watchdog counter frequency.

Since currently both are the very same clock, we can just double the
clock reference, and add the correct clock-names, to match the binding.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Ray Jui <ray.jui@broadcom.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2020-09-10 13:35:19 -07:00
Adrian Schmutzler
5d00306e3a ARM: dts: NSP: replace status value "ok" by "okay"
While the DT parser recognizes "ok" as a valid value for the
"status" property, it is actually mentioned nowhere. Use the
proper value "okay" instead, as done in the majority of files
already.

Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2020-09-10 13:35:18 -07:00
Christian Lamparter
ec88a9c344 ARM: BCM5301X: Add DT for Meraki MR32
add support for the Cisco Meraki MR32.
This is a dual-band enterprise class 802.11ac access point.
The unit was donated by Chris Blake. Thank you!

SoC:    Broadcom BCM53016A1 (1 GHz, 2 cores)
RAM:    128 MiB
NAND:   128 MiB Spansion S34ML01G2 (~114 MiB useable)
ETH:    1GBit Ethernet Port - PoE
WIFI1:  Broadcom BCM43520 an+ac (2x2:2 - id: 0x4352)
WIFI2:  Broadcom BCM43520 bgn (2x2:2 - id: 0x4352)
WIFI3:  Broadcom BCM43428 abgn (1x1:1 - id: 43428)

BLE:    Broadcom BCM20732 (ttyS1)
LEDS:   1 x Programmable RGB Status LED (driven by a PWM)
        1 x White LED (GPIO)
        1 x Orange LED Fault Indicator (GPIO)
        2 x LAN Activity / Speed LEDs (On the RJ45 Port)
BUTTON: one Reset button
MISC:   AT24C64 8KiB EEPROM (i2c - stores Ethernet MAC)
        ina219 hardware monitor (i2c)
        Kensington Lock

SERIAL:
	WARNING: The serial port needs a TTL/RS-232 3V3 level converter!
        The Serial setting is 115200-8-N-1. The board has a populated
        right angle 1x4 0.1" pinheader.
        The pinout is: VCC, RX, TX, GND.

Odd stuff:
	- uart0 clock frequency is 62.5 MHz.
	- The LEDs are labeled as SYS-LED1 through SYS-LED3
	  because of the silkscreen on the PCB.
	- the original u-boot has been compiled with most functions
	  and commands disabled. The u-boot env isn't setup properly
	  either and as a result, the bcm47xxpart probing is not
	  working. Hence, the nand partitions are specified through a
	  "fixed-partition" binding.
	- The "WICED SMART(TM)" Bluetooth LE 4.0 BCM20732 chip is
	  connected to uart2 of the SoC. The BCM20732 does not
	  provide a HCI. So the linux' bluetooth stack is useless.
	  The mock-up node with the compatible binding and
	  enable-gpios property is provided solely as documentation.

Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2020-09-10 13:35:15 -07:00
Helmut Grohne
edecfa98f6 net: dsa: microchip: look for phy-mode in port nodes
Documentation/devicetree/bindings/net/dsa/dsa.txt says that the phy-mode
property should be specified on port nodes. However, the microchip
drivers read it from the switch node.

Let the driver use the per-port property and fall back to the old
location with a warning.

Fix in-tree users.

Signed-off-by: Helmut Grohne <helmut.grohne@intenta.de>
Link: https://lore.kernel.org/netdev/20200617082235.GA1523@laureti-dev/
Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2020-09-10 12:32:37 -07:00
Lad Prabhakar
8feb348406 ARM: dts: r8a7742-iwg21d-q7: Enable SD2 LED indication
Add support for LED trigger on SD2 interface.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Chris Paterson <Chris.Paterson2@renesas.com>
Link: https://lore.kernel.org/r/20200907155541.2011-4-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-09-10 18:59:42 +02:00
Lad Prabhakar
68ee7720a0 ARM: dts: r8a7742-iwg21d-q7: Add can1 support to carrier board
This patch enables CAN1 interface exposed through connector J20 on the
carrier board.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Chris Paterson <Chris.Paterson2@renesas.com>
Link: https://lore.kernel.org/r/20200907155541.2011-3-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-09-10 18:59:42 +02:00
Lad Prabhakar
8368ca1540 ARM: dts: r8a7742-iwg21d-q7: Add SPI NOR support
Add support for the SPI NOR device which is connected to MSIOF0 interface
on the iWave RainboW-G21d-q7 board.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Chris Paterson <Chris.Paterson2@renesas.com>
Link: https://lore.kernel.org/r/20200907155541.2011-2-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-09-10 18:59:42 +02:00
Lad Prabhakar
4c32a2b34e ARM: dts: r8a7742: Add VIN DT nodes
Add VIN[0123] instances found in the r8a7742 SoC.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20200907144509.8861-3-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-09-10 18:59:42 +02:00
Grygorii Strashko
ec9bc5bedb ARM: dts: dra7: drop legacy cpsw dt node
All dra7/am57 boards converted to use new driver, so drop legacy
cpsw dt node.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-09-10 12:51:36 +03:00
Grygorii Strashko
fa46e7e7dc ARM: dts: am57xx-cl-som-am57x: switch to new cpsw switch drv
Switch CompuLab CL-SOM-AM57x board to use new cpsw switch driver. Those
board configured in dual_mac mode by default. Hence, dual_mac mode has been
preserved the same way between legacy and new driver it's safe to switch
drivers.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-09-10 12:51:32 +03:00
Grygorii Strashko
56d6c721f2 ARM: dts: dra7x-evm: switch to new cpsw switch drv
Switch all TI DRA7x boards to use new cpsw switch driver. Those boards
configured in dual_mac mode by default. Hence, dual_mac mode has been
preserved the same way between legacy and new driver it's safe to switch
drivers.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-09-10 12:51:22 +03:00
Grygorii Strashko
ea952beb29 ARM: dts: beagle-x15: switch to new cpsw switch drv
Switch all TI AM5728 BeagleBoard-X15 boards to use new cpsw switch driver.
Those boards have 2 Ext. port wired and configured in dual_mac mode by
default. Hence, dual_mac mode has been preserved the same way between
legacy and new driver it's safe to switch drivers.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-09-10 12:50:42 +03:00
Grygorii Strashko
d56fe359e6 ARM: dts: am57xx-idk: switch to new cpsw switch drv
Switch all am571/2/4-idk boards to use new cpsw switch driver.
Those boards have 2 Ext. port wired and configured in dual_mac mode by
default. Hence, dual_mac mode has been preserved the same way between
legacy and new driver it's safe to switch drivers.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-09-10 12:50:38 +03:00
Grygorii Strashko
67e97cc60d ARM: dts: am5729: beagleboneai: switch to new cpsw switch drv
Switch BeagleBone AI to use new cpsw switch driver.
It has one Ext. port only and fits dual_mac mode with no issues.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-09-10 12:50:35 +03:00
Adrian Schmutzler
ca6bfe9721 ARM: dts: am43xx: replace status value "ok" by "okay"
While the DT parser recognizes "ok" as a valid value for the
"status" property, it is actually mentioned nowhere. Use the
proper value "okay" instead, as done in the majority of files
already.

Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-09-10 12:47:01 +03:00
Adrian Schmutzler
0893a701a2 ARM: dts: dra7xx: replace status value "ok" by "okay"
While the DT parser recognizes "ok" as a valid value for the
"status" property, it is actually mentioned nowhere. Use the
proper value "okay" instead, as done in the majority of files
already.

Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-09-10 12:46:57 +03:00
Adrian Schmutzler
fe93b72551 ARM: dts: omap: replace status value "ok" by "okay"
While the DT parser recognizes "ok" as a valid value for the
"status" property, it is actually mentioned nowhere. Use the
proper value "okay" instead, as done in the majority of files
already.

Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-09-10 12:46:51 +03:00
Sakari Ailus
3b4a056455 ARM: dts: n9, n950: Remove nokia,nvm-size property
Remove nokia,nvm-size property as it is no longer needed. The driver can
nowadays figure out the size so do not specify it in DT.

Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-09-10 12:43:26 +03:00
Andrew Jeffery
adfe14797e ARM: dts: rainier: Disable internal pull-downs on eMMC pins
There's a veritable tug-of-war going on in the design, so disable one of
the warring parties.

Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Link: https://lore.kernel.org/r/20200910031143.2997298-1-andrew@aj.id.au
Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-09-10 12:43:16 +09:30
Florian Fainelli
b793dab8d8 ARM: dts: BCM5301X: Fixed QSPI compatible string
The string was incorrectly defined before from least to most
specific, swap the compatible strings accordingly.

Fixes: 1c8f406507 ("ARM: dts: BCM5301X: convert to iProc QSPI")
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2020-09-09 14:14:06 -07:00
Florian Fainelli
d1ecc40a95 ARM: dts: NSP: Fixed QSPI compatible string
The string was incorrectly defined before from least to most
specific, swap the compatible strings accordingly.

Fixes: 329f98c197 ("ARM: dts: NSP: Add QSPI nodes to NSPI and bcm958625k DTSes")
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2020-09-09 14:14:06 -07:00
Florian Fainelli
d663186293 ARM: dts: bcm: HR2: Fixed QSPI compatible string
The string was incorrectly defined before from least to most specific,
swap the compatible strings accordingly.

Fixes: b9099ec754 ("ARM: dts: Add Broadcom Hurricane 2 DTS include file")
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2020-09-09 14:14:06 -07:00
Krzysztof Kozlowski
1ed7f6d0ba ARM: dts: s5pv210: align SPI GPIO node name with dtschema in Aries
The device tree schema expects SPI controller to be named "spi",
otherwise dtbs_check complain with a warning like:

  spi-gpio-0: $nodename:0: 'spi-gpio-0' does not match '^spi(@.*|-[0-9a-f])*$'

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Tested-by: Jonathan Bakker <xc-racer2@live.ca>
Link: https://lore.kernel.org/r/20200907161141.31034-25-krzk@kernel.org
2020-09-09 21:43:58 +02:00
Krzysztof Kozlowski
b5c528ba97 ARM: dts: s5pv210: use defines for IRQ flags in Goni
Replace hard-coded flags with defines for readability.  No functional
change.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200907161141.31034-20-krzk@kernel.org
2020-09-09 21:43:12 +02:00
Krzysztof Kozlowski
c272f1cc94 ARM: dts: s5pv210: use defines for IRQ flags in SMDKV210
Replace hard-coded flags with defines for readability.  No functional
change.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200907161141.31034-19-krzk@kernel.org
2020-09-09 21:43:00 +02:00
Krzysztof Kozlowski
0f2e43cf3d ARM: dts: s5pv210: use defines for GPIO flags in Goni
Replace hard-coded flags with defines for readability.  No functional
change.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200907161141.31034-18-krzk@kernel.org
2020-09-09 21:42:32 +02:00
Krzysztof Kozlowski
0e2774e180 ARM: dts: s5pv210: use defines for GPIO flags in Aquila
Replace hard-coded flags with defines for readability.  No functional
change.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200907161141.31034-17-krzk@kernel.org
2020-09-09 21:42:24 +02:00
Krzysztof Kozlowski
fd595722c1 ARM: dts: s5pv210: add RTC 32 KHz clock in Torbreck
The S3C RTC requires 32768 Hz clock as input which is provided by PMIC.
However the PMIC is not described in DTS at all so at least add
a workaround to model its clock with a fixed-clock.

This fixes dtbs_check warnings:

  rtc@e2800000: clocks: [[2, 145]] is too short
  rtc@e2800000: clock-names: ['rtc'] is too short

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200907161141.31034-16-krzk@kernel.org
2020-09-09 21:42:13 +02:00
Krzysztof Kozlowski
7260b36345 ARM: dts: s5pv210: add RTC 32 KHz clock in SMDKV210
The S3C RTC requires 32768 Hz clock as input which is provided by PMIC.
However the PMIC is not described in DTS at all so at least add
a workaround to model its clock with a fixed-clock.

This fixes dtbs_check warnings:

  rtc@e2800000: clocks: [[2, 145]] is too short
  rtc@e2800000: clock-names: ['rtc'] is too short

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200907161141.31034-15-krzk@kernel.org
2020-09-09 21:42:07 +02:00
Krzysztof Kozlowski
37dea4fa98 ARM: dts: s5pv210: add RTC 32 KHz clock in SMDKC110
The S3C RTC requires 32768 Hz clock as input which is provided by PMIC.
However the PMIC is not described in DTS at all so at least add
a workaround to model its clock with a fixed-clock.

This fixes dtbs_check warnings:

  rtc@e2800000: clocks: [[2, 145]] is too short
  rtc@e2800000: clock-names: ['rtc'] is too short

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200907161141.31034-14-krzk@kernel.org
2020-09-09 21:42:01 +02:00
Krzysztof Kozlowski
ebb105b59c ARM: dts: s5pv210: add RTC 32 KHz clock in Goni
The S3C RTC requires 32768 Hz clock as input which is provided by PMIC.
However there is no such clock provider but rather a regulator driver
which registers the clock as a regulator.  This is an old driver which
will not be updated so add a workaround - a fixed-clock to fill missing
clock phandle reference in S3C RTC.

This fixes dtbs_check warnings:

  rtc@e2800000: clocks: [[2, 145]] is too short
  rtc@e2800000: clock-names: ['rtc'] is too short

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200907161141.31034-13-krzk@kernel.org
2020-09-09 21:41:53 +02:00
Krzysztof Kozlowski
086c4498b0 ARM: dts: s5pv210: add RTC 32 KHz clock in Aries family
The S3C RTC requires 32768 Hz clock as input which is provided by PMIC.
However there is no such clock provider but rather a regulator driver
which registers the clock as a regulator.  This is an old driver which
will not be updated so add a workaround - a fixed-clock to fill missing
clock phandle reference in S3C RTC.

This fixes dtbs_check warnings:

  rtc@e2800000: clocks: [[2, 145]] is too short
  rtc@e2800000: clock-names: ['rtc'] is too short

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Tested-by: Jonathan Bakker <xc-racer2@live.ca>
Link: https://lore.kernel.org/r/20200907161141.31034-12-krzk@kernel.org
2020-09-09 21:40:29 +02:00
Krzysztof Kozlowski
e59cb2fb3b ARM: dts: s5pv210: add RTC 32 KHz clock in Aquilla
The S3C RTC requires 32768 Hz clock as input which is provided by PMIC.
However there is no such clock provider but rather a regulator driver
which registers the clock as a regulator.  This is an old driver which
will not be updated so add a workaround - a fixed-clock to fill missing
clock phandle reference in S3C RTC.

This fixes dtbs_check warnings:

  rtc@e2800000: clocks: [[2, 145]] is too short
  rtc@e2800000: clock-names: ['rtc'] is too short

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200907161141.31034-11-krzk@kernel.org
2020-09-09 21:39:50 +02:00
Krzysztof Kozlowski
6c17a2974a ARM: dts: s5pv210: remove dedicated 'audio-subsystem' node
The 'audio-subsystem' node is an artificial creation, not representing
real hardware.  The hardware is described by its nodes - AUDSS clock
controller and I2S0.

Remove the 'audio-subsystem' node along with its undocumented compatible
to fix dtbs_check warnings like:

  audio-subsystem: $nodename:0: 'audio-subsystem' does not match '^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Tested-by: Jonathan Bakker <xc-racer2@live.ca>
Link: https://lore.kernel.org/r/20200907161141.31034-9-krzk@kernel.org
2020-09-09 21:38:31 +02:00
Krzysztof Kozlowski
bb98fff84a ARM: dts: s5pv210: move PMU node out of clock controller
The Power Management Unit (PMU) is a separate device which has little
common with clock controller.  Moving it to one level up (from clock
controller child to SoC) allows to remove fake simple-bus compatible and
dtbs_check warnings like:

  clock-controller@e0100000: $nodename:0:
    'clock-controller@e0100000' does not match '^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Tested-by: Jonathan Bakker <xc-racer2@live.ca>
Link: https://lore.kernel.org/r/20200907161141.31034-8-krzk@kernel.org
2020-09-09 21:38:18 +02:00
Krzysztof Kozlowski
d38cae370e ARM: dts: s5pv210: move fixed clocks under root node
The fixed clocks are kept under dedicated 'external-clocks' node, thus a
fake 'reg' was added.  This is not correct with dtschema as fixed-clock
binding does not have a 'reg' property.  Moving fixed clocks out of
'soc' to root node fixes multiple dtbs_check warnings:

  external-clocks: $nodename:0: 'external-clocks' does not match '^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'
  external-clocks: #size-cells:0:0: 0 is not one of [1, 2]
  external-clocks: oscillator@0:reg:0: [0] is too short
  external-clocks: oscillator@1:reg:0: [1] is too short
  external-clocks: 'ranges' is a required property
  oscillator@0: 'reg' does not match any of the regexes: 'pinctrl-[0-9]+'

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Tested-by: Jonathan Bakker <xc-racer2@live.ca>
Link: https://lore.kernel.org/r/20200907161141.31034-7-krzk@kernel.org
2020-09-09 21:38:07 +02:00
Krzysztof Kozlowski
ea4e792f3c ARM: dts: s5pv210: remove DMA controller bus node name to fix dtschema warnings
There is no need to keep DMA controller nodes under AMBA bus node.
Remove the "amba" node to fix dtschema warnings like:

  amba: $nodename:0: 'amba' does not match '^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Tested-by: Jonathan Bakker <xc-racer2@live.ca>
Link: https://lore.kernel.org/r/20200907161141.31034-6-krzk@kernel.org
2020-09-09 21:37:50 +02:00
Krzysztof Kozlowski
2c6658c607 ARM: dts: s5pv210: fix pinctrl property of "vibrator-en" regulator in Aries
Fix typo in pinctrl property of "vibrator-en" fixed regulator in Aries
family of boards.  The error caused lack of pin configuration for the
GPIO used in vibrator.

Fixes: 04568cb58a ("ARM: dts: s5pv210: Disable pull for vibrator enable GPIO on Aries boards")
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Cc: <stable@vger.kernel.org>
Link: https://lore.kernel.org/r/20200907161141.31034-5-krzk@kernel.org
2020-09-09 21:37:04 +02:00
Alex Ryabchenko
8cf333f836 arm: dts: mt7623: add lima related regulator
GPU needs additional regulator, add it to devicetree of bpi-r2

Signed-off-by: Alex Ryabchenko <d3adme4t@gmail.com>
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Link: https://lore.kernel.org/r/20200904110002.88966-5-linux@fw-web.de
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-09-09 15:54:16 +02:00
Ryder Lee
2c78f4bd2b arm: dts: mt7623: add display subsystem related device nodes
Add display subsystem related device nodes for MT7623.

Signed-off-by: chunhui dai <chunhui.dai@mediatek.com>
Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com>
Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Tested-by: Frank Wunderlich <frank-w@public-files.de>
Cc: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Link: https://lore.kernel.org/r/20200904110002.88966-4-linux@fw-web.de
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-09-09 15:54:16 +02:00
Frank Wunderlich
c0d66c560e arm: dts: mt7623: move display nodes to separate mt7623n.dtsi
mt7623a has no graphics support so move nodes from generic mt7623.dtsi
to mt7623n.dtsi

Fixes: 1f6ed22459 ("arm: dts: mt7623: add Mali-450 device node")
Suggested-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Link: https://lore.kernel.org/r/20200904110002.88966-3-linux@fw-web.de
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-09-09 15:53:56 +02:00
Joel Stanley
c82bf6e133 ARM: aspeed: g5: Do not set sirq polarity
A feature was added to the aspeed vuart driver to configure the vuart
interrupt (sirq) polarity according to the LPC/eSPI strapping register.

Systems that depend on a active low behaviour (sirq_polarity set to 0)
such as OpenPower boxes also use LPC, so this relationship does not
hold. Jeremy confirms that the s2600st which is strapped for eSPI also
does not have this relationship.

The property was added for a Tyan S7106 system which is not supported
in the kernel tree. Should this or other systems wish to use this
feature of the driver they should add it to the machine specific device
tree.

Fixes: c791fc76bc ("arm: dts: aspeed: Add vuart aspeed,sirq-polarity-sense...")
Signed-off-by: Joel Stanley <joel@jms.id.au>
Tested-by: Jeremy Kerr <jk@ozlabs.org>
Reviewed-by: Jeremy Kerr <jk@ozlabs.org>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20200812112400.2406734-1-joel@jms.id.au
Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-09-09 16:38:55 +09:30
Eddie James
d270bb09f4 ARM: dts: aspeed: rainier: Add IBM Operation Panel I2C device
Set I2C bus 7 to multi-master mode and add the panel device that will
register as a slave.

Signed-off-by: Eddie James <eajames@linux.ibm.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20200908200101.64974-6-eajames@linux.ibm.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-09-09 16:29:33 +09:30
Eddie James
7505340245 ARM: dts: aspeed: tacoma: Add IBM Operation Panel I2C device
Set I2C bus 0 to multi-master mode and add the panel device that will
register as a slave.

Signed-off-by: Eddie James <eajames@linux.ibm.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20200908200101.64974-5-eajames@linux.ibm.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-09-09 16:28:37 +09:30
Maxime Ripard
4564363351 ARM: dts: bcm2711: Enable the display pipeline
Now that all the drivers have been adjusted for it, let's bring in the
necessary device tree changes.

The VEC and PV3 are left out for now, since it will require a more specific
clock setup.

Reviewed-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
Tested-by: Chanwoo Choi <cw00.choi@samsung.com>
Tested-by: Hoegeun Kwon <hoegeun.kwon@samsung.com>
Tested-by: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Reviewed-by: Hoegeun Kwon <hoegeun.kwon@samsung.com>
Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Link: https://lore.kernel.org/r/cfce2276d172d3d9c4d34d966b58fd47f77c4e46.1599120059.git-series.maxime@cerno.tech
2020-09-08 18:28:23 +02:00
Dan Murphy
78efa6a766 ARM: dts: ste-href: Add reg property to the LP5521 channel nodes
Add the reg property to each channel node.  This update is
to accommodate the multicolor framework.  In addition to the
accommodation this allows the LEDs to be placed on any channel
and allow designs to skip channels as opposed to requiring
sequential order.

Signed-off-by: Dan Murphy <dmurphy@ti.com>
Acked-by: Pavel Machek <pavel@ucw.cz>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
CC: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20200812195020.13568-7-dmurphy@ti.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-09-07 13:48:06 +02:00
Andre Przywara
a894c6dd56 ARM: dts: arm: Fix SP805 clocks
The SP805 binding sets the name for the actual watchdog clock to
"wdog_clk" (with an underscore).

Change the name in the DTs for ARM Ltd. platforms to match that. The
Linux and U-Boot driver use the *first* clock for this purpose anyway,
so it does not break anything.

For MPS2 we only specify one clock so far, but the binding requires
two clocks to be named.

In practice, Linux would pick a clock named "apb_pclk" for the bus
clock, and the Linux and U-Boot SP805 driver would use the first clock
to derive the actual watchdog counter frequency. So since currently both
are the very same clock, we can just double the clock reference, and add
the correct clock-names, to match the binding.

Link: https://lore.kernel.org/r/20200828130602.42203-8-andre.przywara@arm.com
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2020-09-07 10:54:08 +01:00
Andre Przywara
34a4591871 ARM: dts: arm: Fix SP804 users
The SP804 DT nodes for Realview, MPS2 and VExpress were not complying
with the binding: it requires either one or three clocks, but does not
allow exactly two clocks.

Simply duplicate the first clock to satisfy the binding requirement.
For MPS2, we triple the clock, and add the clock-names property, as this
is required by the Linux primecell driver.
Try to make the clock-names more consistent on the way.

Link: https://lore.kernel.org/r/20200828142018.43298-3-andre.przywara@arm.com
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2020-09-07 10:49:35 +01:00
Krzysztof Kozlowski
d3604c9156 ARM: dts: exynos: Silence SATA PHY warning in Exynos5250
The SATA PHY in Exynos5250 SoCs has two interfaces and two device nodes:
1. sata-phy@12170000
2. i2c-9/i2c@38

The first node represents the actual SATA PHY device with phy-cells.

The second represents an additional I2C interface, needed by the driver
to communicate with the SATA PHY device.  It is not a PHY-provider in
the terms of dtschema so rename it to silence dtbs_check warning:

  arch/arm/boot/dts/exynos5250-arndale.dt.yaml: sata-phy@38: '#phy-cells' is a required property
    From schema: lib/python3.6/site-packages/dtschema/schemas/phy/phy-provider.yaml

This second device node is also a property of SoC, not a board so move
it there.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200902155733.20271-2-krzk@kernel.org
2020-09-06 18:56:39 +02:00
Krzysztof Kozlowski
975bcbce5b ARM: dts: exynos: Remove I2C9 samsung, i2c-slave-addr from Exynos5250 boards
The property samsung,i2c-slave-addr in I2C9 controller on Exynos5250
Arndale and SMDK5250 boards, is not actually needed.  There is only one
master on this bus.  It's not clear why this property was added at first
place.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Link: https://lore.kernel.org/r/20200902155733.20271-1-krzk@kernel.org
2020-09-06 18:56:39 +02:00
Sylwester Nawrocki
75a4a04e78 ARM: dts: samsung: odroid-xu3: Move assigned-clock* properties to i2s0 node
The purpose of those assigned-clock-* properties is to configure clock for
for the I2S device so move them to respective node.

This suppresses the dtbs_check warning:
  arch/arm/boot/dts/exynos5422-odroidxu3.dt.yaml: sound: 'clocks' is a dependency of 'assigned-clocks'

Reported-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-09-06 18:56:25 +02:00
Krzysztof Kozlowski
e8a3d7064c ARM: dts: imx28-m28: Align GPMI NAND node name with schema
Device tree schema expects NAND controller to be named
"nand-controller", otherwise dtbs_check complain with a warning like:

    arch/arm/boot/dts/imx28-eukrea-mbmx283lc.dt.yaml: gpmi-nand@8000c000:
        $nodename:0: 'gpmi-nand@8000c000' does not match '^nand-controller(@.*)?'

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-09-05 16:05:18 +08:00