Johan Hedberg says:
====================
pull request: bluetooth-next 2017-02-19
Here's a set of Bluetooth patches for the 4.11 kernel:
- New USB IDs to the btusb driver
- Race fix in btmrvl driver
- Added out-of-band wakeup support to the btusb driver
- NULL dereference fix to bt_sock_recvmsg
Please let me know if there are any issues pulling. Thanks.
====================
Signed-off-by: David S. Miller <davem@davemloft.net>
* pm-devfreq:
PM / devfreq: Modify the device name as devfreq(X) for sysfs
PM / devfreq: Simplify the sysfs name of devfreq-event device
PM / devfreq: Remove unnecessary separate _remove_devfreq()
PM / devfreq: Fix wrong trans_stat of passive devfreq device
PM / devfreq: Fix available_governor sysfs
PM / devfreq: exynos-ppmu: Show the registred device for ppmu device
PM / devfreq: Fix the wrong description for userspace governor
PM / devfreq: Fix the checkpatch warnings
PM / devfreq: exynos-bus: Print the real clock rate of bus
PM / devfreq: exynos-ppmu: Use the regmap interface to handle the registers
PM / devfreq: exynos-bus: Add the detailed correlation for Exynos5433
PM / devfreq: Don't delete sysfs group twice
Add constants and callback functions for the dwmac on rk3328 socs.
As can be seen, the base structure is the same, only registers and the
bits in them moved slightly.
Signed-off-by: david.wu <david.wu@rock-chips.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Display panels can be oriented many ways, especially in the embedded
world. The rotation property is a way to describe this orientation.
The counter clockwise direction is chosen because that's what fbdev
and drm use.
Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
Acked-by: Thierry Reding <treding@nvidia.com>
Acked-by: Rob Herring <robh@kernel.org>
Multi-Inno Technology Co.,Ltd is a Hong Kong based company offering
LCD, LCD module products and complete panel solutions.
Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
Acked-by: Rob Herring <robh@kernel.org>
- Add support for phyCORE-AM335x PCM-953 carrier board
- Add power button and charger support for am335x-chiliboard
-----BEGIN PGP SIGNATURE-----
iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAliYq1kRHHRvbnlAYXRv
bWlkZS5jb20ACgkQG9Q+yVyrpXO4Uw/9EPQLyrCXt3yWC/LGKJWjyX4UIQnIYqff
J1wYq0ko42yL6LhjloGsDSz+fNtUpkY1/gYjprbWzbHTZpuLMRJU43GJBy0WRkRU
lpuIxocL3Nbwb1FcWBwM+OfE7UNiKL+CTMJxbxrcjB/d7kaUPhSbPsau7jqW3T2x
HBJnuFtdC4rZbPXTIISmt+4YWk3+mo+OCgRogGohhW+qpyMOFhufCqJYwNKyTTaD
Z+I7dbd8sMhSMC53bjGPVqfUamlGdx2JFR5EZktYSaqjpRSaK35yybe8NNfHx5HB
6f62UW/+FgiOE36CZckIze4UEAFol5yIciQ9HLi7+6rrdthCtk8ZBXt+yhG5csuc
pN/czfIZVo6nxEcK5hQqOJngfX1IPfiP96jXe+ZWHBKMhapZ3iTY9tE/9GEXxA9I
bkBY4vREushWGsIUUUkGto0Rm9AgRzsaVuTVkzUNdj3YlRNhC2k/PYIjgeYC+vEF
cDTOtkps5NI254sGfgNABSSNWVQjINFVHAG6rOqxtE4wfk6X/HVu6mr9RlIvYVVg
XtMTxbrSKf2T/EvU8hjHSIFQ2GqbBgG589XpFf7jKiU6K8rYDjhgBnC88qReuxtf
L4INBC6MwpmF3G98Rt4WP599RX1u8gqvyYM6oOf+wjN1D7XJlPlgzoQ6ODQp1Tp6
z1ZeqKh8UJ0=
=TN7G
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v4.11/dt-late' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt
Pull "Few more late dts changes for omaps for v4.11 merge window" from Tony Lindgren:
- Add support for phyCORE-AM335x PCM-953 carrier board
- Add power button and charger support for am335x-chiliboard
* tag 'omap-for-v4.11/dt-late' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: am335x-chiliboard: Support charger
ARM: dts: am335x-chiliboard: Support power button
ARM: dts: Add support for phyCORE-AM335x PCM-953 carrier board
The Marvell devices may have many gpio pins, and hence for wakeup
on these out-of-band pins, the chip needs to be told which pin is
to be used for wakeup, using an hci command.
Thus, we read the pin number etc from the device tree node and send
a command to the chip.
Signed-off-by: Rajat Jain <rajatja@google.com>
Reviewed-by: Brian Norris <briannorris@chromium.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Marcel Holtmann <marcel@holtmann.org>
Some onboard BT chips (e.g. Marvell 8997) contain a wakeup pin that
can be connected to a gpio on the CPU side, and can be used to wakeup
the host out-of-band. This can be useful in situations where the
in-band wakeup is not possible or not preferable (e.g. the in-band
wakeup may require the USB host controller to remain active, and
hence consuming more system power during system sleep).
The oob gpio interrupt to be used for wakeup on the CPU side, is
read from the device tree node, (using standard interrupt descriptors).
A devcie tree binding document is also added for the driver. The
compatible string is in compliance with
Documentation/devicetree/bindings/usb/usb-device.txt
Signed-off-by: Rajat Jain <rajatja@google.com>
Reviewed-by: Brian Norris <briannorris@chromium.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Marcel Holtmann <marcel@holtmann.org>
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJYkydJAAoJEGFBu2jqvgRNwksP/2Y9OR/5srBl0DIq5xNQ/8RP
i0vnddltDuO42ui9ylAve15Z0etTd4Pg5oSOw0VGdkzcPoBWmHwl2ZSpeLPKpwvy
8lVJivuSuQJouNXwx9Il5mq+Z0QrMYKKaQl8yzD8Y5W/zFORsN47n+LVHTflw0+z
tsRoX27JNcYVBJbLFkworWxYpN7s+SIzfjP7yqSsCZSUJPghYtvkoe3M6nYcAByR
XbHSHwFk+doHXVXqrvw718sRdp9pv8VbQ0xP5bdViM0tBblud5CnBTCqRffQa3KV
0ViRrkzA/YfKgTp/8v6+9gBWMx1QFsdNs8jDW8/vCvwwYOYGLPmnq5e17ku3igMd
UskW9P4haPGkGdZLJxfeM8KSffvod3vZDSkkOsv0m7+/djwHOFdtb3CIbjCMwMfM
BBHXK2y7zkIqyvyiMgCrXtwh86aYd2ZFWXzpvaEKH7cVymdJRrPHvhYvz4QCsFHE
7F5HP10QEabeSzX5JO/7tpMp7M7EwqArI6hwfbkpz+2PNm0msPDi7ocfJLoW/o7Q
sF6hgx5PKO9No818eEdaNexpPFLDwzp3t/Gad/y557/LatLnpdoVuJYNpDkNhiY9
aklQpObRniDfd9HkORLJzxyqb9uRIpLldMKb6UN5KJawmmQ9WkPpxoKbREZj4fXv
cyUJJj8Z9KmUqtfBZ2Rm
=ZulM
-----END PGP SIGNATURE-----
Merge tag 'davinci-for-v4.11/dt-2' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into next/dt
Pull "Enable SATA support on DA850 LCDK" from Sekhar Nori:
* tag 'davinci-for-v4.11/dt-2' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
ARM: dts: da850-lcdk: enable the SATA node
ARM: dts: da850: add the SATA node
devicetree: bindings: add bindings for ahci-da850
Allow the driver to work with device tree support.
Based on initial patch submission from Peter Fox.
Tested on a imx7d-sdb board connected to a SHT15 board via Mikro Bus.
Signed-off-by: Marco Franchi <marco.franchi@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
add Faraday Technology Corporation as vendor faraday for DT
Signed-off-by: Hans Ulli Kroll <ulli.kroll@googlemail.com>
Signed-off-by: Rob Herring <robh@kernel.org>
This patch adds a driver for configuration of the Microchip USB251xB/xBi
USB 2.0 hub controller series with USB 2.0 upstream connectivity, SMBus
configuration interface and two to four USB 2.0 downstream ports.
Furthermore add myself as a maintainer for this driver.
The datasheet can be found at the manufacturers website, see [1]. All
device-tree exposed configuration features have been tested on a i.MX6
platform with a USB2512B hub.
[1] http://ww1.microchip.com/downloads/en/DeviceDoc/00001692C.pdf
Signed-off-by: Richard Leitner <richard.leitner@skidata.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This driver supports the Lantiq SSC SPI controller in master
mode. This controller is found on Intel (former Lantiq) SoCs like
the Danube, Falcon, xRX200, xRX300.
The hardware uses two hardware FIFOs one for received and one for
transferred bytes. When the driver writes data into the transmit FIFO
the complete word is taken from the FIFO into a shift register. The
data from this shift register is then written to the wire. This driver
uses the interrupts signaling the status of the FIFOs and not the shift
register. It is also possible to use the interrupts for the shift
register, but they will send a signal after every word. When using the
interrupts for the shift register we get a signal when the last word is
written into the shift register and not when it is written to the wire.
After all FIFOs are empty the driver busy waits till the hardware is
not busy any more and returns the transfer status.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: Mark Brown <broonie@kernel.org>
Add a new compatible for sun4i-i2s driver to handle some
SoCs that have a reset line that must be asserted/deasserted.
This new compatible, "allwinner,sun6i-a31-i2s", requires the
property "resets" which should be a phandle to the reset line.
Except these differences, the compatible is identical to previous one
which will not handle a reset line.
Signed-off-by: Mylène Josserand <mylene.josserand@free-electrons.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
We introduced recently a new compatible to deal with the A64 eMMC
controller, let's document its binding.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
In the case of a single clock source, you don't need names. However,
if the controller has 2 clock sources, you need to name them correctly
so the driver can find the 2nd one. The 2nd clock is for the internal
card detect logic.
Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Acked-by: Rob Herring <robh@kernel.org>
This patch fix some spelling typo found in devicetree/bindings/mmc.
Signed-off-by: Masanari Iida <standby24x7@gmail.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Document the device-tree binding of ZTE MMC host on
ZX296718 SoC.
Signed-off-by: Jun Nie <jun.nie@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Add fifo-addr property and fifo-watermark-quirk property to
synopsys-dw-mshc bindings. It is intended to provide more
dt interface to support SoCs specific configuration.
Signed-off-by: Jun Nie <jun.nie@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Many Motorola phones like droid 4 are using a custom PMIC called CPCAP
or 6556002. We can support it's core features quite easily with regmap_spi
and regmap_irq.
The children of cpcap, such as regulators, ADC and USB, can be just regular
device drivers and defined in the dts file. They get probed as we call
of_platform_populate() at the end of our probe, and then the children
can just call dev_get_regmap(dev.parent, NULL) to get the regmap.
Cc: devicetree@vger.kernel.org
Cc: Marcel Partap <mpartap@gmx.net>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Michael Scott <michael.scott@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
This patch adds documentation for devicetree bindings
for LED support as the subnode of MT6323 PMIC
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
The Aspeed SoC Display Controller is presented as a syscon device to
arbitrate access by display and pinmux drivers. Video pinmux
configuration on fifth generation SoCs depends on bits in both the
System Control Unit and the Display Controller.
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
The LPC bus pinmux configuration on fifth generation Aspeed SoCs depends
on bits in both the System Control Unit and the LPC Host Controller.
The Aspeed LPC Host Controller is described as a child node of the
LPC host-range syscon device for arbitration of access by the host
controller and pinmux drivers.
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Whilst describing a device and not a bus, simple-mfd is modelled on
simple-bus where child nodes are iterated and registered as platform
devices. Some complex devices, e.g. the Aspeed LPC controller, can
benefit from address space mapping such that child nodes can use the
regs property to describe their resource offsets within the
multi-function device.
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Device tree documentation for Broadcom Secure Processing Unit
(SPU) crypto hardware.
Signed-off-by: Steve Lin <steven.lin1@broadcom.com>
Signed-off-by: Rob Rice <rob.rice@broadcom.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
This patch updates the LM90's devicetree definition to
include the #thermal-sensor-cells property as well as
the sensor constants in include/dt-bindings/thermal/lm90.h.
Cc: Wei Ni <wni@nvidia.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Christian Lamparter <chunkeey@googlemail.com>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
This can be used to easily identify a specific chip on a system with
multiple chips.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Marek Vasut <marek.vasut@gmail.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
- add support to the 4-byte address instruction set.
- add support to new memory parts.
- add support to S3AN memories.
- add support to the Intel SPI controller.
- add support to the Aspeed AST2400 and AST2550 controllers.
- fix max SPI transfer and message sizes in m25p80_read().
- fix the Candence QSPI driver.
- fix the Freescale QSPI driver.
-----BEGIN PGP SIGNATURE-----
iQI4BAABCAAiBQJYncJ7GxxjeXJpbGxlLnBpdGNoZW5Ad2VkZXY0dS5mcgAKCRDn
4OgLHRpJcswfD/0dvIvhI9R9ne/kHUsXbW2tIAIc2vrl/jiEA0O90rinRRjxLyIi
3EacSYpL8PXAh5diNannIw/DrjK0FiHB34jJ1NwMP7CQbYMbfb1SGwp5nmIP676W
4iEaSOJDQu76Vbe5L2O4xHUIJoO1l9cr/bZDPXRachBD8H48ZRZUTx0ujff4LbiG
lEwv1Bk35doTRHgmPErPIB/WOlYdvLaoiCUVe9ME0mEEzCmEjoZorTDwaSBpBAMB
4Z04Lz06iP1aPFUm2VYvK5xMvkFN4tS+6xzWpUOUYj8Tty1YptYI7mQINa69J2NA
O8A/elH39Yv1FYvWgrC2SIS/kbHTR/Bxz6napJ0hK3HasLFCwt7Eq2w/XBxr/Wn9
+02buij0PWKywJfuj7tOiAId5IJW0hhEit2BcBFihwsiDDxix679beQoCZ/WRuW/
kJmR+NLRNByVyKCOP239VobiYWjy8DhDTpH5XGwI7bPTiJuS6G6MCVH3f0tYnFTo
8J3gXp4SH2mw6YzWrL8YtKzFKcLEfXTOGc/GFGQX2URV5Es1/Lw4Nh5lrkbEbVoy
dc/S57Ftdde/56L4lDDbydn7pAU8FbuX2gSewvJRuFyhCBKSyw2JEoy27T7t50pd
hN1JvuNYGQ5HP0Vqa/oe1g1GHnBfxiIOm5THX+Iv+3Y0jM1iUDeVeO4DTQ==
=/fPM
-----END PGP SIGNATURE-----
Merge tag 'spi-nor/for-4.11-v2' of git://github.com/spi-nor/linux
From Cyrille:
"""
This pull request contains the following notable changes:
- add support to the 4-byte address instruction set.
- add support to new memory parts.
- add support to S3AN memories.
- add support to the Intel SPI controller.
- add support to the Aspeed AST2400 and AST2550 controllers.
- fix max SPI transfer and message sizes in m25p80_read().
- fix the Candence QSPI driver.
- fix the Freescale QSPI driver.
"""
Add "mediatek,mt2701-nor" for nor flash node's compatible.
Signed-off-by: Guochun Mao <guochun.mao@mediatek.com>
Acked-by: John Crispin <john@phrozen.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com>
The MR25 family doesn't support JEDEC, so they need explicit mentioning
in the list of supported spi IDs. This makes it possible to add these
using for example:
compatible = "everspin,mr25h40";
There was already an entry for mr25h256. Move that one out of the "keep
for compatibility" section and put in a new group for Everspin MRAMs.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com>
Various muxes can aggregate multiple irq lines and provide a control
register to determine the active line. Add bindings for interrupt
controller support.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Phil Reid <preid@electromag.com.au>
Signed-off-by: Peter Rosin <peda@axentia.se>
This is a basic driver for the Zeitec ZET6223 I2C touchscreen
controllers. The driver does not support firmware loading, which is not
required for all tablets which contain this chip.
Signed-off-by: Jelle van der Waa <jelle@vdwaa.nl>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Add the device tree bindings document for the TI CPUFreq/OPP driver
on AM33xx, AM43xx, DRA7xx, and AM57xx SoCs. The operating-points-v2
binding allows us to provide an opp-supported-hw property for each OPP
to define when it is available. This driver is responsible for reading
and parsing registers to determine which OPPs can be selectively enabled
based on the specific SoC in use by matching against the opp-supported-hw
data.
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
ZTE's zx2967 I2S controller driver introduces pclk, this
patch documents this fact.
Signed-off-by: Baoyou Xie <baoyou.xie@linaro.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
List all the current valid compatible strings for the l2cache binding.
This should stop checkpatch.pl from complaining and will hopefully save
someone from having to debug a typo in their dts.
Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
This adds device tree bindings for the Cortina systems Gemini
flash controller, a simple physmap which however need a few
syscon bits to be poked to operate properly.
Cc: Janos Laube <janos.dev@gmail.com>
Cc: Paulius Zaleckas <paulius.zaleckas@gmail.com>
Cc: Hans Ulli Kroll <ulli.kroll@googlemail.com>
Cc: Florian Fainelli <f.fainelli@gmail.com>
Cc: devicetree@vger.kernel.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Marek Vasut <marek.vasut@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
The current default of 20ms cause some devices, which are slow to
initialize, to not show up during the bus scanning. Change this to the
PCIe spec mandated 100ms and document this in the DT binding.
From PCIe base spec rev 3.0, chapter "6.6.1. Conventional Reset":
To allow components to perform internal initialization, system software
must wait a specified minimum period following the end of a Conventional
Reset of one or more devices before it is permitted to issue
Configuration Requests to those devices.
With a Downstream Port that does not support Link speeds greater than 5.0
GT/s, software must wait a minimum of 100 ms before sending a
Configuration Request to the device immediately below that Port.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Jason Cooper <jason@lakedaemon.net>
LED Mode:
Microsemi PHY support 2 LEDs (LED[0] and LED[1]) to display different
status information that can be selected by setting LED mode.
LED Mode parameter (vsc8531, led-0-mode) and (vsc8531, led-1-mode) get
from Device Tree.
Signed-off-by: Raju Lakkaraju <Raju.Lakkaraju@microsemi.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
SSD1306 needs VBAT when it is wired in charge pump configuration. This
patch adds support to the driver to enable VBAT regulator at init time.
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Maxime Ripard <maxime.ripard@free-electrons.com>
Cc: Benoît Cousson <bcousson@baylibre.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Reviewed-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Jyri Sarha <jsarha@ti.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Make reset gpio devicetree property optional. Depending on the board
designing there may not be a dedicated gpio for resetting the
display. Without a proper reset there may be some junk in the display
memory at probe time, so in such a case the display memory is cleared
before turning it on. The devicetree binding document is also updated.
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
Cc: Maxime Ripard <maxime.ripard@free-electrons.com>
Cc: Benoît Cousson <bcousson@baylibre.com>
Signed-off-by: Jyri Sarha <jsarha@ti.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Remove reset-active-low from the devicetree binding document. The actual
implementation has never been there in the driver code and there is no
reason to add it because the gpiod API supports gpio flags, including
GPIO_ACTIVE_LOW, directly trough its own devicetree binding.
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
Cc: Maxime Ripard <maxime.ripard@free-electrons.com>
Cc: Benoît Cousson <bcousson@baylibre.com>
Signed-off-by: Jyri Sarha <jsarha@ti.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
This adds device tree bindings for the Cortina Gemini interrupt
controller. They are pretty standard.
Cc: Janos Laube <janos.dev@gmail.com>
Cc: Paulius Zaleckas <paulius.zaleckas@gmail.com>
Cc: Hans Ulli Kroll <ulli.kroll@googlemail.com>
Cc: Florian Fainelli <f.fainelli@gmail.com>
Cc: devicetree@vger.kernel.org
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
This erratum describes a bug in logic outside the core, so MIDR can't be
used to identify its presence, and reading an SoC-specific revision
register from common arch timer code would be awkward. So, describe it
in the device tree.
Signed-off-by: Ding Tianhong <dingtianhong@huawei.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
This adds device tree bindings for the Cortina Systems Gemini
timer block used in these SoCs.
Cc: Janos Laube <janos.dev@gmail.com>
Cc: Paulius Zaleckas <paulius.zaleckas@gmail.com>
Cc: Hans Ulli Kroll <ulli.kroll@googlemail.com>
Cc: Florian Fainelli <f.fainelli@gmail.com>
Cc: devicetree@vger.kernel.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Add the documentation to avoid PHY lane swapping. This is a boolean
entry to notify the phy device drivers that the TX/RX lanes NO need
to be swapped.
The use case for this binding mostly happens after wrong HW
configuration of PHY IC during bootstrap.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
Contrary to what the Device Tree binding indicates, the binding for the
PPv2 network device currently doesn't provide any fixed link
functionality. This commit adjusts the Device Tree binding documentation
accordingly.
Reported-by: Russell King - ARM Linux <linux@armlinux.org.uk>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Rob Herring <robh@kernel.org>
power domain. Till now, the name of node from DT was used which mostly is just
"power-domain". We need more than that.
-----BEGIN PGP SIGNATURE-----
iQIcBAABCAAGBQJYk3brAAoJEME3ZuaGi4PXlLQP/jmi+uKo+1Ofc/X4r5flKuy7
s66sklaVUTFdZVDe7WjR8TW8alau90yM7mXSLi6iQkSBzoRgmkfB1j97PdzKiYj8
TKVGOfQSLcL/PqD0og+4yicPgaD2YfIJyeE5E0k3ETxQDi3+EVxdvcsjNEsYKA3n
V4TuWlTTbdOSRlqQBmH+VvECWMaYrT0Fn2j7lUX4jeAqlAj6NsQ7Ogq8pGPhikmF
rp2e/SMP1ZdylPsmHTTynpLE0PlkQ8Rwz2vYAu0YDL0rTCgqhIqctwZqPJ1pHwHW
/pw6X2nssPz3nzySWAvRQ3oyW2akWMq2Xibuu7RVI+iEj+rR5AeI6UUTZJ8DyY1H
uhzvXLMJ0XgkN5sobC+WUmA8T17s9tsYQHyFIOZdG8RmPwNa8zP4lJmBG4xOyfNG
xAJl/KhGJHIOrDotGpiovf8MqNEn/jPuiSK0jsFo2sLDNhdxJnOkcchAyGIGUGh1
b74TCgtMNTES50BZbWm0ijaSqk10CrI8wgkVomNLXdW7eGLLvISzLD5Fz/SNQev7
OJporWHONEFWWiH90hPns1ENW3KuEK29yZto9KtyojPAgWBCjSN2/X4vjH3h3rTv
Vca8ArtboFmLA1175oqvX+g6BGw4A0iCvQCgrZoTNRZSTwrbC4IEgImtWpg+n6YO
E5CNm5MIGjPlz9tSu1mX
=1AMJ
-----END PGP SIGNATURE-----
Merge tag 'samsung-drivers-soc-pm-domains-4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/drivers
Pull "soc: samsung: pm_domains for v4.11" from Krzysztof Kozłowski:
Improve the PM domains driver for Exynos by displaying a user-friendly name of
power domain. Till now, the name of node from DT was used which mostly is just
"power-domain". We need more than that.
* tag 'samsung-drivers-soc-pm-domains-4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
soc: samsung: pm_domains: Read domain name from the new label property
soc: samsung: pm_domains: Remove message about failed memory allocation
soc: samsung: pm_domains: Remove unused name field
soc: samsung: pm_domains: Use full names in subdomains registration log
The mv88e6390 ports 9 and 10 supports some additional PHY modes. Add
these modes to the PHY core so they can be used in the binding.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Some patches to support two new SoCs: the H2+ and the V3s.
-----BEGIN PGP SIGNATURE-----
iQIcBAABCAAGBQJYkE5wAAoJEBx+YmzsjxAgPrkP/1ytDjHOhEvHyvBiHJkqrY9u
zMAPbXl7MtUjRqHHq0otmDSbL8dPpWYxKI+5gv4mqTmhppxs3430rRxhP/56fB/g
C4v1mL6LUc/mDcmYhIBxt03Ddq4fZCEbFzZp31r9+CqkduO0+WjsE7NgbUERb33r
NJ/OfWc7k7auJYEtZMCiMwn8Y98EJofw+sNlPtsdtVZw0o96Tspd5xkV83bULN6r
LQnBZMQZgmXrKglJrvCikIQPnVSsEtH0sN3xw4pr4sIuOf5VpHi33LnkJbftEq+V
mJoLWTHODPB1VqH1hzceVHLBwXG3kMtbYGYXPJkTy8/eAVxF9Vj/YRls9+XQtFMc
Pl/1LLP2z2OSIDiR/xMpMUEFtc1++q5TDepVGXdW6A3Dv9qhp/fjlIjLF6aUtbMP
67qNw70rSbCcBw9EQAVG2yPM2MSU9lkwm3bb8MY2usduTBPh7huYbxlChZvATrL0
063rJy4BkVwsm1LKcn7nCedDD6HUwcCwXhlklwWTMjY3AZ6CH0VVb5ynn87UkJPq
fACRA6RvzpDETPzPm/ReasT8u30XKKKdKAd77EqZaYUjKWjvHcZ8oIKahK5MKE6G
I7+3CDZsRZlhz/u6fraQ/iFmLTEogEtDr6x6vp1RFQ8tmtkqgzdGJHsP1oRSG4SW
BUqwz7vd/TtzSJK+vxSt
=YGm1
-----END PGP SIGNATURE-----
Merge tag 'sunxi-core-for-4.11' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into next/soc
Pull "Allwinner core changes for 4.11" from Maxime Ripard:
Some patches to support two new SoCs: the H2+ and the V3s.
* tag 'sunxi-core-for-4.11' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux:
arm: sunxi: add support for V3s SoC
ARM: sunxi: add support for H2+ SoC
SoC part of the support for the for Marvell switches with integrated
CPUs based on Armada XP: the SMP support is slightly different.
-----BEGIN PGP SIGNATURE-----
iIEEABECAEEWIQQYqXDMF3cvSLY+g9cLBhiOFHI71QUCWJCa0yMcZ3JlZ29yeS5j
bGVtZW50QGZyZWUtZWxlY3Ryb25zLmNvbQAKCRALBhiOFHI71bmhAJoCMTBerj+q
dN6aACDT7cfSl8BUwQCfSBNQ2+0r6+naWABhDo7DhPoeOoE=
=XnFS
-----END PGP SIGNATURE-----
Merge tag 'mvebu-soc-4.11-2' of git://git.infradead.org/linux-mvebu into next/soc
Pull "mvebu soc for 4.11 (part 2)" from Gregory CLEMENT:
SoC part of the support for the for Marvell switches with integrated
CPUs based on Armada XP: the SMP support is slightly different.
* tag 'mvebu-soc-4.11-2' of git://git.infradead.org/linux-mvebu:
arm: mvebu: support for SMP on 98DX3336 SoC
Support for the audio codec and Mali GPU for the A33
-----BEGIN PGP SIGNATURE-----
iQIcBAABCAAGBQJYmHAxAAoJEBx+YmzsjxAgiG8P/ijFKXwrmqtrk5a3gUvYIZMK
Qw7zFwHAYgijDRKMNOC9TuvRx/5x6k5V/9kT19zavrz9b1lX/PG5XHfVJH4eWD5U
KjTbISJNR2t7uMTiW2Ydree3D/m6AkrulbOF7M9UP8W5dhwbziJ0uOyAMzxIryjl
Q5i3eUg3mUJylGk2SFcX4ANvtTpCPqvUjExRP1hwQSNonVQgaEKg9LKXEdo8o9RT
hlF6yStn8AyNtHX6rzChiv7AxvOoD5vSehEWuWg3O7GTpUX5lWDzNJewlkkJ6aEl
HBzO1Fni6e/TAxXBEeMeQlf6VnFfSjWhkvMEa5OhFB5NeFE+/THTX+tgyidGK6bT
SwW5+YkQp5ZDhnYU40r0WrJwq4rKoJXzzqkjhE2iPng1zqMbMudiQzBXoITNCTC1
zOYCNMun1lg7GbWXC/YolGUe7ORYKhn+bWNQaBPhn1NR6Ck0uNTQZFyCxdDqN3rH
XtC/JKxbkeXNXSAVFe/16yyyp5bk325n7uNxYzFH4ix9ePIUpvvBCzYgzh4EQY3V
OMDPDFsmApV85S+a5U4ZcTe8QVk5PrAmEFGjfO/doMVcduH4TH3kbQz9GvoQtxJv
R73qeTGWzZs1jLo+UovJ9+W8RYGUdlik4G3i0iT5LG4BiLKNmq+YcE8DEPg/C45t
FAByvIheTctIWKeMhQpP
=X2M/
-----END PGP SIGNATURE-----
Merge tag 'sunxi-dt-for-4.11-2' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into next/dt
Pull "Allwinner DT changes for 4.11, part 2" from Maxime Ripard:
Support for the audio codec and Mali GPU for the A33
* tag 'sunxi-dt-for-4.11-2' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux:
ARM: dts: sun8i: sinlinx: Enable audio nodes
ARM: dts: sun8i: parrot: Enable audio nodes
ARM: dts: sun8i: Add audio codec, dai and card for A33
ARM: sun8i: dt: Add mali node
dt-bindings: gpu: Add Mali Utgard bindings
The usual chunk of DT changes, most notably:
- Support for the H2+ and the V3s
- CPUFreq support for the A33
- SPDIF support for the A31 and H3
- New boards: Beelink X2, Lichee Pi One, Lichee Pi Zero,
Orange Pi Zero
-----BEGIN PGP SIGNATURE-----
iQIcBAABCAAGBQJYkFCYAAoJEBx+YmzsjxAgljYP/0seq1LEtMtoTeXHP6ZPkrju
7/pHjEwJFZRH98DZ0QMAcUM+fHB0C4h5UadEXCIyzYBO9yeHzm+Hoys4VvpaQasL
6taHz3zJ5T1/si7HyyP16LEwaFeARmSO3aXh4t5195Y2u3BFD+b2i5BpMquCC5CM
XXJmx3Q487bUWjdufUqiSz0gWK1BfKw/eJAawoJbIl9Z6v7wOvE0SQF8ZtIc2eOl
WX9uyNKdYh4PsSC0TxexDeKHNhLh2hJgO1HxYg+DTdyGM144XO0OSuPFtfilROaL
tViKBohffz8A4K5m5iCaDva+P9318iO2xVN91/DFV6VS2XhMRvUrfZRd9kEvuhvu
FJF3KrIZDLRu7tkcHVt9GDjO3CElejMT+qLOGg7t+9nJ+6RjyHUSBs6HIU0Opsu0
Fw7LyHihzDH/m7m87lxUUmC5rSRqMVfuiKwphHYqDzkYEGEnL4kv055rE6cBFGyM
zr7aajpiFgARPXj1XdZQRnz8uC8kySUf2o1oLPdhP3szX41AWBTiBuT7yqMB6qnD
5B8Xj4zTsjEYfwsaWaI8VhbK2UsLgsUlbUXugKfqtjoPTjaWN6zQ3C6030Bov9za
2jo0+187iYp/B/M4DPiH3Kicfntnj4DWRmBt8wCX/PVXS2tD1S617JzugbX/+EZK
PF328UgsT3c1UkccBK9/
=ig5Q
-----END PGP SIGNATURE-----
Merge tag 'sunxi-dt-for-4.11' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into next/dt
Pull "Allwinner DT changes for 4.11" from Maxime Ripard:
The usual chunk of DT changes, most notably:
- Support for the H2+ and the V3s
- CPUFreq support for the A33
- SPDIF support for the A31 and H3
- New boards: Beelink X2, Lichee Pi One, Lichee Pi Zero,
Orange Pi Zero
* tag 'sunxi-dt-for-4.11' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux: (42 commits)
ARM: dts: sun8i-h3: Add SPDIF to the Beelink X2
ARM: dts: sun8i-h3: Add the SPDIF block to the H3
ARM: dts: sun8i-h3: Add SPDIF TX pin to the H3
ARM: dts: sun8i-h3: Add dts for the Beelink X2 STB
ARM: sun8i: sina33: Enable display
ARM: sun8i: a23/a33: Add the oscillators accuracy
ARM: sun8i: a23/a33: Enable the real LOSC and use it
ARM: dts: sunxi: add support for Lichee Pi Zero board
ARM: dts: sunxi: add dtsi file for V3s SoC
ARM: dts: sun6i: sina31s: Enable USB OTG controller in peripheral mode
ARM: dts: sun8i: reference-design: use AXP223 DTSI
ARM: dts: sun8i: parrot: use AXP223 DTSI
ARM: dts: sun8i: sina33: use AXP223 DTSI
ARM: dts: sun8i: a33-olinuxino: use AXP223 DTSI
ARM: dts: add DTSI for AXP223
dt-bindings: power: axp20x-usb: add axp223 compatible
ARM: dts: sun7i: Add wifi dt node on Banana Pro
ARM: dts: sun6i: Add SPDIF to the Mele I7
devicetree: bindings: Add vendor prefix for Shenzhen Xunlong Software
ARM: dts: sun8i-h3: orange-pi-pc: Enable audio codec
...
Add support for Marvell switches with integrated CPUs based on Armada XP
-----BEGIN PGP SIGNATURE-----
iIEEABECAEEWIQQYqXDMF3cvSLY+g9cLBhiOFHI71QUCWJCV2yMcZ3JlZ29yeS5j
bGVtZW50QGZyZWUtZWxlY3Ryb25zLmNvbQAKCRALBhiOFHI71SkdAJ0S0Drnjneu
0rdBe1D5BsfMyao7pQCgpGRbAwKc6mtY4w78uFxahRUNdxI=
=3/jm
-----END PGP SIGNATURE-----
Merge tag 'mvebu-dt-4.11-3' of git://git.infradead.org/linux-mvebu into next/dt
Merge "mvebu dt for 4.11 (part 3)" from Gregory CLEMENT:
Add support for Marvell switches with integrated CPUs based on Armada XP
* tag 'mvebu-dt-4.11-3' of git://git.infradead.org/linux-mvebu:
ARM: dts: mvebu: Add device tree for db-dxbc2 and db-xc3-24g4xg boards
ARM: dts: mvebu: Add device tree for 98DX3236 SoCs
The joys of copy/paste: the example of a virtualization capable GIC
in the DT binding was wrong, and propagated to dozens of platforms.
By having a GICC region that is only 4kB (instead of 8kB), we
end-up not being able to access the GICC_DIR register which is on
the second page.
Oh well. Let's fix the source of the crap before tackling individual
offenders.
Acked-by: Tony Lindgren <tony@atomide.com>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The big things this time around are:
1) support for hw cursor on newer mdp5 devices (snapdragon 820+,
tested on db820c)
2) dsi encoder cleanup
3) gpu dt bindings cleanup so we can get the gpu nodes merged upstream
* 'msm-next' of git://people.freedesktop.org/~robclark/linux: (32 commits)
drm/msm: return -EFAULT if copy_from_user() fails
drm/msm/dsi: Add PHY/PLL for 8x96
drm/msm/dsi: Add new method to calculate 14nm PHY timings
drm/msm/dsi: Move PHY operations out of host
drm/msm/dsi: Reset both PHYs before clock operation for dual DSI
drm/msm/dsi: Pass down use case to PHY
drm/msm/dsi: Return more timings from PHY to host
drm/msm/dsi: Add a PHY op that initializes version specific stuff
drm/msm/dsi: Add 8x96 info in dsi_cfg
drm/msm/dsi: Don't error if a DSI host doesn't have a device connected
drm/msm/mdp5: Add support for legacy cursor updates
drm/msm/mdp5: Refactor mdp5_plane_atomic_check
drm/msm/mdp5: Add cursor planes
drm/msm/mdp5: Misc cursor plane bits
drm/msm/mdp5: Configure COLOR3_OUT propagation
drm/msm/mdp5: Use plane helpers to configure src/dst rectangles
drm/msm/mdp5: Prepare CRTC/LM for empty stages
drm/msm/mdp5: Create only as many CRTCs as we need
drm/msm/mdp5: cfg: Change count to unsigned int
drm/msm/mdp5: Create single encoder per interface (INTF)
...
The PCIe controller in HiSilicon Hip06/Hip07 SoCs is not completely
ECAM-compliant. It is non-ECAM only for the RC bus config space; for any
other bus underneath the root bus it does support ECAM access.
Add DT support for the almost-ECAM Hip06/Hip07 controllers.
[bhelgaas: drop dev->of_node test, driver name "hisi-pcie-almost-ecam"]
Signed-off-by: Dongdong Liu <liudongdong3@huawei.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Gabriele Paoloni <gabriele.paoloni@huawei.com>
Reviewed-by: Zhou Wang <wangzhou1@hisilicon.com>
No need for specifying a list of interrupts in the declaration
of IDU interrupt controller anymore since the kernel can obtain
a number of supported interrupts from the build register.
Also delete support of the second parameter for devices which
are connected to IDU because it is not used anywhere.
Signed-off-by: Yuriy Kolerov <yuriy.kolerov@synopsys.com>
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Suggested by Rob Herring. We still support the old names for
compatibility with downstream android dt files.
Cc: Rob Herring <robh@kernel.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Acked-by: Rob Herring <robh@kernel.org>
The original way we determined the gpu version was based on downstream
bindings from android kernel. A cleaner way is to get the version from
the compatible string.
Note that no upstream dtb uses these bindings. But the code still
supports falling back to the legacy bindings (with a warning), so that
we are still compatible with the gpu dt node from android device
kernels.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Acked-by: Rob Herring <robh@kernel.org>
The plan is to use the OPP bindings. For now, remove the documentation
for qcom,gpu-pwrlevels, and make the driver fall back to a safe low
clock if the node is not present.
Note that no upstream dtb use this node. For now we keep compatibility
with this node to avoid breaking compatibility with downstream android
dt files.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Acked-by: Rob Herring <robh@kernel.org>
'uart-has-rtscts' property and 'rts-gpios|cts-gpios' are normally
mutually exclusive, however it is possible for some drivers to have
a dynamic approach, meaning that both properties can be relevant.
Acked-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This resolves the merge errors that were reported in linux-next and it
picks up the staging and IIO fixes that we need/want in here as well.
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
The driver is used for Rockchip rk3288-based boards using a configurable
analog output (can be an headphone) and the built-in HDMI audio output
that is part of the RK3288 SoCs and use the Alsa HDMI codec driver. For
some rk3288-based boards the analog output and the hdmi audio are plugged
on the same i2s line, so we have to do the same in the driver by using a
DAI link CPU to multicodecs. This configuration can be found for example
on the Radxa Rock2 or the Firefly-RK3288.
This commit is based on the initial work that was done by Sjoerd Simons
<sjoerd.simons@collabora.com> with some improvements.
Signed-off-by: Romain Perier <romain.perier@collabora.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
The driver defaults to voltage, not current, type so correct
this in the device tree binding documentation.
Signed-off-by: Hans Holmberg <hans@pixelmunchies.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Many Motorola phones like droid 4 are using a custom PMIC called CPCAP
or 6556002. This PMIC is used with several SoCs, I've noticed at least
omap3, omap4 and Tegra2 based Motorola phones and tablets using it.
Cc: devicetree@vger.kernel.org
Cc: Marcel Partap <mpartap@gmx.net>
Cc: Michael Scott <michael.scott@linaro.org>
Cc: Rob Herring <robh@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
In this series, it adds qualcomm USB2 support. The review process takes
more than half of year, thanks for Stephen Boyd's great work.
Most of patches at linux-next more than ten days, and the last two small
chipidea patches at my tree about one day, no warning is reported from
autobuild robot.
Thanks.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJYlTjsAAoJEEhZKYFQ1nG7YGYIAI+1uo4Hrfja3IdkPX0jQRc8
BwPE/mR/9r2HKsLrXpFf1fNBvHnUOtHigq5JEV8xVF3USAP+dTmB3kQkk1CowryT
9sdp2/1lGe5GaN2SA4Rbg7spjSE+hsWh369XhvBkkQr1WMkaAxxAOvqnPZN94zey
1W5HB89p8XOSHOY/qljW67v2XAb8zZMRjUGUjDVno/YKBlcFi9jX67HZLOA6ReR4
UQZwqjyNh6ndSIwO0hQr23xpmRuomsFlmVpDBoGq5bwfWXzzjNwKUm5RZr3+uZMo
kY7kD8YgP6yF+WygQ3o35vUkqZ9sSAmxD6Dx/mWSKzxCribEnraBYXKBg2ft688=
=01My
-----END PGP SIGNATURE-----
Merge tag 'usb-ci-v4.11-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/peter.chen/usb into usb-next
Peter writes:
Hi Greg,
In this series, it adds qualcomm USB2 support. The review process takes
more than half of year, thanks for Stephen Boyd's great work.
Most of patches at linux-next more than ten days, and the last two small
chipidea patches at my tree about one day, no warning is reported from
autobuild robot.
Thanks.
- Support for one new SoC, the V3s
- Convertion of two old SoCs to the new framework, the old sun5i family
and the A80
- A bunch of fixes
-----BEGIN PGP SIGNATURE-----
iQIcBAABCAAGBQJYkEtDAAoJEBx+YmzsjxAgLl0QAIt0GnG4tXyTsRqrregO8Qbt
UPK/Qs0hOW5VbpPzKDsWPwNGnTbvYy9I/RDnFiMJtEVU7Cj6ttEO4XvEKnaFF0N+
0ux0ATUIrz6p1pbSUTxV0dCfkqcI78+ECLV4Nsvs7pj5RoJVt4Z5gBMAdErrsB+6
q1VYLXIhs5atK1dTgjEWe4VTwaCpNCwoPMgbedOuZMLB0zFRVxtB/JSxlwGHpdoy
vYZqSUgqmDG1WNLKXAiqsa3k9BnSsX/surAfd6mVlk1MauyKzgHKzxkBrvbNjAMR
juaQcSXwkTOm8bRXj7E7NSFFBWiPUJt6dvXCxRJau79k+bYyPduv0UNu7T0a1IjM
lN0PyJcY22m9O9nsoXVSMvU9YJJd91R94UQRpRSQxN1sOLMGVwnCDhQnB5RJhV3p
gRZNZETTT/rP8E3plJJdce5xCsI6FXUT0jYTQW9cWVTcZbhKsntgNoEE4w/tqWIw
dgE/2UzReyBkWzi9OgjKyca+q8zEd6i1w9DqAg3MwwR8K03oS/aKkBaHjgwk/i8x
uiRXxhT5gLFhYOCwz3DmWw3OjwU7uCifyybGKCoxUE7U/3d2AalsTISCm3PX3dxl
RTDPJWKOSfCyzTJNZpHM5MtIKGh/jM4/yUQ3ARXTGyIa9Uxb4DXlEH6gXvrZ4BUA
UsyJ8d19owDqLIBYaE42
=Jkg2
-----END PGP SIGNATURE-----
Merge tag 'sunxi-clk-for-4.11' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into clk-next
Pull Allwinner clock updates from Maxime Ripard:
- Support for one new SoC, the V3s
- Conversion of two old SoCs to the new framework, the old sun5i family
and the A80
- A bunch of fixes
* tag 'sunxi-clk-for-4.11' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux: (25 commits)
ARM: dts: sun9i: Switch to new clock bindings
clk: sunxi-ng: Add A80 Display Engine CCU
clk: sunxi-ng: Add A80 USB CCU
clk: sunxi-ng: Add A80 CCU
clk: sunxi-ng: Support separately grouped PLL lock status register
clk: sunxi-ng: mux: Get closest parent rate possible with CLK_SET_RATE_PARENT
clk: sunxi-ng: mux: honor CLK_SET_RATE_NO_REPARENT flag
clk: sunxi-ng: mux: Fix determine_rate for mux clocks with pre-dividers
clk: sunxi-ng: a33: Set CLK_SET_RATE_PARENT for the GPU
clk: sunxi-ng: Call divider_round_rate if we only have a single parent
ARM: gr8: Convert to CCU
ARM: sun5i: Convert to CCU
clk: sunxi-ng: Add sun5i CCU driver
clk: sunxi-ng: Implement global pre-divider
clk: sunxi-ng: Implement multiplier maximum
clk: sunxi-ng: mult: Fix minimum in round rate
clk: sunxi-ng: Implement factors offsets
clk: sunxi-ng: multiplier: Add fractional support
clk: sunxi-ng: add support for V3s CCU
dt-bindings: add device binding for the CCU of Allwinner V3s
...
Keep the list up to date with include/media/rc-map.h
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Sean Young <sean@mess.org>
Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
The driver already parses the "linux,rc-map-name" property. Add this
information to the documentation so .dts maintainers don't have to look
it up in the source-code.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Sean Young <sean@mess.org>
Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
Add the documentation for dt-binding of the digital audio codec driver
and the audio card driver for Sun8i-a33 SoCs.
Signed-off-by: Mylène Josserand <mylene.josserand@free-electrons.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Add a common binding for describing serial/UART attached devices. Common
examples are Bluetooth, WiFi, NFC and GPS devices.
Serial attached devices are represented as child nodes of a UART node.
This may need to be extended for more complex devices with multiple
interfaces, but for the simple cases a child node is sufficient.
Tested-By: Sebastian Reichel <sre@kernel.org>
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Allwinner H3/V3s features a variant of MUSB controller, which lacks one
endpoint.
Add support for it.
Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
[b-liu@ti.com: added usb: to commit subject prefix]
Signed-off-by: Bin Liu <b-liu@ti.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
