During regcache_init, if client has not passed the
default data of cached register then it is directly
read from the hw to initialize cache. This hw register
read happens before cache ops are initialized and hence
avoiding register read to check for the data available
on cache or not by enabling flag of cache_bypass.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Currently we only trace physical reads, there's no instrumentation if
the read is satisfied from cache.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
There should be no situation where it offers any advantage over rbtree
and there are no current users so remove the code for simplicity.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
One of the reasons for using a cache is to have a software shadow of a register
which is writable but not readable. This allows us to do a read-modify-write
operation on such a register.
Currently regcache checks whether a register is readable when performing a
cached read and returns an error if it is not. Drop this check, since it will
prevent us from using the cache for registers where read-back is not possible.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
regcache currently only properly works with val bit sizes of 8 or 16, since
it will, when calculating the cache word size, round down. This causes the
cache storage to be too small to hold the full register value. Fix this by
rounding up instead.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
The reg_defaults field usually points to a static per driver array, which should
not be modified. Make requirement this explicit by making reg_defaults const.
To allow this the regcache_init code needs some minor changes. Previoulsy the
reg_config was not available in regcache_init and regmap->reg_defaults was used
to pass the default register set to regcache_init. Now that the reg_config is
available we can work on it directly.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Move the initialization regcache related fields of the regmap struct to
regcache_init. This allows us to keep regmap and regcache code better
separated.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Make sure all allocated memory gets freed again in case initializing the cache
failed.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Acked-by: Dimitris Papastamos <dp@opensource.wolfsonmicro.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Make sure reg_defaults_raw gets freed in case of an error.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Acked-by: Dimitris Papastamos <dp@opensource.wolfsonmicro.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Allow drivers to optimise out the register cache sync if they didn't need
to do one. If the hardware is desynced from the register cache (by power
loss for example) then the driver should call regcache_mark_dirty() to
let the core know about this.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Most of these files were implicitly getting EXPORT_SYMBOL via
device.h which was including module.h, but that path will be broken
soon.
[ with input from Stephen Rothwell <sfr@canb.auug.org.au> ]
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
We only really need the defaults in order to cut down the number of
registers we sync and to satisfy reads while the device is powered off
but not all devices are going to need to do that (always on devices like
PMICs being the prime example) so don't require those devices to supply
a default. Instead only try to fall back to hardware defaults if the
driver told us to.
Devices using LZO won't be able to instantiate with this, that will require
some updates in the LZO code to handle this case.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Dimitris Papastamos <dp@opensource.wolfsonmicro.com>
If a register isn't cached then let callers know that so they can fall
back or error handle appropriately.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Dimitris Papastamos <dp@opensource.wolfsonmicro.com>
Rather than open coding a binary search use the standard bsearch() using
the comparison function we're already using for sort() on insert. This
fixes a lockup I was observing due to iterating on min <= max rather
than min < max when we fail to look up.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Dimitris Papastamos <dp@opensource.wolfsonmicro.com>
Since there are more lookups than insertions in a typical
scenario, optimize the linear search into a binary search. For
this to work, we need to keep reg_defaults sorted upon
insertions, for now be lazy and use sort().
Signed-off-by: Dimitris Papastamos <dp@opensource.wolfsonmicro.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Ensure we've got a function so users can enable/disable the
cache bypass option.
Signed-off-by: Dimitris Papastamos <dp@opensource.wolfsonmicro.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
In preperation for the upcoming patches, modify map->cache_bypass
directly. The helper functions will grab an exclusive lock. Because
we'll have acquired the same lock we need to avoid a deadlock.
Signed-off-by: Dimitris Papastamos <dp@opensource.wolfsonmicro.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
We want to use regmap_write() to actually write anything
to the HW.
Signed-off-by: Dimitris Papastamos <dp@opensource.wolfsonmicro.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
In the absence of a sync callback, do it manually. This of course
can't take advantange of the specific optimizations of each
cache type but it will do well enough in most cases.
Signed-off-by: Dimitris Papastamos <dp@opensource.wolfsonmicro.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
This patch adds support for LZO compression when storing the register
cache.
For a typical device whose register map would normally occupy 25kB or 50kB
by using the LZO compression technique, one can get down to ~5-7kB. There
might be a performance penalty associated with each individual read/write
due to decompressing/compressing the underlying cache, however that should not
be noticeable. These memory benefits depend on whether the target architecture
can get rid of the memory occupied by the original register defaults cache
which is marked as __devinitconst. Nevertheless there will be some memory
gain even if the target architecture can't get rid of the original register
map, this should be around ~30-32kB instead of 50kB.
Signed-off-by: Dimitris Papastamos <dp@opensource.wolfsonmicro.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
This patch adds support for the rbtree cache compression type.
Each rbnode manages a variable length block of registers. There can be no
two nodes with overlapping blocks. Each block has a base register and a
currently top register, all the other registers, if any, lie in between these
two and in ascending order.
The reasoning behind the construction of this rbtree is simple. In the
snd_soc_rbtree_cache_init() function, we iterate over the register defaults
provided by the regcache core. For each register value that is non-zero we
insert it in the rbtree. In order to determine in which rbnode we need
to add the register, we first look if there is another register already
added that is adjacent to the one we are about to add. If that is the case
we append it in that rbnode block, otherwise we create a new rbnode
with a single register in its block and add it to the tree.
There are various optimizations across the implementation to speed up lookups
by caching the most recently used rbnode.
Signed-off-by: Dimitris Papastamos <dp@opensource.wolfsonmicro.com>
Tested-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
This is the simplest form of a cache available in regcache. Any
registers whose default value is 0 are ignored. If any of those
registers are modified in the future, they will be placed in the
cache on demand. The cache layout is essentially using the provided
register defaults by the regcache core directly and does not re-map
it to another representation.
Signed-off-by: Dimitris Papastamos <dp@opensource.wolfsonmicro.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
This patch introduces caching support for regmap. The regcache API
has evolved essentially out of ASoC soc-cache so most of the actual
caching types (except LZO) have been tested in the past.
The purpose of regcache is to optimize in time and space the handling
of register caches. Time optimization is achieved by not having to go
over a slow bus like I2C to read the value of a register, instead it is
cached locally in memory and can be retrieved faster. Regarding space
optimization, some of the cache types are better at packing the caches,
for e.g. the rbtree and the LZO caches. By doing this the sacrifice in
time still wins over doing I2C transactions.
Signed-off-by: Dimitris Papastamos <dp@opensource.wolfsonmicro.com>
Tested-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
