Lockdep reported a possible deadlock between the cpuclk lock and for example
the i2c driver.
CPU0 CPU1
---- ----
lock(clk_lock);
local_irq_disable();
lock(&(&i2c->lock)->rlock);
lock(clk_lock);
<Interrupt>
lock(&(&i2c->lock)->rlock);
*** DEADLOCK ***
The generic clock-types of the core ccf already use spin_lock_irqsave when
touching clock registers, so do the same for the cpuclk.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
[mturquette@linaro.org: removed initialization of "flags"]
When changing the armclk on Rockchip SoCs it is supposed to be reparented
to an alternate parent before changing the underlying pll and back after
the change. Additionally there exist clocks that are very tightly bound to
the armclk whose divider values are set according to the armclk rate.
Add a special clock-type to handle all that. The rate table and divider
values will be supplied from the soc-specific clock controllers.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Doug Anderson <dianders@chromium.org>
On a rk3288-board:
Tested-by: Doug Anderson <dianders@chromium.org>
