Commit Graph

3 Commits

Author SHA1 Message Date
Jean-Christophe PLAGNIOL-VILLARD
fc33ff4313 arm: at91: at91sam9x5: fix gpio number per bank
On the at91sam9x5 SoC series, GPIO banks B and D only have 19 and 22
pins. So add a property to set this parameter.

Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2012-10-13 09:09:29 +08:00
Nicolas Ferre
582d5fbd4e ARM: at91/pio: add new PIO3 features
This patch adds the support for new PIO controller found on some
at91sam SOCs.
- more peripheral multiplexing
- more features to configure on a PIO (pull-down, Schmitt trigger, debouncer)
- support for several IRQ triggering features (type and polarity)

Support for those new features are retrieved from the device tree
compatibility string.

Debugfs at91_gpio file is updated to monitor configuration.

Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2012-03-01 13:38:50 +01:00
Nicolas Ferre
21f8187278 ARM: at91/gpio: add irqdomain and DT support
Add "legacy" type of irqdomain to preserve old-style numbering
and allow smooth transition for both DT and non-DT cases.

Original idea and code by Jean-Christophe Plagniol-Villard.

Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2012-03-01 13:29:01 +01:00